Commit 29dd59755a849cc6475faa6a75f3b804e23a6fc2

Authored by Bartlomiej Zolnierkiewicz
1 parent f2694b7e3b

ide: remove ide_setup_ports()

ide-cris.c:
* Add cris_setup_ports() helper and use it instead of ide_setup_ports()
  (fixes random value being set in ->io_ports[IDE_IRQ_OFFSET]).

buddha.c:
* Add buddha_setup_ports() helper and use it instead of ide_setup_ports().

falconide.c:
* Add falconide_setup_ports() helper and use it instead of ide_setup_ports(),
  also fix return value of falconide_init() while at it.

gayle.c:
* Add gayle_setup_ports() helper and use it instead of ide_setup_ports().

macide.c:
* Add macide_setup_ports() helper and use it instead of ide_setup_ports()
  (fixes incorrect value being set in ->io_ports[IDE_IRQ_OFFSET]).

q40ide.c:
* Fix q40_ide_setup_ports() comments.

ide.c:
* Remove no longer needed ide_setup_ports().

Cc: Mikael Starvik <starvik@axis.com>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>

Showing 8 changed files with 133 additions and 184 deletions Side-by-side Diff

drivers/ide/cris/ide-cris.c
... ... @@ -753,6 +753,25 @@
753 753 cris_ide_set_speed(TYPE_DMA, 0, strobe, hold);
754 754 }
755 755  
  756 +static void __init cris_setup_ports(hw_regs_t *hw, unsigned long base)
  757 +{
  758 + int i;
  759 +
  760 + memset(hw, 0, sizeof(*hw));
  761 +
  762 + for (i = 0; i <= 7; i++)
  763 + hw->io_ports[i] = base + cris_ide_reg_addr(i, 0, 1);
  764 +
  765 + /*
  766 + * the IDE control register is at ATA address 6,
  767 + * with CS1 active instead of CS0
  768 + */
  769 + hw->io_ports[IDE_CONTROL_OFFSET] = base + cris_ide_reg_addr(6, 1, 0);
  770 +
  771 + hw->irq = ide_default_irq(0);
  772 + hw->ack_intr = cris_ide_ack_intr;
  773 +}
  774 +
756 775 static const struct ide_port_info cris_port_info __initdata = {
757 776 .chipset = ide_etrax100,
758 777 .host_flags = IDE_HFLAG_NO_ATAPI_DMA |
759 778  
760 779  
... ... @@ -765,24 +784,16 @@
765 784 static int __init init_e100_ide(void)
766 785 {
767 786 hw_regs_t hw;
768   - int ide_offsets[IDE_NR_PORTS], h, i;
  787 + int h;
769 788 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
770 789  
771 790 printk("ide: ETRAX FS built-in ATA DMA controller\n");
772 791  
773   - for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
774   - ide_offsets[i] = cris_ide_reg_addr(i, 0, 1);
775   -
776   - /* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */
777   - ide_offsets[IDE_CONTROL_OFFSET] = cris_ide_reg_addr(6, 1, 0);
778   -
779 792 for (h = 0; h < 4; h++) {
780 793 ide_hwif_t *hwif = NULL;
781 794  
782   - ide_setup_ports(&hw, cris_ide_base_address(h),
783   - ide_offsets,
784   - 0, 0, cris_ide_ack_intr,
785   - ide_default_irq(0));
  795 + cris_setup_ports(&hw, cris_ide_base_address(h));
  796 +
786 797 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
787 798 if (hwif == NULL)
788 799 continue;
... ... @@ -618,60 +618,6 @@
618 618  
619 619 EXPORT_SYMBOL(ide_unregister);
620 620  
621   -
622   -/**
623   - * ide_setup_ports - set up IDE interface ports
624   - * @hw: register descriptions
625   - * @base: base register
626   - * @offsets: table of register offsets
627   - * @ctrl: control register
628   - * @ack_irq: IRQ ack
629   - * @irq: interrupt lie
630   - *
631   - * Setup hw_regs_t structure described by parameters. You
632   - * may set up the hw structure yourself OR use this routine to
633   - * do it for you. This is basically a helper
634   - *
635   - */
636   -
637   -void ide_setup_ports ( hw_regs_t *hw,
638   - unsigned long base, int *offsets,
639   - unsigned long ctrl, unsigned long intr,
640   - ide_ack_intr_t *ack_intr,
641   -/*
642   - * ide_io_ops_t *iops,
643   - */
644   - int irq)
645   -{
646   - int i;
647   -
648   - memset(hw, 0, sizeof(hw_regs_t));
649   - for (i = 0; i < IDE_NR_PORTS; i++) {
650   - if (offsets[i] == -1) {
651   - switch(i) {
652   - case IDE_CONTROL_OFFSET:
653   - hw->io_ports[i] = ctrl;
654   - break;
655   -#if defined(CONFIG_AMIGA) || defined(CONFIG_MAC)
656   - case IDE_IRQ_OFFSET:
657   - hw->io_ports[i] = intr;
658   - break;
659   -#endif /* (CONFIG_AMIGA) || (CONFIG_MAC) */
660   - default:
661   - hw->io_ports[i] = 0;
662   - break;
663   - }
664   - } else {
665   - hw->io_ports[i] = base + offsets[i];
666   - }
667   - }
668   - hw->irq = irq;
669   - hw->ack_intr = ack_intr;
670   -/*
671   - * hw->iops = iops;
672   - */
673   -}
674   -
675 621 void ide_init_port_hw(ide_hwif_t *hwif, hw_regs_t *hw)
676 622 {
677 623 memcpy(hwif->io_ports, hw->io_ports, sizeof(hwif->io_ports));
drivers/ide/legacy/buddha.c
... ... @@ -56,32 +56,12 @@
56 56 XSURF_BASE1, XSURF_BASE2
57 57 };
58 58  
59   -
60 59 /*
61 60 * Offsets from one of the above bases
62 61 */
63 62  
64   -#define BUDDHA_DATA 0x00
65   -#define BUDDHA_ERROR 0x06 /* see err-bits */
66   -#define BUDDHA_NSECTOR 0x0a /* nr of sectors to read/write */
67   -#define BUDDHA_SECTOR 0x0e /* starting sector */
68   -#define BUDDHA_LCYL 0x12 /* starting cylinder */
69   -#define BUDDHA_HCYL 0x16 /* high byte of starting cyl */
70   -#define BUDDHA_SELECT 0x1a /* 101dhhhh , d=drive, hhhh=head */
71   -#define BUDDHA_STATUS 0x1e /* see status-bits */
72 63 #define BUDDHA_CONTROL 0x11a
73   -#define XSURF_CONTROL -1 /* X-Surf has no CS1* (Control/AltStat) */
74 64  
75   -static int buddha_offsets[IDE_NR_PORTS] __initdata = {
76   - BUDDHA_DATA, BUDDHA_ERROR, BUDDHA_NSECTOR, BUDDHA_SECTOR, BUDDHA_LCYL,
77   - BUDDHA_HCYL, BUDDHA_SELECT, BUDDHA_STATUS, BUDDHA_CONTROL, -1
78   -};
79   -
80   -static int xsurf_offsets[IDE_NR_PORTS] __initdata = {
81   - BUDDHA_DATA, BUDDHA_ERROR, BUDDHA_NSECTOR, BUDDHA_SECTOR, BUDDHA_LCYL,
82   - BUDDHA_HCYL, BUDDHA_SELECT, BUDDHA_STATUS, XSURF_CONTROL, -1
83   -};
84   -
85 65 /*
86 66 * Other registers
87 67 */
... ... @@ -140,6 +120,26 @@
140 120 return 1;
141 121 }
142 122  
  123 +static void __init buddha_setup_ports(hw_regs_t *hw, unsigned long base,
  124 + unsigned long ctl, unsigned long irq_port,
  125 + ide_ack_intr_t *ack_intr)
  126 +{
  127 + int i;
  128 +
  129 + memset(hw, 0, sizeof(*hw));
  130 +
  131 + hw->io_ports[IDE_DATA_OFFSET] = base;
  132 +
  133 + for (i = 1; i < 8; i++)
  134 + hw->io_ports[i] = base + 2 + i * 4;
  135 +
  136 + hw->io_ports[IDE_CONTROL_OFFSET] = ctl;
  137 + hw->io_ports[IDE_IRQ_OFFSET] = irq_port;
  138 +
  139 + hw->irq = IRQ_AMIGA_PORTS;
  140 + hw->ack_intr = ack_intr;
  141 +}
  142 +
143 143 /*
144 144 * Probe for a Buddha or Catweasel IDE interface
145 145 */
146 146  
... ... @@ -202,22 +202,24 @@
202 202 printk(KERN_INFO "ide: %s IDE controller\n",
203 203 buddha_board_name[type]);
204 204  
205   - for(i=0;i<buddha_num_hwifs;i++) {
206   - if(type != BOARD_XSURF) {
207   - ide_setup_ports(&hw, (buddha_board+buddha_bases[i]),
208   - buddha_offsets, 0,
209   - (buddha_board+buddha_irqports[i]),
210   - buddha_ack_intr,
211   -// budda_iops,
212   - IRQ_AMIGA_PORTS);
  205 + for (i = 0; i < buddha_num_hwifs; i++) {
  206 + unsigned long base, ctl, irq_port;
  207 + ide_ack_intr_t *ack_intr;
  208 +
  209 + if (type != BOARD_XSURF) {
  210 + base = buddha_board + buddha_bases[i];
  211 + ctl = base + BUDDHA_CONTROL;
  212 + irq_port = buddha_board + buddha_irqports[i];
  213 + ack_intr = buddha_ack_intr;
213 214 } else {
214   - ide_setup_ports(&hw, (buddha_board+xsurf_bases[i]),
215   - xsurf_offsets, 0,
216   - (buddha_board+xsurf_irqports[i]),
217   - xsurf_ack_intr,
218   -// xsurf_iops,
219   - IRQ_AMIGA_PORTS);
220   - }
  215 + base = buddha_board + xsurf_bases[i];
  216 + /* X-Surf has no CS1* (Control/AltStat) */
  217 + ctl = 0;
  218 + irq_port = buddha_board + xsurf_irqports[i];
  219 + ack_intr = xsurf_ack_intr;
  220 + }
  221 +
  222 + buddha_setup_ports(&hw, base, ctl, irq_port, ack_intr);
221 223  
222 224 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
223 225 if (hwif) {
drivers/ide/legacy/falconide.c
... ... @@ -33,22 +33,8 @@
33 33 * Offsets from the above base
34 34 */
35 35  
36   -#define ATA_HD_DATA 0x00
37   -#define ATA_HD_ERROR 0x05 /* see err-bits */
38   -#define ATA_HD_NSECTOR 0x09 /* nr of sectors to read/write */
39   -#define ATA_HD_SECTOR 0x0d /* starting sector */
40   -#define ATA_HD_LCYL 0x11 /* starting cylinder */
41   -#define ATA_HD_HCYL 0x15 /* high byte of starting cyl */
42   -#define ATA_HD_SELECT 0x19 /* 101dhhhh , d=drive, hhhh=head */
43   -#define ATA_HD_STATUS 0x1d /* see status-bits */
44 36 #define ATA_HD_CONTROL 0x39
45 37  
46   -static int falconide_offsets[IDE_NR_PORTS] __initdata = {
47   - ATA_HD_DATA, ATA_HD_ERROR, ATA_HD_NSECTOR, ATA_HD_SECTOR, ATA_HD_LCYL,
48   - ATA_HD_HCYL, ATA_HD_SELECT, ATA_HD_STATUS, ATA_HD_CONTROL, -1
49   -};
50   -
51   -
52 38 /*
53 39 * falconide_intr_lock is used to obtain access to the IDE interrupt,
54 40 * which is shared between several drivers.
55 41  
56 42  
57 43  
58 44  
... ... @@ -57,23 +43,38 @@
57 43 int falconide_intr_lock;
58 44 EXPORT_SYMBOL(falconide_intr_lock);
59 45  
  46 +static void __init falconide_setup_ports(hw_regs_t *hw)
  47 +{
  48 + int i;
60 49  
  50 + memset(hw, 0, sizeof(*hw));
  51 +
  52 + hw->io_ports[IDE_DATA_OFFSET] = ATA_HD_BASE;
  53 +
  54 + for (i = 1; i < 8; i++)
  55 + hw->io_ports[i] = ATA_HD_BASE + 1 + i * 4;
  56 +
  57 + hw->io_ports[IDE_CONTROL_OFFSET] = ATA_HD_CONTROL;
  58 +
  59 + hw->irq = IRQ_MFP_IDE;
  60 + hw->ack_intr = NULL;
  61 +}
  62 +
61 63 /*
62 64 * Probe for a Falcon IDE interface
63 65 */
64 66  
65 67 static int __init falconide_init(void)
66 68 {
67   - if (MACH_IS_ATARI && ATARIHW_PRESENT(IDE)) {
68 69 hw_regs_t hw;
69 70 ide_hwif_t *hwif;
70 71  
  72 + if (!MACH_IS_ATARI || !ATARIHW_PRESENT(IDE))
  73 + return 0;
  74 +
71 75 printk(KERN_INFO "ide: Falcon IDE controller\n");
72 76  
73   - ide_setup_ports(&hw, ATA_HD_BASE, falconide_offsets,
74   - 0, 0, NULL,
75   -// falconide_iops,
76   - IRQ_MFP_IDE);
  77 + falconide_setup_ports(&hw);
77 78  
78 79 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
79 80 if (hwif) {
80 81  
... ... @@ -85,9 +86,8 @@
85 86  
86 87 ide_device_add(idx, NULL);
87 88 }
88   - }
89 89  
90   - return 0;
  90 + return 0;
91 91 }
92 92  
93 93 module_init(falconide_init);
drivers/ide/legacy/gayle.c
... ... @@ -34,22 +34,8 @@
34 34 * Offsets from one of the above bases
35 35 */
36 36  
37   -#define GAYLE_DATA 0x00
38   -#define GAYLE_ERROR 0x06 /* see err-bits */
39   -#define GAYLE_NSECTOR 0x0a /* nr of sectors to read/write */
40   -#define GAYLE_SECTOR 0x0e /* starting sector */
41   -#define GAYLE_LCYL 0x12 /* starting cylinder */
42   -#define GAYLE_HCYL 0x16 /* high byte of starting cyl */
43   -#define GAYLE_SELECT 0x1a /* 101dhhhh , d=drive, hhhh=head */
44   -#define GAYLE_STATUS 0x1e /* see status-bits */
45 37 #define GAYLE_CONTROL 0x101a
46 38  
47   -static int gayle_offsets[IDE_NR_PORTS] __initdata = {
48   - GAYLE_DATA, GAYLE_ERROR, GAYLE_NSECTOR, GAYLE_SECTOR, GAYLE_LCYL,
49   - GAYLE_HCYL, GAYLE_SELECT, GAYLE_STATUS, -1, -1
50   -};
51   -
52   -
53 39 /*
54 40 * These are at different offsets from the base
55 41 */
... ... @@ -106,6 +92,26 @@
106 92 return 1;
107 93 }
108 94  
  95 +static void __init gayle_setup_ports(hw_regs_t *hw, unsigned long base,
  96 + unsigned long ctl, unsigned long irq_port,
  97 + ide_ack_intr_t *ack_intr);
  98 +{
  99 + int i;
  100 +
  101 + memset(hw, 0, sizeof(*hw));
  102 +
  103 + hw->io_ports[IDE_DATA_OFFSET] = base;
  104 +
  105 + for (i = 1; i < 8; i++)
  106 + hw->io_ports[i] = base + 2 + i * 4;
  107 +
  108 + hw->io_ports[IDE_CONTROL_OFFSET] = ctl;
  109 + hw->io_ports[IDE_IRQ_OFFSET] = irq_port;
  110 +
  111 + hw->irq = IRQ_AMIGA_PORTS;
  112 + hw->ack_intr = ack_intr;
  113 +}
  114 +
109 115 /*
110 116 * Probe for a Gayle IDE interface (and optionally for an IDE doubler)
111 117 */
... ... @@ -167,10 +173,7 @@
167 173 base = (unsigned long)ZTWO_VADDR(phys_base);
168 174 ctrlport = GAYLE_HAS_CONTROL_REG ? (base + GAYLE_CONTROL) : 0;
169 175  
170   - ide_setup_ports(&hw, base, gayle_offsets,
171   - ctrlport, irqport, ack_intr,
172   -// &gayle_iops,
173   - IRQ_AMIGA_PORTS);
  176 + gayle_setup_ports(&hw, base, ctrlport, irqport, ack_intr);
174 177  
175 178 hwif = ide_find_port(base);
176 179 if (hwif) {
drivers/ide/legacy/macide.c
... ... @@ -31,14 +31,6 @@
31 31 * These match MkLinux so they should be correct.
32 32 */
33 33  
34   -#define IDE_DATA 0x00
35   -#define IDE_ERROR 0x04 /* see err-bits */
36   -#define IDE_NSECTOR 0x08 /* nr of sectors to read/write */
37   -#define IDE_SECTOR 0x0c /* starting sector */
38   -#define IDE_LCYL 0x10 /* starting cylinder */
39   -#define IDE_HCYL 0x14 /* high byte of starting cyl */
40   -#define IDE_SELECT 0x18 /* 101dhhhh , d=drive, hhhh=head */
41   -#define IDE_STATUS 0x1c /* see status-bits */
42 34 #define IDE_CONTROL 0x38 /* control/altstatus */
43 35  
44 36 /*
... ... @@ -63,11 +55,6 @@
63 55  
64 56 volatile unsigned char *ide_ifr = (unsigned char *) (IDE_BASE + IDE_IFR);
65 57  
66   -static int macide_offsets[IDE_NR_PORTS] = {
67   - IDE_DATA, IDE_ERROR, IDE_NSECTOR, IDE_SECTOR, IDE_LCYL,
68   - IDE_HCYL, IDE_SELECT, IDE_STATUS, IDE_CONTROL
69   -};
70   -
71 58 int macide_ack_intr(ide_hwif_t* hwif)
72 59 {
73 60 if (*ide_ifr & 0x20) {
... ... @@ -77,6 +64,22 @@
77 64 return 0;
78 65 }
79 66  
  67 +static void __init macide_setup_ports(hw_regs_t *hw, unsigned long base,
  68 + int irq, ide_ack_intr_t *ack_intr)
  69 +{
  70 + int i;
  71 +
  72 + memset(hw, 0, sizeof(*hw));
  73 +
  74 + for (i = 0; i < 8; i++)
  75 + hw->io_ports[i] = base + i * 4;
  76 +
  77 + hw->io_ports[IDE_CONTROL_OFFSET] = IDE_CONTROL;
  78 +
  79 + hw->irq = irq;
  80 + hw->ack_intr = ack_intr;
  81 +}
  82 +
80 83 static const char *mac_ide_name[] =
81 84 { "Quadra", "Powerbook", "Powerbook Baboon" };
82 85  
83 86  
84 87  
85 88  
86 89  
... ... @@ -86,27 +89,27 @@
86 89  
87 90 static int __init macide_init(void)
88 91 {
89   - hw_regs_t hw;
90 92 ide_hwif_t *hwif;
  93 + ide_ack_intr_t *ack_intr;
  94 + unsigned long base;
  95 + int irq;
  96 + hw_regs_t hw;
91 97  
92 98 switch (macintosh_config->ide_type) {
93 99 case MAC_IDE_QUADRA:
94   - ide_setup_ports(&hw, IDE_BASE, macide_offsets,
95   - 0, 0, macide_ack_intr,
96   -// quadra_ide_iops,
97   - IRQ_NUBUS_F);
  100 + base = IDE_BASE;
  101 + ack_intr = macide_ack_intr;
  102 + irq = IRQ_NUBUS_F;
98 103 break;
99 104 case MAC_IDE_PB:
100   - ide_setup_ports(&hw, IDE_BASE, macide_offsets,
101   - 0, 0, macide_ack_intr,
102   -// macide_pb_iops,
103   - IRQ_NUBUS_C);
  105 + base = IDE_BASE;
  106 + ack_intr = macide_ack_intr;
  107 + irq = IRQ_NUBUS_C;
104 108 break;
105 109 case MAC_IDE_BABOON:
106   - ide_setup_ports(&hw, BABOON_BASE, macide_offsets,
107   - 0, 0, NULL,
108   -// macide_baboon_iops,
109   - IRQ_BABOON_1);
  110 + base = BABOON_BASE;
  111 + ack_intr = NULL;
  112 + irq = IRQ_BABOON_1;
110 113 break;
111 114 default:
112 115 return -ENODEV;
... ... @@ -114,6 +117,8 @@
114 117  
115 118 printk(KERN_INFO "ide: Macintosh %s IDE controller\n",
116 119 mac_ide_name[macintosh_config->ide_type - 1]);
  120 +
  121 + macide_setup_ports(&hw, base, irq, ack_intr);
117 122  
118 123 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
119 124 if (hwif) {
drivers/ide/legacy/q40ide.c
... ... @@ -66,16 +66,12 @@
66 66  
67 67  
68 68 /*
69   - * This is very similar to ide_setup_ports except that addresses
70   - * are pretranslated for q40 ISA access
  69 + * Addresses are pretranslated for Q40 ISA access.
71 70 */
72 71 void q40_ide_setup_ports ( hw_regs_t *hw,
73 72 unsigned long base, int *offsets,
74 73 unsigned long ctrl, unsigned long intr,
75 74 ide_ack_intr_t *ack_intr,
76   -/*
77   - * ide_io_ops_t *iops,
78   - */
79 75 int irq)
80 76 {
81 77 int i;
... ... @@ -92,9 +88,6 @@
92 88  
93 89 hw->irq = irq;
94 90 hw->ack_intr = ack_intr;
95   -/*
96   - * hw->iops = iops;
97   - */
98 91 }
99 92  
100 93  
... ... @@ -194,17 +194,6 @@
194 194 int ide_register_hw(hw_regs_t *, void (*)(struct ide_drive_s *),
195 195 struct hwif_s **);
196 196  
197   -void ide_setup_ports( hw_regs_t *hw,
198   - unsigned long base,
199   - int *offsets,
200   - unsigned long ctrl,
201   - unsigned long intr,
202   - ide_ack_intr_t *ack_intr,
203   -#if 0
204   - ide_io_ops_t *iops,
205   -#endif
206   - int irq);
207   -
208 197 static inline void ide_std_init_ports(hw_regs_t *hw,
209 198 unsigned long io_addr,
210 199 unsigned long ctl_addr)