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Commit 2b6c4e73248758bac8e1ed81b0d0664da0fff6f8

Authored by Lokesh Vutla
Committed by Tony Lindgren
1 parent d5e7c864f3
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

ARM: OMAP: DMA: Move plat/dma.h to plat-omap/dma-omap.h 

Move plat/dma.h to plat-omap/dma-omap.h as part of single
zImage work

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Showing 49 changed files with 413 additions and 414 deletions Side-by-side Diff

arch/arm/mach-omap1/board-h2.c
Diff comments   View file @ 2b6c4e7
... ... @@ -39,7 +39,7 @@
39 39 #include <asm/mach/map.h>
40 40  
41 41 #include <mach/mux.h>
42   -#include <plat/dma.h>
  42 +#include <plat-omap/dma-omap.h>
43 43 #include <plat/tc.h>
44 44 #include <mach/irda.h>
45 45 #include <linux/platform_data/keypad-omap.h>
arch/arm/mach-omap1/board-h3.c
Diff comments   View file @ 2b6c4e7
... ... @@ -43,7 +43,7 @@
43 43 #include <mach/mux.h>
44 44 #include <plat/tc.h>
45 45 #include <linux/platform_data/keypad-omap.h>
46   -#include <plat/dma.h>
  46 +#include <plat-omap/dma-omap.h>
47 47 #include <mach/flash.h>
48 48  
49 49 #include <mach/hardware.h>
arch/arm/mach-omap1/board-palmte.c
Diff comments   View file @ 2b6c4e7
... ... @@ -37,7 +37,7 @@
37 37 #include <mach/flash.h>
38 38 #include <mach/mux.h>
39 39 #include <plat/tc.h>
40   -#include <plat/dma.h>
  40 +#include <plat-omap/dma-omap.h>
41 41 #include <mach/irda.h>
42 42 #include <linux/platform_data/keypad-omap.h>
43 43  
arch/arm/mach-omap1/board-palmtt.c
Diff comments   View file @ 2b6c4e7
... ... @@ -36,7 +36,7 @@
36 36 #include <plat/led.h>
37 37 #include <mach/flash.h>
38 38 #include <mach/mux.h>
39   -#include <plat/dma.h>
  39 +#include <plat-omap/dma-omap.h>
40 40 #include <plat/tc.h>
41 41 #include <mach/irda.h>
42 42 #include <linux/platform_data/keypad-omap.h>
arch/arm/mach-omap1/board-palmz71.c
Diff comments   View file @ 2b6c4e7
... ... @@ -38,7 +38,7 @@
38 38  
39 39 #include <mach/flash.h>
40 40 #include <mach/mux.h>
41   -#include <plat/dma.h>
  41 +#include <plat-omap/dma-omap.h>
42 42 #include <plat/tc.h>
43 43 #include <mach/irda.h>
44 44 #include <linux/platform_data/keypad-omap.h>
arch/arm/mach-omap1/board-sx1.c
Diff comments   View file @ 2b6c4e7
... ... @@ -36,7 +36,7 @@
36 36  
37 37 #include <mach/flash.h>
38 38 #include <mach/mux.h>
39   -#include <plat/dma.h>
  39 +#include <plat-omap/dma-omap.h>
40 40 #include <mach/irda.h>
41 41 #include <plat/tc.h>
42 42 #include <mach/board-sx1.h>
arch/arm/mach-omap1/devices.c
Diff comments   View file @ 2b6c4e7
... ... @@ -21,7 +21,6 @@
21 21  
22 22 #include <plat/tc.h>
23 23 #include <mach/mux.h>
24   -#include <plat/dma.h>
25 24 #include <plat/mmc.h>
26 25  
27 26 #include <mach/omap7xx.h>
arch/arm/mach-omap1/dma.c
Diff comments   View file @ 2b6c4e7
... ... @@ -25,7 +25,7 @@
25 25 #include <linux/device.h>
26 26 #include <linux/io.h>
27 27  
28   -#include <plat/dma.h>
  28 +#include <plat-omap/dma-omap.h>
29 29 #include <plat/tc.h>
30 30  
31 31 #include <mach/irqs.h>
arch/arm/mach-omap1/io.c
Diff comments   View file @ 2b6c4e7
... ... @@ -18,7 +18,7 @@
18 18  
19 19 #include <mach/mux.h>
20 20 #include <plat/tc.h>
21   -#include <plat/dma.h>
  21 +#include <plat-omap/dma-omap.h>
22 22  
23 23 #include "iomap.h"
24 24 #include "common.h"
arch/arm/mach-omap1/lcd_dma.c
Diff comments   View file @ 2b6c4e7
... ... @@ -27,7 +27,7 @@
27 27 #include <linux/interrupt.h>
28 28 #include <linux/io.h>
29 29  
30   -#include <plat/dma.h>
  30 +#include <plat-omap/dma-omap.h>
31 31  
32 32 #include <mach/hardware.h>
33 33 #include <mach/lcdc.h>
arch/arm/mach-omap1/mcbsp.c
Diff comments   View file @ 2b6c4e7
... ... @@ -19,7 +19,7 @@
19 19 #include <linux/platform_device.h>
20 20 #include <linux/slab.h>
21 21  
22   -#include <plat/dma.h>
  22 +#include <plat-omap/dma-omap.h>
23 23 #include <mach/mux.h>
24 24 #include <plat/cpu.h>
25 25 #include <linux/platform_data/asoc-ti-mcbsp.h>
arch/arm/mach-omap1/pm.c
Diff comments   View file @ 2b6c4e7
... ... @@ -54,7 +54,7 @@
54 54 #include <plat/sram.h>
55 55 #include <plat/tc.h>
56 56 #include <mach/mux.h>
57   -#include <plat/dma.h>
  57 +#include <plat-omap/dma-omap.h>
58 58 #include <plat/dmtimer.h>
59 59  
60 60 #include <mach/irqs.h>
arch/arm/mach-omap2/board-3430sdp.c
Diff comments   View file @ 2b6c4e7
... ... @@ -32,7 +32,7 @@
32 32  
33 33 #include <plat/usb.h>
34 34 #include "common.h"
35   -#include <plat/dma.h>
  35 +#include <plat-omap/dma-omap.h>
36 36 #include <plat/gpmc.h>
37 37 #include <video/omapdss.h>
38 38 #include <video/omap-panel-tfp410.h>
arch/arm/mach-omap2/board-h4.c
Diff comments   View file @ 2b6c4e7
... ... @@ -32,7 +32,7 @@
32 32 #include <asm/mach/map.h>
33 33  
34 34 #include <plat/menelaus.h>
35   -#include <plat/dma.h>
  35 +#include <plat-omap/dma-omap.h>
36 36 #include <plat/gpmc.h>
37 37 #include "debug-devices.h"
38 38  
arch/arm/mach-omap2/board-rx51-peripherals.c
Diff comments   View file @ 2b6c4e7
... ... @@ -31,7 +31,7 @@
31 31 #include <asm/system_info.h>
32 32  
33 33 #include "common.h"
34   -#include <plat/dma.h>
  34 +#include <plat-omap/dma-omap.h>
35 35 #include <plat/gpmc.h>
36 36 #include <plat/omap-pm.h>
37 37 #include "gpmc-smc91x.h"
arch/arm/mach-omap2/board-rx51.c
Diff comments   View file @ 2b6c4e7
... ... @@ -24,7 +24,7 @@
24 24 #include <asm/mach/map.h>
25 25  
26 26 #include "common.h"
27   -#include <plat/dma.h>
  27 +#include <plat-omap/dma-omap.h>
28 28 #include <plat/gpmc.h>
29 29 #include <plat/usb.h>
30 30  
arch/arm/mach-omap2/devices.c
Diff comments   View file @ 2b6c4e7
... ... @@ -24,7 +24,7 @@
24 24 #include <asm/mach/map.h>
25 25  
26 26 #include "iomap.h"
27   -#include <plat/dma.h>
  27 +#include <plat-omap/dma-omap.h>
28 28 #include <plat/omap_hwmod.h>
29 29 #include <plat/omap_device.h>
30 30 #include "omap4-keypad.h"
arch/arm/mach-omap2/dma.c
Diff comments   View file @ 2b6c4e7
... ... @@ -30,7 +30,7 @@
30 30  
31 31 #include <plat/omap_hwmod.h>
32 32 #include <plat/omap_device.h>
33   -#include <plat/dma.h>
  33 +#include <plat-omap/dma-omap.h>
34 34  
35 35 #define OMAP2_DMA_STRIDE 0x60
36 36  
arch/arm/mach-omap2/io.c
Diff comments   View file @ 2b6c4e7
... ... @@ -31,7 +31,7 @@
31 31 #include <plat/omap-pm.h>
32 32 #include <plat/omap_hwmod.h>
33 33 #include <plat/multi.h>
34   -#include <plat/dma.h>
  34 +#include <plat-omap/dma-omap.h>
35 35  
36 36 #include "soc.h"
37 37 #include "iomap.h"
arch/arm/mach-omap2/mcbsp.c
Diff comments   View file @ 2b6c4e7
... ... @@ -20,7 +20,7 @@
20 20 #include <linux/slab.h>
21 21 #include <linux/platform_data/asoc-ti-mcbsp.h>
22 22  
23   -#include <plat/dma.h>
  23 +#include <plat-omap/dma-omap.h>
24 24 #include <plat/omap_device.h>
25 25 #include <linux/pm_runtime.h>
26 26  
arch/arm/mach-omap2/omap_hwmod_2420_data.c
Diff comments   View file @ 2b6c4e7
... ... @@ -15,7 +15,7 @@
15 15 #include <linux/platform_data/spi-omap2-mcspi.h>
16 16  
17 17 #include <plat/omap_hwmod.h>
18   -#include <plat/dma.h>
  18 +#include <plat-omap/dma-omap.h>
19 19 #include <plat/serial.h>
20 20 #include <plat/i2c.h>
21 21 #include <plat/dmtimer.h>
arch/arm/mach-omap2/omap_hwmod_2430_data.c
Diff comments   View file @ 2b6c4e7
... ... @@ -16,7 +16,7 @@
16 16 #include <linux/platform_data/spi-omap2-mcspi.h>
17 17  
18 18 #include <plat/omap_hwmod.h>
19   -#include <plat/dma.h>
  19 +#include <plat-omap/dma-omap.h>
20 20 #include <plat/serial.h>
21 21 #include <plat/i2c.h>
22 22 #include <plat/dmtimer.h>
arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
Diff comments   View file @ 2b6c4e7
... ... @@ -11,7 +11,7 @@
11 11 */
12 12 #include <plat/omap_hwmod.h>
13 13 #include <plat/serial.h>
14   -#include <plat/dma.h>
  14 +#include <plat-omap/dma-omap.h>
15 15 #include <plat/common.h>
16 16 #include "hdq1w.h"
17 17  
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
Diff comments   View file @ 2b6c4e7
... ... @@ -11,7 +11,7 @@
11 11 #include <plat/omap_hwmod.h>
12 12 #include <plat/serial.h>
13 13 #include <linux/platform_data/gpio-omap.h>
14   -#include <plat/dma.h>
  14 +#include <plat-omap/dma-omap.h>
15 15 #include <plat/dmtimer.h>
16 16 #include <linux/platform_data/spi-omap2-mcspi.h>
17 17  
arch/arm/mach-omap2/omap_hwmod_33xx_data.c
Diff comments   View file @ 2b6c4e7
... ... @@ -18,7 +18,7 @@
18 18 #include <plat/cpu.h>
19 19 #include <linux/platform_data/gpio-omap.h>
20 20 #include <linux/platform_data/spi-omap2-mcspi.h>
21   -#include <plat/dma.h>
  21 +#include <plat-omap/dma-omap.h>
22 22 #include <plat/mmc.h>
23 23 #include <plat/i2c.h>
24 24  
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
Diff comments   View file @ 2b6c4e7
... ... @@ -18,7 +18,7 @@
18 18 #include <linux/platform_data/gpio-omap.h>
19 19  
20 20 #include <plat/omap_hwmod.h>
21   -#include <plat/dma.h>
  21 +#include <plat-omap/dma-omap.h>
22 22 #include <plat/serial.h>
23 23 #include "l3_3xxx.h"
24 24 #include "l4_3xxx.h"
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
Diff comments   View file @ 2b6c4e7
... ... @@ -24,7 +24,7 @@
24 24  
25 25 #include <plat/omap_hwmod.h>
26 26 #include <plat/i2c.h>
27   -#include <plat/dma.h>
  27 +#include <plat-omap/dma-omap.h>
28 28 #include <linux/platform_data/spi-omap2-mcspi.h>
29 29 #include <linux/platform_data/asoc-ti-mcbsp.h>
30 30 #include <plat/mmc.h>
arch/arm/mach-omap2/pm24xx.c
Diff comments   View file @ 2b6c4e7
... ... @@ -38,7 +38,7 @@
38 38  
39 39 #include <plat/clock.h>
40 40 #include <plat/sram.h>
41   -#include <plat/dma.h>
  41 +#include <plat-omap/dma-omap.h>
42 42  
43 43 #include "common.h"
44 44 #include "prm2xxx_3xxx.h"
arch/arm/mach-omap2/pm34xx.c
Diff comments   View file @ 2b6c4e7
... ... @@ -41,7 +41,7 @@
41 41 #include <plat/sdrc.h>
42 42 #include <plat/prcm.h>
43 43 #include <plat/gpmc.h>
44   -#include <plat/dma.h>
  44 +#include <plat-omap/dma-omap.h>
45 45  
46 46 #include "common.h"
47 47 #include "cm2xxx_3xxx.h"
arch/arm/mach-omap2/serial.c
Diff comments   View file @ 2b6c4e7
... ... @@ -29,7 +29,7 @@
29 29  
30 30 #include <plat/omap-serial.h>
31 31 #include "common.h"
32   -#include <plat/dma.h>
  32 +#include <plat-omap/dma-omap.h>
33 33 #include <plat/omap_hwmod.h>
34 34 #include <plat/omap_device.h>
35 35 #include <plat/omap-pm.h>
arch/arm/plat-omap/common.c
Diff comments   View file @ 2b6c4e7
... ... @@ -19,7 +19,7 @@
19 19 #include <plat/common.h>
20 20 #include <plat/vram.h>
21 21 #include <linux/platform_data/dsp-omap.h>
22   -#include <plat/dma.h>
  22 +#include <plat-omap/dma-omap.h>
23 23  
24 24 #include <plat/omap-secure.h>
25 25  
arch/arm/plat-omap/dma.c
Diff comments   View file @ 2b6c4e7
... ... @@ -37,7 +37,7 @@
37 37 #include <linux/delay.h>
38 38  
39 39 #include <plat/cpu.h>
40   -#include <plat/dma.h>
  40 +#include <plat-omap/dma-omap.h>
41 41 #include <plat/tc.h>
42 42  
43 43 /*
arch/arm/plat-omap/include/plat-omap/dma-omap.h
Diff comments   View file @ 2b6c4e7
  1 +/*
  2 + * OMAP DMA handling defines and function
  3 + *
  4 + * Copyright (C) 2003 Nokia Corporation
  5 + * Author: Juha Yrjรถlรค <juha.yrjola@nokia.com>
  6 + *
  7 + * This program is free software; you can redistribute it and/or modify
  8 + * it under the terms of the GNU General Public License as published by
  9 + * the Free Software Foundation; either version 2 of the License, or
  10 + * (at your option) any later version.
  11 + *
  12 + * This program is distributed in the hope that it will be useful,
  13 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15 + * GNU General Public License for more details.
  16 + *
  17 + * You should have received a copy of the GNU General Public License
  18 + * along with this program; if not, write to the Free Software
  19 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20 + */
  21 +#ifndef __ASM_ARCH_DMA_H
  22 +#define __ASM_ARCH_DMA_H
  23 +
  24 +#include <linux/platform_device.h>
  25 +
  26 +#define INT_DMA_LCD 25
  27 +
  28 +#define OMAP1_DMA_TOUT_IRQ (1 << 0)
  29 +#define OMAP_DMA_DROP_IRQ (1 << 1)
  30 +#define OMAP_DMA_HALF_IRQ (1 << 2)
  31 +#define OMAP_DMA_FRAME_IRQ (1 << 3)
  32 +#define OMAP_DMA_LAST_IRQ (1 << 4)
  33 +#define OMAP_DMA_BLOCK_IRQ (1 << 5)
  34 +#define OMAP1_DMA_SYNC_IRQ (1 << 6)
  35 +#define OMAP2_DMA_PKT_IRQ (1 << 7)
  36 +#define OMAP2_DMA_TRANS_ERR_IRQ (1 << 8)
  37 +#define OMAP2_DMA_SECURE_ERR_IRQ (1 << 9)
  38 +#define OMAP2_DMA_SUPERVISOR_ERR_IRQ (1 << 10)
  39 +#define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11)
  40 +
  41 +#define OMAP_DMA_CCR_EN (1 << 7)
  42 +#define OMAP_DMA_CCR_RD_ACTIVE (1 << 9)
  43 +#define OMAP_DMA_CCR_WR_ACTIVE (1 << 10)
  44 +#define OMAP_DMA_CCR_SEL_SRC_DST_SYNC (1 << 24)
  45 +#define OMAP_DMA_CCR_BUFFERING_DISABLE (1 << 25)
  46 +
  47 +#define OMAP_DMA_DATA_TYPE_S8 0x00
  48 +#define OMAP_DMA_DATA_TYPE_S16 0x01
  49 +#define OMAP_DMA_DATA_TYPE_S32 0x02
  50 +
  51 +#define OMAP_DMA_SYNC_ELEMENT 0x00
  52 +#define OMAP_DMA_SYNC_FRAME 0x01
  53 +#define OMAP_DMA_SYNC_BLOCK 0x02
  54 +#define OMAP_DMA_SYNC_PACKET 0x03
  55 +
  56 +#define OMAP_DMA_DST_SYNC_PREFETCH 0x02
  57 +#define OMAP_DMA_SRC_SYNC 0x01
  58 +#define OMAP_DMA_DST_SYNC 0x00
  59 +
  60 +#define OMAP_DMA_PORT_EMIFF 0x00
  61 +#define OMAP_DMA_PORT_EMIFS 0x01
  62 +#define OMAP_DMA_PORT_OCP_T1 0x02
  63 +#define OMAP_DMA_PORT_TIPB 0x03
  64 +#define OMAP_DMA_PORT_OCP_T2 0x04
  65 +#define OMAP_DMA_PORT_MPUI 0x05
  66 +
  67 +#define OMAP_DMA_AMODE_CONSTANT 0x00
  68 +#define OMAP_DMA_AMODE_POST_INC 0x01
  69 +#define OMAP_DMA_AMODE_SINGLE_IDX 0x02
  70 +#define OMAP_DMA_AMODE_DOUBLE_IDX 0x03
  71 +
  72 +#define DMA_DEFAULT_FIFO_DEPTH 0x10
  73 +#define DMA_DEFAULT_ARB_RATE 0x01
  74 +/* Pass THREAD_RESERVE ORed with THREAD_FIFO for tparams */
  75 +#define DMA_THREAD_RESERVE_NORM (0x00 << 12) /* Def */
  76 +#define DMA_THREAD_RESERVE_ONET (0x01 << 12)
  77 +#define DMA_THREAD_RESERVE_TWOT (0x02 << 12)
  78 +#define DMA_THREAD_RESERVE_THREET (0x03 << 12)
  79 +#define DMA_THREAD_FIFO_NONE (0x00 << 14) /* Def */
  80 +#define DMA_THREAD_FIFO_75 (0x01 << 14)
  81 +#define DMA_THREAD_FIFO_25 (0x02 << 14)
  82 +#define DMA_THREAD_FIFO_50 (0x03 << 14)
  83 +
  84 +/* DMA4_OCP_SYSCONFIG bits */
  85 +#define DMA_SYSCONFIG_MIDLEMODE_MASK (3 << 12)
  86 +#define DMA_SYSCONFIG_CLOCKACTIVITY_MASK (3 << 8)
  87 +#define DMA_SYSCONFIG_EMUFREE (1 << 5)
  88 +#define DMA_SYSCONFIG_SIDLEMODE_MASK (3 << 3)
  89 +#define DMA_SYSCONFIG_SOFTRESET (1 << 2)
  90 +#define DMA_SYSCONFIG_AUTOIDLE (1 << 0)
  91 +
  92 +#define DMA_SYSCONFIG_MIDLEMODE(n) ((n) << 12)
  93 +#define DMA_SYSCONFIG_SIDLEMODE(n) ((n) << 3)
  94 +
  95 +#define DMA_IDLEMODE_SMARTIDLE 0x2
  96 +#define DMA_IDLEMODE_NO_IDLE 0x1
  97 +#define DMA_IDLEMODE_FORCE_IDLE 0x0
  98 +
  99 +/* Chaining modes*/
  100 +#ifndef CONFIG_ARCH_OMAP1
  101 +#define OMAP_DMA_STATIC_CHAIN 0x1
  102 +#define OMAP_DMA_DYNAMIC_CHAIN 0x2
  103 +#define OMAP_DMA_CHAIN_ACTIVE 0x1
  104 +#define OMAP_DMA_CHAIN_INACTIVE 0x0
  105 +#endif
  106 +
  107 +#define DMA_CH_PRIO_HIGH 0x1
  108 +#define DMA_CH_PRIO_LOW 0x0 /* Def */
  109 +
  110 +/* Errata handling */
  111 +#define IS_DMA_ERRATA(id) (errata & (id))
  112 +#define SET_DMA_ERRATA(id) (errata |= (id))
  113 +
  114 +#define DMA_ERRATA_IFRAME_BUFFERING BIT(0x0)
  115 +#define DMA_ERRATA_PARALLEL_CHANNELS BIT(0x1)
  116 +#define DMA_ERRATA_i378 BIT(0x2)
  117 +#define DMA_ERRATA_i541 BIT(0x3)
  118 +#define DMA_ERRATA_i88 BIT(0x4)
  119 +#define DMA_ERRATA_3_3 BIT(0x5)
  120 +#define DMA_ROMCODE_BUG BIT(0x6)
  121 +
  122 +/* Attributes for OMAP DMA Contrller */
  123 +#define DMA_LINKED_LCH BIT(0x0)
  124 +#define GLOBAL_PRIORITY BIT(0x1)
  125 +#define RESERVE_CHANNEL BIT(0x2)
  126 +#define IS_CSSA_32 BIT(0x3)
  127 +#define IS_CDSA_32 BIT(0x4)
  128 +#define IS_RW_PRIORITY BIT(0x5)
  129 +#define ENABLE_1510_MODE BIT(0x6)
  130 +#define SRC_PORT BIT(0x7)
  131 +#define DST_PORT BIT(0x8)
  132 +#define SRC_INDEX BIT(0x9)
  133 +#define DST_INDEX BIT(0xA)
  134 +#define IS_BURST_ONLY4 BIT(0xB)
  135 +#define CLEAR_CSR_ON_READ BIT(0xC)
  136 +#define IS_WORD_16 BIT(0xD)
  137 +
  138 +/* Defines for DMA Capabilities */
  139 +#define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18)
  140 +#define DMA_HAS_CONSTANT_FILL_CAPS (0x1 << 19)
  141 +#define DMA_HAS_DESCRIPTOR_CAPS (0x3 << 20)
  142 +
  143 +enum omap_reg_offsets {
  144 +
  145 +GCR, GSCR, GRST1, HW_ID,
  146 +PCH2_ID, PCH0_ID, PCH1_ID, PCHG_ID,
  147 +PCHD_ID, CAPS_0, CAPS_1, CAPS_2,
  148 +CAPS_3, CAPS_4, PCH2_SR, PCH0_SR,
  149 +PCH1_SR, PCHD_SR, REVISION, IRQSTATUS_L0,
  150 +IRQSTATUS_L1, IRQSTATUS_L2, IRQSTATUS_L3, IRQENABLE_L0,
  151 +IRQENABLE_L1, IRQENABLE_L2, IRQENABLE_L3, SYSSTATUS,
  152 +OCP_SYSCONFIG,
  153 +
  154 +/* omap1+ specific */
  155 +CPC, CCR2, LCH_CTRL,
  156 +
  157 +/* Common registers for all omap's */
  158 +CSDP, CCR, CICR, CSR,
  159 +CEN, CFN, CSFI, CSEI,
  160 +CSAC, CDAC, CDEI,
  161 +CDFI, CLNK_CTRL,
  162 +
  163 +/* Channel specific registers */
  164 +CSSA, CDSA, COLOR,
  165 +CCEN, CCFN,
  166 +
  167 +/* omap3630 and omap4 specific */
  168 +CDP, CNDP, CCDN,
  169 +
  170 +};
  171 +
  172 +enum omap_dma_burst_mode {
  173 + OMAP_DMA_DATA_BURST_DIS = 0,
  174 + OMAP_DMA_DATA_BURST_4,
  175 + OMAP_DMA_DATA_BURST_8,
  176 + OMAP_DMA_DATA_BURST_16,
  177 +};
  178 +
  179 +enum end_type {
  180 + OMAP_DMA_LITTLE_ENDIAN = 0,
  181 + OMAP_DMA_BIG_ENDIAN
  182 +};
  183 +
  184 +enum omap_dma_color_mode {
  185 + OMAP_DMA_COLOR_DIS = 0,
  186 + OMAP_DMA_CONSTANT_FILL,
  187 + OMAP_DMA_TRANSPARENT_COPY
  188 +};
  189 +
  190 +enum omap_dma_write_mode {
  191 + OMAP_DMA_WRITE_NON_POSTED = 0,
  192 + OMAP_DMA_WRITE_POSTED,
  193 + OMAP_DMA_WRITE_LAST_NON_POSTED
  194 +};
  195 +
  196 +enum omap_dma_channel_mode {
  197 + OMAP_DMA_LCH_2D = 0,
  198 + OMAP_DMA_LCH_G,
  199 + OMAP_DMA_LCH_P,
  200 + OMAP_DMA_LCH_PD
  201 +};
  202 +
  203 +struct omap_dma_channel_params {
  204 + int data_type; /* data type 8,16,32 */
  205 + int elem_count; /* number of elements in a frame */
  206 + int frame_count; /* number of frames in a element */
  207 +
  208 + int src_port; /* Only on OMAP1 REVISIT: Is this needed? */
  209 + int src_amode; /* constant, post increment, indexed,
  210 + double indexed */
  211 + unsigned long src_start; /* source address : physical */
  212 + int src_ei; /* source element index */
  213 + int src_fi; /* source frame index */
  214 +
  215 + int dst_port; /* Only on OMAP1 REVISIT: Is this needed? */
  216 + int dst_amode; /* constant, post increment, indexed,
  217 + double indexed */
  218 + unsigned long dst_start; /* source address : physical */
  219 + int dst_ei; /* source element index */
  220 + int dst_fi; /* source frame index */
  221 +
  222 + int trigger; /* trigger attached if the channel is
  223 + synchronized */
  224 + int sync_mode; /* sycn on element, frame , block or packet */
  225 + int src_or_dst_synch; /* source synch(1) or destination synch(0) */
  226 +
  227 + int ie; /* interrupt enabled */
  228 +
  229 + unsigned char read_prio;/* read priority */
  230 + unsigned char write_prio;/* write priority */
  231 +
  232 +#ifndef CONFIG_ARCH_OMAP1
  233 + enum omap_dma_burst_mode burst_mode; /* Burst mode 4/8/16 words */
  234 +#endif
  235 +};
  236 +
  237 +struct omap_dma_lch {
  238 + int next_lch;
  239 + int dev_id;
  240 + u16 saved_csr;
  241 + u16 enabled_irqs;
  242 + const char *dev_name;
  243 + void (*callback)(int lch, u16 ch_status, void *data);
  244 + void *data;
  245 + long flags;
  246 + /* required for Dynamic chaining */
  247 + int prev_linked_ch;
  248 + int next_linked_ch;
  249 + int state;
  250 + int chain_id;
  251 + int status;
  252 +};
  253 +
  254 +struct omap_dma_dev_attr {
  255 + u32 dev_caps;
  256 + u16 lch_count;
  257 + u16 chan_count;
  258 + struct omap_dma_lch *chan;
  259 +};
  260 +
  261 +/* System DMA platform data structure */
  262 +struct omap_system_dma_plat_info {
  263 + struct omap_dma_dev_attr *dma_attr;
  264 + u32 errata;
  265 + void (*disable_irq_lch)(int lch);
  266 + void (*show_dma_caps)(void);
  267 + void (*clear_lch_regs)(int lch);
  268 + void (*clear_dma)(int lch);
  269 + void (*dma_write)(u32 val, int reg, int lch);
  270 + u32 (*dma_read)(int reg, int lch);
  271 +};
  272 +
  273 +extern void __init omap_init_consistent_dma_size(void);
  274 +extern void omap_set_dma_priority(int lch, int dst_port, int priority);
  275 +extern int omap_request_dma(int dev_id, const char *dev_name,
  276 + void (*callback)(int lch, u16 ch_status, void *data),
  277 + void *data, int *dma_ch);
  278 +extern void omap_enable_dma_irq(int ch, u16 irq_bits);
  279 +extern void omap_disable_dma_irq(int ch, u16 irq_bits);
  280 +extern void omap_free_dma(int ch);
  281 +extern void omap_start_dma(int lch);
  282 +extern void omap_stop_dma(int lch);
  283 +extern void omap_set_dma_transfer_params(int lch, int data_type,
  284 + int elem_count, int frame_count,
  285 + int sync_mode,
  286 + int dma_trigger, int src_or_dst_synch);
  287 +extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode,
  288 + u32 color);
  289 +extern void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode);
  290 +extern void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode);
  291 +
  292 +extern void omap_set_dma_src_params(int lch, int src_port, int src_amode,
  293 + unsigned long src_start,
  294 + int src_ei, int src_fi);
  295 +extern void omap_set_dma_src_index(int lch, int eidx, int fidx);
  296 +extern void omap_set_dma_src_data_pack(int lch, int enable);
  297 +extern void omap_set_dma_src_burst_mode(int lch,
  298 + enum omap_dma_burst_mode burst_mode);
  299 +
  300 +extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
  301 + unsigned long dest_start,
  302 + int dst_ei, int dst_fi);
  303 +extern void omap_set_dma_dest_index(int lch, int eidx, int fidx);
  304 +extern void omap_set_dma_dest_data_pack(int lch, int enable);
  305 +extern void omap_set_dma_dest_burst_mode(int lch,
  306 + enum omap_dma_burst_mode burst_mode);
  307 +
  308 +extern void omap_set_dma_params(int lch,
  309 + struct omap_dma_channel_params *params);
  310 +
  311 +extern void omap_dma_link_lch(int lch_head, int lch_queue);
  312 +extern void omap_dma_unlink_lch(int lch_head, int lch_queue);
  313 +
  314 +extern int omap_set_dma_callback(int lch,
  315 + void (*callback)(int lch, u16 ch_status, void *data),
  316 + void *data);
  317 +extern dma_addr_t omap_get_dma_src_pos(int lch);
  318 +extern dma_addr_t omap_get_dma_dst_pos(int lch);
  319 +extern void omap_clear_dma(int lch);
  320 +extern int omap_get_dma_active_status(int lch);
  321 +extern int omap_dma_running(void);
  322 +extern void omap_dma_set_global_params(int arb_rate, int max_fifo_depth,
  323 + int tparams);
  324 +extern int omap_dma_set_prio_lch(int lch, unsigned char read_prio,
  325 + unsigned char write_prio);
  326 +extern void omap_set_dma_dst_endian_type(int lch, enum end_type etype);
  327 +extern void omap_set_dma_src_endian_type(int lch, enum end_type etype);
  328 +extern int omap_get_dma_index(int lch, int *ei, int *fi);
  329 +
  330 +void omap_dma_global_context_save(void);
  331 +void omap_dma_global_context_restore(void);
  332 +
  333 +extern void omap_dma_disable_irq(int lch);
  334 +
  335 +/* Chaining APIs */
  336 +#ifndef CONFIG_ARCH_OMAP1
  337 +extern int omap_request_dma_chain(int dev_id, const char *dev_name,
  338 + void (*callback) (int lch, u16 ch_status,
  339 + void *data),
  340 + int *chain_id, int no_of_chans,
  341 + int chain_mode,
  342 + struct omap_dma_channel_params params);
  343 +extern int omap_free_dma_chain(int chain_id);
  344 +extern int omap_dma_chain_a_transfer(int chain_id, int src_start,
  345 + int dest_start, int elem_count,
  346 + int frame_count, void *callbk_data);
  347 +extern int omap_start_dma_chain_transfers(int chain_id);
  348 +extern int omap_stop_dma_chain_transfers(int chain_id);
  349 +extern int omap_get_dma_chain_index(int chain_id, int *ei, int *fi);
  350 +extern int omap_get_dma_chain_dst_pos(int chain_id);
  351 +extern int omap_get_dma_chain_src_pos(int chain_id);
  352 +
  353 +extern int omap_modify_dma_chain_params(int chain_id,
  354 + struct omap_dma_channel_params params);
  355 +extern int omap_dma_chain_status(int chain_id);
  356 +#endif
  357 +
  358 +#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_FB_OMAP)
  359 +#include <mach/lcd_dma.h>
  360 +#else
  361 +static inline int omap_lcd_dma_running(void)
  362 +{
  363 + return 0;
  364 +}
  365 +#endif
  366 +
  367 +#endif /* __ASM_ARCH_DMA_H */
arch/arm/plat-omap/include/plat/dma.h
View file @ 2b6c4e7
1   -/*
2   - * arch/arm/plat-omap/include/mach/dma.h
3   - *
4   - * Copyright (C) 2003 Nokia Corporation
5   - * Author: Juha Yrjรถlรค <juha.yrjola@nokia.com>
6   - *
7   - * This program is free software; you can redistribute it and/or modify
8   - * it under the terms of the GNU General Public License as published by
9   - * the Free Software Foundation; either version 2 of the License, or
10   - * (at your option) any later version.
11   - *
12   - * This program is distributed in the hope that it will be useful,
13   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
14   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15   - * GNU General Public License for more details.
16   - *
17   - * You should have received a copy of the GNU General Public License
18   - * along with this program; if not, write to the Free Software
19   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20   - */
21   -#ifndef __ASM_ARCH_DMA_H
22   -#define __ASM_ARCH_DMA_H
23   -
24   -#include <linux/platform_device.h>
25   -
26   -#define INT_DMA_LCD 25
27   -
28   -#define OMAP1_DMA_TOUT_IRQ (1 << 0)
29   -#define OMAP_DMA_DROP_IRQ (1 << 1)
30   -#define OMAP_DMA_HALF_IRQ (1 << 2)
31   -#define OMAP_DMA_FRAME_IRQ (1 << 3)
32   -#define OMAP_DMA_LAST_IRQ (1 << 4)
33   -#define OMAP_DMA_BLOCK_IRQ (1 << 5)
34   -#define OMAP1_DMA_SYNC_IRQ (1 << 6)
35   -#define OMAP2_DMA_PKT_IRQ (1 << 7)
36   -#define OMAP2_DMA_TRANS_ERR_IRQ (1 << 8)
37   -#define OMAP2_DMA_SECURE_ERR_IRQ (1 << 9)
38   -#define OMAP2_DMA_SUPERVISOR_ERR_IRQ (1 << 10)
39   -#define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11)
40   -
41   -#define OMAP_DMA_CCR_EN (1 << 7)
42   -#define OMAP_DMA_CCR_RD_ACTIVE (1 << 9)
43   -#define OMAP_DMA_CCR_WR_ACTIVE (1 << 10)
44   -#define OMAP_DMA_CCR_SEL_SRC_DST_SYNC (1 << 24)
45   -#define OMAP_DMA_CCR_BUFFERING_DISABLE (1 << 25)
46   -
47   -#define OMAP_DMA_DATA_TYPE_S8 0x00
48   -#define OMAP_DMA_DATA_TYPE_S16 0x01
49   -#define OMAP_DMA_DATA_TYPE_S32 0x02
50   -
51   -#define OMAP_DMA_SYNC_ELEMENT 0x00
52   -#define OMAP_DMA_SYNC_FRAME 0x01
53   -#define OMAP_DMA_SYNC_BLOCK 0x02
54   -#define OMAP_DMA_SYNC_PACKET 0x03
55   -
56   -#define OMAP_DMA_DST_SYNC_PREFETCH 0x02
57   -#define OMAP_DMA_SRC_SYNC 0x01
58   -#define OMAP_DMA_DST_SYNC 0x00
59   -
60   -#define OMAP_DMA_PORT_EMIFF 0x00
61   -#define OMAP_DMA_PORT_EMIFS 0x01
62   -#define OMAP_DMA_PORT_OCP_T1 0x02
63   -#define OMAP_DMA_PORT_TIPB 0x03
64   -#define OMAP_DMA_PORT_OCP_T2 0x04
65   -#define OMAP_DMA_PORT_MPUI 0x05
66   -
67   -#define OMAP_DMA_AMODE_CONSTANT 0x00
68   -#define OMAP_DMA_AMODE_POST_INC 0x01
69   -#define OMAP_DMA_AMODE_SINGLE_IDX 0x02
70   -#define OMAP_DMA_AMODE_DOUBLE_IDX 0x03
71   -
72   -#define DMA_DEFAULT_FIFO_DEPTH 0x10
73   -#define DMA_DEFAULT_ARB_RATE 0x01
74   -/* Pass THREAD_RESERVE ORed with THREAD_FIFO for tparams */
75   -#define DMA_THREAD_RESERVE_NORM (0x00 << 12) /* Def */
76   -#define DMA_THREAD_RESERVE_ONET (0x01 << 12)
77   -#define DMA_THREAD_RESERVE_TWOT (0x02 << 12)
78   -#define DMA_THREAD_RESERVE_THREET (0x03 << 12)
79   -#define DMA_THREAD_FIFO_NONE (0x00 << 14) /* Def */
80   -#define DMA_THREAD_FIFO_75 (0x01 << 14)
81   -#define DMA_THREAD_FIFO_25 (0x02 << 14)
82   -#define DMA_THREAD_FIFO_50 (0x03 << 14)
83   -
84   -/* DMA4_OCP_SYSCONFIG bits */
85   -#define DMA_SYSCONFIG_MIDLEMODE_MASK (3 << 12)
86   -#define DMA_SYSCONFIG_CLOCKACTIVITY_MASK (3 << 8)
87   -#define DMA_SYSCONFIG_EMUFREE (1 << 5)
88   -#define DMA_SYSCONFIG_SIDLEMODE_MASK (3 << 3)
89   -#define DMA_SYSCONFIG_SOFTRESET (1 << 2)
90   -#define DMA_SYSCONFIG_AUTOIDLE (1 << 0)
91   -
92   -#define DMA_SYSCONFIG_MIDLEMODE(n) ((n) << 12)
93   -#define DMA_SYSCONFIG_SIDLEMODE(n) ((n) << 3)
94   -
95   -#define DMA_IDLEMODE_SMARTIDLE 0x2
96   -#define DMA_IDLEMODE_NO_IDLE 0x1
97   -#define DMA_IDLEMODE_FORCE_IDLE 0x0
98   -
99   -/* Chaining modes*/
100   -#ifndef CONFIG_ARCH_OMAP1
101   -#define OMAP_DMA_STATIC_CHAIN 0x1
102   -#define OMAP_DMA_DYNAMIC_CHAIN 0x2
103   -#define OMAP_DMA_CHAIN_ACTIVE 0x1
104   -#define OMAP_DMA_CHAIN_INACTIVE 0x0
105   -#endif
106   -
107   -#define DMA_CH_PRIO_HIGH 0x1
108   -#define DMA_CH_PRIO_LOW 0x0 /* Def */
109   -
110   -/* Errata handling */
111   -#define IS_DMA_ERRATA(id) (errata & (id))
112   -#define SET_DMA_ERRATA(id) (errata |= (id))
113   -
114   -#define DMA_ERRATA_IFRAME_BUFFERING BIT(0x0)
115   -#define DMA_ERRATA_PARALLEL_CHANNELS BIT(0x1)
116   -#define DMA_ERRATA_i378 BIT(0x2)
117   -#define DMA_ERRATA_i541 BIT(0x3)
118   -#define DMA_ERRATA_i88 BIT(0x4)
119   -#define DMA_ERRATA_3_3 BIT(0x5)
120   -#define DMA_ROMCODE_BUG BIT(0x6)
121   -
122   -/* Attributes for OMAP DMA Contrller */
123   -#define DMA_LINKED_LCH BIT(0x0)
124   -#define GLOBAL_PRIORITY BIT(0x1)
125   -#define RESERVE_CHANNEL BIT(0x2)
126   -#define IS_CSSA_32 BIT(0x3)
127   -#define IS_CDSA_32 BIT(0x4)
128   -#define IS_RW_PRIORITY BIT(0x5)
129   -#define ENABLE_1510_MODE BIT(0x6)
130   -#define SRC_PORT BIT(0x7)
131   -#define DST_PORT BIT(0x8)
132   -#define SRC_INDEX BIT(0x9)
133   -#define DST_INDEX BIT(0xA)
134   -#define IS_BURST_ONLY4 BIT(0xB)
135   -#define CLEAR_CSR_ON_READ BIT(0xC)
136   -#define IS_WORD_16 BIT(0xD)
137   -
138   -/* Defines for DMA Capabilities */
139   -#define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18)
140   -#define DMA_HAS_CONSTANT_FILL_CAPS (0x1 << 19)
141   -#define DMA_HAS_DESCRIPTOR_CAPS (0x3 << 20)
142   -
143   -enum omap_reg_offsets {
144   -
145   -GCR, GSCR, GRST1, HW_ID,
146   -PCH2_ID, PCH0_ID, PCH1_ID, PCHG_ID,
147   -PCHD_ID, CAPS_0, CAPS_1, CAPS_2,
148   -CAPS_3, CAPS_4, PCH2_SR, PCH0_SR,
149   -PCH1_SR, PCHD_SR, REVISION, IRQSTATUS_L0,
150   -IRQSTATUS_L1, IRQSTATUS_L2, IRQSTATUS_L3, IRQENABLE_L0,
151   -IRQENABLE_L1, IRQENABLE_L2, IRQENABLE_L3, SYSSTATUS,
152   -OCP_SYSCONFIG,
153   -
154   -/* omap1+ specific */
155   -CPC, CCR2, LCH_CTRL,
156   -
157   -/* Common registers for all omap's */
158   -CSDP, CCR, CICR, CSR,
159   -CEN, CFN, CSFI, CSEI,
160   -CSAC, CDAC, CDEI,
161   -CDFI, CLNK_CTRL,
162   -
163   -/* Channel specific registers */
164   -CSSA, CDSA, COLOR,
165   -CCEN, CCFN,
166   -
167   -/* omap3630 and omap4 specific */
168   -CDP, CNDP, CCDN,
169   -
170   -};
171   -
172   -enum omap_dma_burst_mode {
173   - OMAP_DMA_DATA_BURST_DIS = 0,
174   - OMAP_DMA_DATA_BURST_4,
175   - OMAP_DMA_DATA_BURST_8,
176   - OMAP_DMA_DATA_BURST_16,
177   -};
178   -
179   -enum end_type {
180   - OMAP_DMA_LITTLE_ENDIAN = 0,
181   - OMAP_DMA_BIG_ENDIAN
182   -};
183   -
184   -enum omap_dma_color_mode {
185   - OMAP_DMA_COLOR_DIS = 0,
186   - OMAP_DMA_CONSTANT_FILL,
187   - OMAP_DMA_TRANSPARENT_COPY
188   -};
189   -
190   -enum omap_dma_write_mode {
191   - OMAP_DMA_WRITE_NON_POSTED = 0,
192   - OMAP_DMA_WRITE_POSTED,
193   - OMAP_DMA_WRITE_LAST_NON_POSTED
194   -};
195   -
196   -enum omap_dma_channel_mode {
197   - OMAP_DMA_LCH_2D = 0,
198   - OMAP_DMA_LCH_G,
199   - OMAP_DMA_LCH_P,
200   - OMAP_DMA_LCH_PD
201   -};
202   -
203   -struct omap_dma_channel_params {
204   - int data_type; /* data type 8,16,32 */
205   - int elem_count; /* number of elements in a frame */
206   - int frame_count; /* number of frames in a element */
207   -
208   - int src_port; /* Only on OMAP1 REVISIT: Is this needed? */
209   - int src_amode; /* constant, post increment, indexed,
210   - double indexed */
211   - unsigned long src_start; /* source address : physical */
212   - int src_ei; /* source element index */
213   - int src_fi; /* source frame index */
214   -
215   - int dst_port; /* Only on OMAP1 REVISIT: Is this needed? */
216   - int dst_amode; /* constant, post increment, indexed,
217   - double indexed */
218   - unsigned long dst_start; /* source address : physical */
219   - int dst_ei; /* source element index */
220   - int dst_fi; /* source frame index */
221   -
222   - int trigger; /* trigger attached if the channel is
223   - synchronized */
224   - int sync_mode; /* sycn on element, frame , block or packet */
225   - int src_or_dst_synch; /* source synch(1) or destination synch(0) */
226   -
227   - int ie; /* interrupt enabled */
228   -
229   - unsigned char read_prio;/* read priority */
230   - unsigned char write_prio;/* write priority */
231   -
232   -#ifndef CONFIG_ARCH_OMAP1
233   - enum omap_dma_burst_mode burst_mode; /* Burst mode 4/8/16 words */
234   -#endif
235   -};
236   -
237   -struct omap_dma_lch {
238   - int next_lch;
239   - int dev_id;
240   - u16 saved_csr;
241   - u16 enabled_irqs;
242   - const char *dev_name;
243   - void (*callback)(int lch, u16 ch_status, void *data);
244   - void *data;
245   - long flags;
246   - /* required for Dynamic chaining */
247   - int prev_linked_ch;
248   - int next_linked_ch;
249   - int state;
250   - int chain_id;
251   - int status;
252   -};
253   -
254   -struct omap_dma_dev_attr {
255   - u32 dev_caps;
256   - u16 lch_count;
257   - u16 chan_count;
258   - struct omap_dma_lch *chan;
259   -};
260   -
261   -/* System DMA platform data structure */
262   -struct omap_system_dma_plat_info {
263   - struct omap_dma_dev_attr *dma_attr;
264   - u32 errata;
265   - void (*disable_irq_lch)(int lch);
266   - void (*show_dma_caps)(void);
267   - void (*clear_lch_regs)(int lch);
268   - void (*clear_dma)(int lch);
269   - void (*dma_write)(u32 val, int reg, int lch);
270   - u32 (*dma_read)(int reg, int lch);
271   -};
272   -
273   -extern void __init omap_init_consistent_dma_size(void);
274   -extern void omap_set_dma_priority(int lch, int dst_port, int priority);
275   -extern int omap_request_dma(int dev_id, const char *dev_name,
276   - void (*callback)(int lch, u16 ch_status, void *data),
277   - void *data, int *dma_ch);
278   -extern void omap_enable_dma_irq(int ch, u16 irq_bits);
279   -extern void omap_disable_dma_irq(int ch, u16 irq_bits);
280   -extern void omap_free_dma(int ch);
281   -extern void omap_start_dma(int lch);
282   -extern void omap_stop_dma(int lch);
283   -extern void omap_set_dma_transfer_params(int lch, int data_type,
284   - int elem_count, int frame_count,
285   - int sync_mode,
286   - int dma_trigger, int src_or_dst_synch);
287   -extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode,
288   - u32 color);
289   -extern void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode);
290   -extern void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode);
291   -
292   -extern void omap_set_dma_src_params(int lch, int src_port, int src_amode,
293   - unsigned long src_start,
294   - int src_ei, int src_fi);
295   -extern void omap_set_dma_src_index(int lch, int eidx, int fidx);
296   -extern void omap_set_dma_src_data_pack(int lch, int enable);
297   -extern void omap_set_dma_src_burst_mode(int lch,
298   - enum omap_dma_burst_mode burst_mode);
299   -
300   -extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
301   - unsigned long dest_start,
302   - int dst_ei, int dst_fi);
303   -extern void omap_set_dma_dest_index(int lch, int eidx, int fidx);
304   -extern void omap_set_dma_dest_data_pack(int lch, int enable);
305   -extern void omap_set_dma_dest_burst_mode(int lch,
306   - enum omap_dma_burst_mode burst_mode);
307   -
308   -extern void omap_set_dma_params(int lch,
309   - struct omap_dma_channel_params *params);
310   -
311   -extern void omap_dma_link_lch(int lch_head, int lch_queue);
312   -extern void omap_dma_unlink_lch(int lch_head, int lch_queue);
313   -
314   -extern int omap_set_dma_callback(int lch,
315   - void (*callback)(int lch, u16 ch_status, void *data),
316   - void *data);
317   -extern dma_addr_t omap_get_dma_src_pos(int lch);
318   -extern dma_addr_t omap_get_dma_dst_pos(int lch);
319   -extern void omap_clear_dma(int lch);
320   -extern int omap_get_dma_active_status(int lch);
321   -extern int omap_dma_running(void);
322   -extern void omap_dma_set_global_params(int arb_rate, int max_fifo_depth,
323   - int tparams);
324   -extern int omap_dma_set_prio_lch(int lch, unsigned char read_prio,
325   - unsigned char write_prio);
326   -extern void omap_set_dma_dst_endian_type(int lch, enum end_type etype);
327   -extern void omap_set_dma_src_endian_type(int lch, enum end_type etype);
328   -extern int omap_get_dma_index(int lch, int *ei, int *fi);
329   -
330   -void omap_dma_global_context_save(void);
331   -void omap_dma_global_context_restore(void);
332   -
333   -extern void omap_dma_disable_irq(int lch);
334   -
335   -/* Chaining APIs */
336   -#ifndef CONFIG_ARCH_OMAP1
337   -extern int omap_request_dma_chain(int dev_id, const char *dev_name,
338   - void (*callback) (int lch, u16 ch_status,
339   - void *data),
340   - int *chain_id, int no_of_chans,
341   - int chain_mode,
342   - struct omap_dma_channel_params params);
343   -extern int omap_free_dma_chain(int chain_id);
344   -extern int omap_dma_chain_a_transfer(int chain_id, int src_start,
345   - int dest_start, int elem_count,
346   - int frame_count, void *callbk_data);
347   -extern int omap_start_dma_chain_transfers(int chain_id);
348   -extern int omap_stop_dma_chain_transfers(int chain_id);
349   -extern int omap_get_dma_chain_index(int chain_id, int *ei, int *fi);
350   -extern int omap_get_dma_chain_dst_pos(int chain_id);
351   -extern int omap_get_dma_chain_src_pos(int chain_id);
352   -
353   -extern int omap_modify_dma_chain_params(int chain_id,
354   - struct omap_dma_channel_params params);
355   -extern int omap_dma_chain_status(int chain_id);
356   -#endif
357   -
358   -#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_FB_OMAP)
359   -#include <mach/lcd_dma.h>
360   -#else
361   -static inline int omap_lcd_dma_running(void)
362   -{
363   - return 0;
364   -}
365   -#endif
366   -
367   -#endif /* __ASM_ARCH_DMA_H */
drivers/crypto/omap-aes.c
Diff comments   View file @ 2b6c4e7
... ... @@ -30,7 +30,7 @@
30 30 #include <crypto/aes.h>
31 31  
32 32 #include <plat/cpu.h>
33   -#include <plat/dma.h>
  33 +#include <plat-omap/dma-omap.h>
34 34  
35 35 /* OMAP TRM gives bitfields as start:end, where start is the higher bit
36 36 number. For example 7:0 */
drivers/crypto/omap-sham.c
Diff comments   View file @ 2b6c4e7
... ... @@ -38,7 +38,7 @@
38 38 #include <crypto/internal/hash.h>
39 39  
40 40 #include <plat/cpu.h>
41   -#include <plat/dma.h>
  41 +#include <plat-omap/dma-omap.h>
42 42 #include <mach/irqs.h>
43 43  
44 44 #define SHA_REG_DIGEST(x) (0x00 + ((x) * 0x04))
drivers/dma/omap-dma.c
Diff comments   View file @ 2b6c4e7
... ... @@ -20,7 +20,7 @@
20 20 #include "virt-dma.h"
21 21  
22 22 #include <plat/cpu.h>
23   -#include <plat/dma.h>
  23 +#include <plat-omap/dma-omap.h>
24 24  
25 25 struct omap_dmadev {
26 26 struct dma_device ddev;
drivers/media/platform/omap/omap_vout.c
Diff comments   View file @ 2b6c4e7
... ... @@ -45,7 +45,7 @@
45 45 #include <media/v4l2-ioctl.h>
46 46  
47 47 #include <plat/cpu.h>
48   -#include <plat/dma.h>
  48 +#include <plat-omap/dma-omap.h>
49 49 #include <plat/vrfb.h>
50 50 #include <video/omapdss.h>
51 51  
drivers/media/platform/omap/omap_vout_vrfb.c
Diff comments   View file @ 2b6c4e7
... ... @@ -16,7 +16,7 @@
16 16 #include <media/videobuf-dma-contig.h>
17 17 #include <media/v4l2-device.h>
18 18  
19   -#include <plat/dma.h>
  19 +#include <plat-omap/dma-omap.h>
20 20 #include <plat/vrfb.h>
21 21  
22 22 #include "omap_voutdef.h"
drivers/media/platform/omap3isp/ispstat.h
Diff comments   View file @ 2b6c4e7
... ... @@ -30,7 +30,7 @@
30 30  
31 31 #include <linux/types.h>
32 32 #include <linux/omap3isp.h>
33   -#include <plat/dma.h>
  33 +#include <plat-omap/dma-omap.h>
34 34 #include <media/v4l2-event.h>
35 35  
36 36 #include "isp.h"
drivers/media/platform/soc_camera/omap1_camera.c
Diff comments   View file @ 2b6c4e7
... ... @@ -34,7 +34,7 @@
34 34 #include <media/videobuf-dma-contig.h>
35 35 #include <media/videobuf-dma-sg.h>
36 36  
37   -#include <plat/dma.h>
  37 +#include <plat-omap/dma-omap.h>
38 38  
39 39  
40 40 #define DRIVER_NAME "omap1-camera"
drivers/mmc/host/omap.c
Diff comments   View file @ 2b6c4e7
... ... @@ -30,7 +30,7 @@
30 30 #include <linux/slab.h>
31 31  
32 32 #include <plat/mmc.h>
33   -#include <plat/dma.h>
  33 +#include <plat-omap/dma-omap.h>
34 34  
35 35 #define OMAP_MMC_REG_CMD 0x00
36 36 #define OMAP_MMC_REG_ARGL 0x01
drivers/mtd/nand/omap2.c
Diff comments   View file @ 2b6c4e7
... ... @@ -27,7 +27,7 @@
27 27 #include <linux/bch.h>
28 28 #endif
29 29  
30   -#include <plat/dma.h>
  30 +#include <plat-omap/dma-omap.h>
31 31 #include <plat/gpmc.h>
32 32 #include <linux/platform_data/mtd-nand-omap2.h>
33 33  
drivers/mtd/onenand/omap2.c
Diff comments   View file @ 2b6c4e7
... ... @@ -42,7 +42,7 @@
42 42 #include <linux/platform_data/mtd-onenand-omap2.h>
43 43 #include <asm/gpio.h>
44 44  
45   -#include <plat/dma.h>
  45 +#include <plat-omap/dma-omap.h>
46 46 #include <plat/cpu.h>
47 47  
48 48 #define DRIVER_NAME "omap2-onenand"
drivers/usb/gadget/omap_udc.c
Diff comments   View file @ 2b6c4e7
... ... @@ -44,7 +44,7 @@
44 44 #include <asm/unaligned.h>
45 45 #include <asm/mach-types.h>
46 46  
47   -#include <plat/dma.h>
  47 +#include <plat-omap/dma-omap.h>
48 48  
49 49 #include <mach/usb.h>
50 50  
drivers/usb/musb/tusb6010_omap.c
Diff comments   View file @ 2b6c4e7
... ... @@ -16,7 +16,7 @@
16 16 #include <linux/platform_device.h>
17 17 #include <linux/dma-mapping.h>
18 18 #include <linux/slab.h>
19   -#include <plat/dma.h>
  19 +#include <plat-omap/dma-omap.h>
20 20  
21 21 #include "musb_core.h"
22 22 #include "tusb6010.h"
drivers/video/omap/lcdc.c
Diff comments   View file @ 2b6c4e7
... ... @@ -31,7 +31,7 @@
31 31 #include <linux/gfp.h>
32 32  
33 33 #include <mach/lcdc.h>
34   -#include <plat/dma.h>
  34 +#include <plat-omap/dma-omap.h>
35 35  
36 36 #include <asm/mach-types.h>
37 37  
drivers/video/omap/omapfb_main.c
Diff comments   View file @ 2b6c4e7
... ... @@ -30,7 +30,7 @@
30 30 #include <linux/uaccess.h>
31 31 #include <linux/module.h>
32 32  
33   -#include <plat/dma.h>
  33 +#include <plat-omap/dma-omap.h>
34 34  
35 35 #include "omapfb.h"
36 36 #include "lcdc.h"
drivers/video/omap/sossi.c
Diff comments   View file @ 2b6c4e7
... ... @@ -25,7 +25,7 @@
25 25 #include <linux/io.h>
26 26 #include <linux/interrupt.h>
27 27  
28   -#include <plat/dma.h>
  28 +#include <plat-omap/dma-omap.h>
29 29  
30 30 #include "omapfb.h"
31 31 #include "lcdc.h"