Commit 2bfa7482224903097a50c14a4389a29f56e19c3b
1 parent
ef5ced4bfe
Exists in
master
and in
6 other branches
drm/nv40/pm: fix issues on igp chipsets, which don't have memory
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Showing 1 changed file with 15 additions and 5 deletions Side-by-side Diff
drivers/gpu/drm/nouveau/nv40_pm.c
| ... | ... | @@ -57,12 +57,14 @@ |
| 57 | 57 | int P = (ctrl & 0x00070000) >> 16; |
| 58 | 58 | u32 ref = 27000, clk = 0; |
| 59 | 59 | |
| 60 | - if (ctrl & 0x80000000) | |
| 60 | + if ((ctrl & 0x80000000) && M1) { | |
| 61 | 61 | clk = ref * N1 / M1; |
| 62 | - | |
| 63 | - if (!(ctrl & 0x00000100)) { | |
| 64 | - if (ctrl & 0x40000000) | |
| 65 | - clk = clk * N2 / M2; | |
| 62 | + if ((ctrl & 0x40000100) == 0x40000000) { | |
| 63 | + if (M2) | |
| 64 | + clk = clk * N2 / M2; | |
| 65 | + else | |
| 66 | + clk = 0; | |
| 67 | + } | |
| 66 | 68 | } |
| 67 | 69 | |
| 68 | 70 | return clk >> P; |
| ... | ... | @@ -177,6 +179,11 @@ |
| 177 | 179 | } |
| 178 | 180 | |
| 179 | 181 | /* memory clock */ |
| 182 | + if (!perflvl->memory) { | |
| 183 | + info->mpll_ctrl = 0x00000000; | |
| 184 | + goto out; | |
| 185 | + } | |
| 186 | + | |
| 180 | 187 | ret = nv40_calc_pll(dev, 0x004020, &pll, perflvl->memory, |
| 181 | 188 | &N1, &M1, &N2, &M2, &log2P); |
| 182 | 189 | if (ret < 0) |
| ... | ... | @@ -263,6 +270,9 @@ |
| 263 | 270 | nv_mask(dev, 0x004008, 0xc007ffff, info->spll); |
| 264 | 271 | mdelay(5); |
| 265 | 272 | nv_mask(dev, 0x00c040, 0x00000333, info->ctrl); |
| 273 | + | |
| 274 | + if (!info->mpll_ctrl) | |
| 275 | + goto resume; | |
| 266 | 276 | |
| 267 | 277 | /* wait for vblank start on active crtcs, disable memory access */ |
| 268 | 278 | for (i = 0; i < 2; i++) { |