ACPI / LPSS: Add support for exposing LTR registers to user space

Devices on the Intel Lynxpoint Low Power Subsystem (LPSS) have registers providing access to LTR (Latency Tolerance Reporting) functionality that allows software to monitor and possibly influence the aggressiveness of the platform's active-state power management. For each LPSS device, there are two modes of operation related to LTR, the auto mode and the software mode. In the auto mode the LTR is set up by the platform firmware and managed by hardware. Software can only read the LTR register values to monitor the platform's behavior. In the software mode it is possible to use LTR to control the extent to which the platform will use its built-in power management features. This changeset adds support for reading the LPSS devices' LTR registers and exposing their values to user space for monitoring and diagnostics purposes. It re-uses the MMIO mappings created to access the LPSS devices' clock registers for reading the values of the LTR registers and exposes them to user space through sysfs device attributes. Namely, a new atrribute group, lpss_ltr, is created for each LPSS device. It contains three new attributes: ltr_mode, auto_ltr, sw_ltr. The value of the ltr_mode attribute reflects the LTR mode being used at the moment (software vs auto) and the other two contain the actual register values (raw) whose meaning depends on the LTR mode. All of these attributes are read-only. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

ACPI / LPSS: Add support for exposing LTR registers to user space
Devices on the Intel Lynxpoint Low Power Subsystem (LPSS) have registers providing access to LTR (Latency Tolerance Reporting) functionality that allows software to monitor and possibly influence the aggressiveness of the platform's active-state power management. For each LPSS device, there are two modes of operation related to LTR, the auto mode and the software mode. In the auto mode the LTR is set up by the platform firmware and managed by hardware. Software can only read the LTR register values to monitor the platform's behavior. In the software mode it is possible to use LTR to control the extent to which the platform will use its built-in power management features. This changeset adds support for reading the LPSS devices' LTR registers and exposing their values to user space for monitoring and diagnostics purposes. It re-uses the MMIO mappings created to access the LPSS devices' clock registers for reading the values of the LTR registers and exposes them to user space through sysfs device attributes. Namely, a new atrribute group, lpss_ltr, is created for each LPSS device. It contains three new attributes: ltr_mode, auto_ltr, sw_ltr. The value of the ltr_mode attribute reflects the LTR mode being used at the moment (software vs auto) and the other two contain the actual register values (raw) whose meaning depends on the LTR mode. All of these attributes are read-only. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Rafael J. Wysocki
1 parent f58b082aed
Showing 2 changed files with 178 additions and 5 deletions Side-by-side Diff
Documentation/ABI/testing/sysfs-devices-lpss_ltr
drivers/acpi/acpi_lpss.c
+What:		/sys/devices/.../lpss_ltr/
+Date:		March 2013
+Contact:	Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Description:
+		The /sys/devices/.../lpss_ltr/ directory is only present for
+		devices included into the Intel Lynxpoint Low Power Subsystem
+		(LPSS).  If present, it contains attributes containing the LTR
+		mode and the values of LTR registers of the device.
+
+What:		/sys/devices/.../lpss_ltr/ltr_mode
+Date:		March 2013
+Contact:	Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Description:
+		The /sys/devices/.../lpss_ltr/ltr_mode attribute contains an
+		integer number (0 or 1) indicating whether or not the devices'
+		LTR functionality is working in the software mode (1).
+
+		This attribute is read-only.  If the device's runtime PM status
+		is not "active", attempts to read from this attribute cause
+		-EAGAIN to be returned.
+
+What:		/sys/devices/.../lpss_ltr/auto_ltr
+Date:		March 2013
+Contact:	Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Description:
+		The /sys/devices/.../lpss_ltr/auto_ltr attribute contains the
+		current value of the device's AUTO_LTR register (raw)
+		represented as an 8-digit hexadecimal number.
+
+		This attribute is read-only.  If the device's runtime PM status
+		is not "active", attempts to read from this attribute cause
+		-EAGAIN to be returned.
+
+What:		/sys/devices/.../lpss_ltr/sw_ltr
+Date:		March 2013
+Contact:	Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Description:
+		The /sys/devices/.../lpss_ltr/auto_ltr attribute contains the
+		current value of the device's SW_LTR register (raw) represented
+		as an 8-digit hexadecimal number.
+
+		This attribute is read-only.  If the device's runtime PM status
+		is not "active", attempts to read from this attribute cause
+		-EAGAIN to be returned.
@@ -18,17 +18,26 @@
 #include <linux/io.h>
 #include <linux/platform_device.h>
 #include <linux/platform_data/clk-lpss.h>
+#include <linux/pm_runtime.h>
  
 #include "internal.h"
  
 ACPI_MODULE_NAME("acpi_lpss");
  
-#define LPSS_CLK_OFFSET 0x800
 #define LPSS_CLK_SIZE	0x04
+#define LPSS_LTR_SIZE	0x18
  
+/* Offsets relative to LPSS_PRIVATE_OFFSET */
+#define LPSS_GENERAL			0x08
+#define LPSS_GENERAL_LTR_MODE_SW	BIT(2)
+#define LPSS_SW_LTR			0x10
+#define LPSS_AUTO_LTR			0x14
+
 struct lpss_device_desc {
 	bool clk_required;
 	const char *clk_parent;
+	bool ltr_required;
+	unsigned int prv_offset;
 };
  
 struct lpss_private_data {
  
@@ -41,8 +50,15 @@
 static struct lpss_device_desc lpt_dev_desc = {
 	.clk_required = true,
 	.clk_parent = "lpss_clk",
+	.prv_offset = 0x800,
+	.ltr_required = true,
 };
  
+static struct lpss_device_desc lpt_sdio_dev_desc = {
+	.prv_offset = 0x1000,
+	.ltr_required = true,
+};
+
 static const struct acpi_device_id acpi_lpss_device_ids[] = {
 	/* Lynxpoint LPSS devices */
 	{ "INT33C0", (unsigned long)&lpt_dev_desc },
@@ -51,7 +67,7 @@
 	{ "INT33C3", (unsigned long)&lpt_dev_desc },
 	{ "INT33C4", (unsigned long)&lpt_dev_desc },
 	{ "INT33C5", (unsigned long)&lpt_dev_desc },
-	{ "INT33C6", },
+	{ "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
 	{ "INT33C7", },
  
 	{ }
  
@@ -80,12 +96,12 @@
 		lpt_register_clock_device();
  
 	if (!dev_desc->clk_parent || !pdata->mmio_base
-	    || pdata->mmio_size < LPSS_CLK_OFFSET + LPSS_CLK_SIZE)
+	    || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
 		return -ENODATA;
  
 	pdata->clk = clk_register_gate(NULL, dev_name(&adev->dev),
 				       dev_desc->clk_parent, 0,
-				       pdata->mmio_base + LPSS_CLK_OFFSET,
+				       pdata->mmio_base + dev_desc->prv_offset,
 				       0, 0, NULL);
 	if (IS_ERR(pdata->clk))
 		return PTR_ERR(pdata->clk);
@@ -151,6 +167,117 @@
 	return ret;
 }
  
+static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
+{
+	struct acpi_device *adev;
+	struct lpss_private_data *pdata;
+	unsigned long flags;
+	int ret;
+
+	ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
+	if (WARN_ON(ret))
+		return ret;
+
+	spin_lock_irqsave(&dev->power.lock, flags);
+	if (pm_runtime_suspended(dev)) {
+		ret = -EAGAIN;
+		goto out;
+	}
+	pdata = acpi_driver_data(adev);
+	if (WARN_ON(!pdata || !pdata->mmio_base)) {
+		ret = -ENODEV;
+		goto out;
+	}
+	*val = readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
+
+ out:
+	spin_unlock_irqrestore(&dev->power.lock, flags);
+	return ret;
+}
+
+static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
+			     char *buf)
+{
+	u32 ltr_value = 0;
+	unsigned int reg;
+	int ret;
+
+	reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
+	ret = lpss_reg_read(dev, reg, &ltr_value);
+	if (ret)
+		return ret;
+
+	return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
+}
+
+static ssize_t lpss_ltr_mode_show(struct device *dev,
+				  struct device_attribute *attr, char *buf)
+{
+	u32 ltr_mode = 0;
+	char *outstr;
+	int ret;
+
+	ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
+	if (ret)
+		return ret;
+
+	outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
+	return sprintf(buf, "%s\n", outstr);
+}
+
+static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
+static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
+static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
+
+static struct attribute *lpss_attrs[] = {
+	&dev_attr_auto_ltr.attr,
+	&dev_attr_sw_ltr.attr,
+	&dev_attr_ltr_mode.attr,
+	NULL,
+};
+
+static struct attribute_group lpss_attr_group = {
+	.attrs = lpss_attrs,
+	.name = "lpss_ltr",
+};
+
+static int acpi_lpss_platform_notify(struct notifier_block *nb,
+				     unsigned long action, void *data)
+{
+	struct platform_device *pdev = to_platform_device(data);
+	struct lpss_private_data *pdata;
+	struct acpi_device *adev;
+	const struct acpi_device_id *id;
+	int ret = 0;
+
+	id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
+	if (!id || !id->driver_data)
+		return 0;
+
+	if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
+		return 0;
+
+	pdata = acpi_driver_data(adev);
+	if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
+		return 0;
+
+	if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
+		dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
+		return 0;
+	}
+
+	if (action == BUS_NOTIFY_ADD_DEVICE)
+		ret = sysfs_create_group(&pdev->dev.kobj, &lpss_attr_group);
+	else if (action == BUS_NOTIFY_DEL_DEVICE)
+		sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
+
+	return ret;
+}
+
+static struct notifier_block acpi_lpss_nb = {
+	.notifier_call = acpi_lpss_platform_notify,
+};
+
 static struct acpi_scan_handler lpss_handler = {
 	.ids = acpi_lpss_device_ids,
 	.attach = acpi_lpss_create_device,
  
@@ -158,7 +285,9 @@
  
 void __init acpi_lpss_init(void)
 {
-	if (!lpt_clk_init())
+	if (!lpt_clk_init()) {
+		bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
 		acpi_scan_add_handler(&lpss_handler);
+	}
 }
	1	+What: /sys/devices/.../lpss_ltr/
	2	+Date: March 2013
	3	+Contact: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
	4	+Description:
	5	+ The /sys/devices/.../lpss_ltr/ directory is only present for
	6	+ devices included into the Intel Lynxpoint Low Power Subsystem
	7	+ (LPSS). If present, it contains attributes containing the LTR
	8	+ mode and the values of LTR registers of the device.
	9	+
	10	+What: /sys/devices/.../lpss_ltr/ltr_mode
	11	+Date: March 2013
	12	+Contact: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
	13	+Description:
	14	+ The /sys/devices/.../lpss_ltr/ltr_mode attribute contains an
	15	+ integer number (0 or 1) indicating whether or not the devices'
	16	+ LTR functionality is working in the software mode (1).
	17	+
	18	+ This attribute is read-only. If the device's runtime PM status
	19	+ is not "active", attempts to read from this attribute cause
	20	+ -EAGAIN to be returned.
	21	+
	22	+What: /sys/devices/.../lpss_ltr/auto_ltr
	23	+Date: March 2013
	24	+Contact: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
	25	+Description:
	26	+ The /sys/devices/.../lpss_ltr/auto_ltr attribute contains the
	27	+ current value of the device's AUTO_LTR register (raw)
	28	+ represented as an 8-digit hexadecimal number.
	29	+
	30	+ This attribute is read-only. If the device's runtime PM status
	31	+ is not "active", attempts to read from this attribute cause
	32	+ -EAGAIN to be returned.
	33	+
	34	+What: /sys/devices/.../lpss_ltr/sw_ltr
	35	+Date: March 2013
	36	+Contact: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
	37	+Description:
	38	+ The /sys/devices/.../lpss_ltr/auto_ltr attribute contains the
	39	+ current value of the device's SW_LTR register (raw) represented
	40	+ as an 8-digit hexadecimal number.
	41	+
	42	+ This attribute is read-only. If the device's runtime PM status
	43	+ is not "active", attempts to read from this attribute cause
	44	+ -EAGAIN to be returned.
...	...	@@ -18,17 +18,26 @@
18	18	#include <linux/io.h>
19	19	#include <linux/platform_device.h>
20	20	#include <linux/platform_data/clk-lpss.h>
	21	+#include <linux/pm_runtime.h>
21	22
22	23	#include "internal.h"
23	24
24	25	ACPI_MODULE_NAME("acpi_lpss");
25	26
26		-#define LPSS_CLK_OFFSET 0x800
27	27	#define LPSS_CLK_SIZE 0x04
	28	+#define LPSS_LTR_SIZE 0x18
28	29
	30	+/* Offsets relative to LPSS_PRIVATE_OFFSET */
	31	+#define LPSS_GENERAL 0x08
	32	+#define LPSS_GENERAL_LTR_MODE_SW BIT(2)
	33	+#define LPSS_SW_LTR 0x10
	34	+#define LPSS_AUTO_LTR 0x14
	35	+
29	36	struct lpss_device_desc {
30	37	bool clk_required;
31	38	const char *clk_parent;
	39	+ bool ltr_required;
	40	+ unsigned int prv_offset;
32	41	};
33	42
34	43	struct lpss_private_data {
35	44
...	...	@@ -41,8 +50,15 @@
41	50	static struct lpss_device_desc lpt_dev_desc = {
42	51	.clk_required = true,
43	52	.clk_parent = "lpss_clk",
	53	+ .prv_offset = 0x800,
	54	+ .ltr_required = true,
44	55	};
45	56
	57	+static struct lpss_device_desc lpt_sdio_dev_desc = {
	58	+ .prv_offset = 0x1000,
	59	+ .ltr_required = true,
	60	+};
	61	+
46	62	static const struct acpi_device_id acpi_lpss_device_ids[] = {
47	63	/* Lynxpoint LPSS devices */
48	64	{ "INT33C0", (unsigned long)&lpt_dev_desc },
...	...	@@ -51,7 +67,7 @@
51	67	{ "INT33C3", (unsigned long)&lpt_dev_desc },
52	68	{ "INT33C4", (unsigned long)&lpt_dev_desc },
53	69	{ "INT33C5", (unsigned long)&lpt_dev_desc },
54		- { "INT33C6", },
	70	+ { "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
55	71	{ "INT33C7", },
56	72
57	73	{ }
58	74
...	...	@@ -80,12 +96,12 @@
80	96	lpt_register_clock_device();
81	97
82	98	if (!dev_desc->clk_parent \|\| !pdata->mmio_base
83		- \|\| pdata->mmio_size < LPSS_CLK_OFFSET + LPSS_CLK_SIZE)
	99	+ \|\| pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
84	100	return -ENODATA;
85	101
86	102	pdata->clk = clk_register_gate(NULL, dev_name(&adev->dev),
87	103	dev_desc->clk_parent, 0,
88		- pdata->mmio_base + LPSS_CLK_OFFSET,
	104	+ pdata->mmio_base + dev_desc->prv_offset,
89	105	0, 0, NULL);
90	106	if (IS_ERR(pdata->clk))
91	107	return PTR_ERR(pdata->clk);
...	...	@@ -151,6 +167,117 @@
151	167	return ret;
152	168	}
153	169
	170	+static int lpss_reg_read(struct device dev, unsigned int reg, u32 val)
	171	+{
	172	+ struct acpi_device *adev;
	173	+ struct lpss_private_data *pdata;
	174	+ unsigned long flags;
	175	+ int ret;
	176	+
	177	+ ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
	178	+ if (WARN_ON(ret))
	179	+ return ret;
	180	+
	181	+ spin_lock_irqsave(&dev->power.lock, flags);
	182	+ if (pm_runtime_suspended(dev)) {
	183	+ ret = -EAGAIN;
	184	+ goto out;
	185	+ }
	186	+ pdata = acpi_driver_data(adev);
	187	+ if (WARN_ON(!pdata \|\| !pdata->mmio_base)) {
	188	+ ret = -ENODEV;
	189	+ goto out;
	190	+ }
	191	+ *val = readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
	192	+
	193	+ out:
	194	+ spin_unlock_irqrestore(&dev->power.lock, flags);
	195	+ return ret;
	196	+}
	197	+
	198	+static ssize_t lpss_ltr_show(struct device dev, struct device_attribute attr,
	199	+ char *buf)
	200	+{
	201	+ u32 ltr_value = 0;
	202	+ unsigned int reg;
	203	+ int ret;
	204	+
	205	+ reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
	206	+ ret = lpss_reg_read(dev, reg, &ltr_value);
	207	+ if (ret)
	208	+ return ret;
	209	+
	210	+ return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
	211	+}
	212	+
	213	+static ssize_t lpss_ltr_mode_show(struct device *dev,
	214	+ struct device_attribute attr, char buf)
	215	+{
	216	+ u32 ltr_mode = 0;
	217	+ char *outstr;
	218	+ int ret;
	219	+
	220	+ ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
	221	+ if (ret)
	222	+ return ret;
	223	+
	224	+ outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
	225	+ return sprintf(buf, "%s\n", outstr);
	226	+}
	227	+
	228	+static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
	229	+static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
	230	+static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
	231	+
	232	+static struct attribute *lpss_attrs[] = {
	233	+ &dev_attr_auto_ltr.attr,
	234	+ &dev_attr_sw_ltr.attr,
	235	+ &dev_attr_ltr_mode.attr,
	236	+ NULL,
	237	+};
	238	+
	239	+static struct attribute_group lpss_attr_group = {
	240	+ .attrs = lpss_attrs,
	241	+ .name = "lpss_ltr",
	242	+};
	243	+
	244	+static int acpi_lpss_platform_notify(struct notifier_block *nb,
	245	+ unsigned long action, void *data)
	246	+{
	247	+ struct platform_device *pdev = to_platform_device(data);
	248	+ struct lpss_private_data *pdata;
	249	+ struct acpi_device *adev;
	250	+ const struct acpi_device_id *id;
	251	+ int ret = 0;
	252	+
	253	+ id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
	254	+ if (!id \|\| !id->driver_data)
	255	+ return 0;
	256	+
	257	+ if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
	258	+ return 0;
	259	+
	260	+ pdata = acpi_driver_data(adev);
	261	+ if (!pdata \|\| !pdata->mmio_base \|\| !pdata->dev_desc->ltr_required)
	262	+ return 0;
	263	+
	264	+ if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
	265	+ dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
	266	+ return 0;
	267	+ }
	268	+
	269	+ if (action == BUS_NOTIFY_ADD_DEVICE)
	270	+ ret = sysfs_create_group(&pdev->dev.kobj, &lpss_attr_group);
	271	+ else if (action == BUS_NOTIFY_DEL_DEVICE)
	272	+ sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
	273	+
	274	+ return ret;
	275	+}
	276	+
	277	+static struct notifier_block acpi_lpss_nb = {
	278	+ .notifier_call = acpi_lpss_platform_notify,
	279	+};
	280	+
154	281	static struct acpi_scan_handler lpss_handler = {
155	282	.ids = acpi_lpss_device_ids,
156	283	.attach = acpi_lpss_create_device,
157	284
...	...	@@ -158,7 +285,9 @@
158	285
159	286	void __init acpi_lpss_init(void)
160	287	{
161		- if (!lpt_clk_init())
	288	+ if (!lpt_clk_init()) {
	289	+ bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
162	290	acpi_scan_add_handler(&lpss_handler);
	291	+ }
163	292	}