Commit 2fd46f47be0f96be700053d6caa8dcb14453a520
Committed by
Ralf Baechle
1 parent
f353a218de
Exists in
smarc-l5.0.0_1.0.0-ga
and in
5 other branches
netdev: mdio-octeon.c: Convert to use device tree.
Get the MDIO bus controller addresses from the device tree, small clean up in use of devm_* Remove, now unused, platform device setup code. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: David S. Miller <davem@davemloft.net> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3938/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Showing 2 changed files with 58 additions and 64 deletions Side-by-side Diff
arch/mips/cavium-octeon/octeon-platform.c
... | ... | @@ -168,36 +168,6 @@ |
168 | 168 | } |
169 | 169 | device_initcall(octeon_rng_device_init); |
170 | 170 | |
171 | -/* Octeon SMI/MDIO interface. */ | |
172 | -static int __init octeon_mdiobus_device_init(void) | |
173 | -{ | |
174 | - struct platform_device *pd; | |
175 | - int ret = 0; | |
176 | - | |
177 | - if (octeon_is_simulation()) | |
178 | - return 0; /* No mdio in the simulator. */ | |
179 | - | |
180 | - /* The bus number is the platform_device id. */ | |
181 | - pd = platform_device_alloc("mdio-octeon", 0); | |
182 | - if (!pd) { | |
183 | - ret = -ENOMEM; | |
184 | - goto out; | |
185 | - } | |
186 | - | |
187 | - ret = platform_device_add(pd); | |
188 | - if (ret) | |
189 | - goto fail; | |
190 | - | |
191 | - return ret; | |
192 | -fail: | |
193 | - platform_device_put(pd); | |
194 | - | |
195 | -out: | |
196 | - return ret; | |
197 | - | |
198 | -} | |
199 | -device_initcall(octeon_mdiobus_device_init); | |
200 | - | |
201 | 171 | /* Octeon mgmt port Ethernet interface. */ |
202 | 172 | static int __init octeon_mgmt_device_init(void) |
203 | 173 | { |
drivers/net/phy/mdio-octeon.c
... | ... | @@ -3,14 +3,17 @@ |
3 | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | 4 | * for more details. |
5 | 5 | * |
6 | - * Copyright (C) 2009 Cavium Networks | |
6 | + * Copyright (C) 2009,2011 Cavium, Inc. | |
7 | 7 | */ |
8 | 8 | |
9 | -#include <linux/gfp.h> | |
10 | -#include <linux/init.h> | |
11 | -#include <linux/module.h> | |
12 | 9 | #include <linux/platform_device.h> |
10 | +#include <linux/of_mdio.h> | |
11 | +#include <linux/delay.h> | |
12 | +#include <linux/module.h> | |
13 | +#include <linux/init.h> | |
14 | +#include <linux/gfp.h> | |
13 | 15 | #include <linux/phy.h> |
16 | +#include <linux/io.h> | |
14 | 17 | |
15 | 18 | #include <asm/octeon/octeon.h> |
16 | 19 | #include <asm/octeon/cvmx-smix-defs.h> |
17 | 20 | |
... | ... | @@ -18,9 +21,17 @@ |
18 | 21 | #define DRV_VERSION "1.0" |
19 | 22 | #define DRV_DESCRIPTION "Cavium Networks Octeon SMI/MDIO driver" |
20 | 23 | |
24 | +#define SMI_CMD 0x0 | |
25 | +#define SMI_WR_DAT 0x8 | |
26 | +#define SMI_RD_DAT 0x10 | |
27 | +#define SMI_CLK 0x18 | |
28 | +#define SMI_EN 0x20 | |
29 | + | |
21 | 30 | struct octeon_mdiobus { |
22 | 31 | struct mii_bus *mii_bus; |
23 | - int unit; | |
32 | + u64 register_base; | |
33 | + resource_size_t mdio_phys; | |
34 | + resource_size_t regsize; | |
24 | 35 | int phy_irq[PHY_MAX_ADDR]; |
25 | 36 | }; |
26 | 37 | |
27 | 38 | |
... | ... | @@ -35,15 +46,15 @@ |
35 | 46 | smi_cmd.s.phy_op = 1; /* MDIO_CLAUSE_22_READ */ |
36 | 47 | smi_cmd.s.phy_adr = phy_id; |
37 | 48 | smi_cmd.s.reg_adr = regnum; |
38 | - cvmx_write_csr(CVMX_SMIX_CMD(p->unit), smi_cmd.u64); | |
49 | + cvmx_write_csr(p->register_base + SMI_CMD, smi_cmd.u64); | |
39 | 50 | |
40 | 51 | do { |
41 | 52 | /* |
42 | 53 | * Wait 1000 clocks so we don't saturate the RSL bus |
43 | 54 | * doing reads. |
44 | 55 | */ |
45 | - cvmx_wait(1000); | |
46 | - smi_rd.u64 = cvmx_read_csr(CVMX_SMIX_RD_DAT(p->unit)); | |
56 | + __delay(1000); | |
57 | + smi_rd.u64 = cvmx_read_csr(p->register_base + SMI_RD_DAT); | |
47 | 58 | } while (smi_rd.s.pending && --timeout); |
48 | 59 | |
49 | 60 | if (smi_rd.s.val) |
50 | 61 | |
51 | 62 | |
... | ... | @@ -62,21 +73,21 @@ |
62 | 73 | |
63 | 74 | smi_wr.u64 = 0; |
64 | 75 | smi_wr.s.dat = val; |
65 | - cvmx_write_csr(CVMX_SMIX_WR_DAT(p->unit), smi_wr.u64); | |
76 | + cvmx_write_csr(p->register_base + SMI_WR_DAT, smi_wr.u64); | |
66 | 77 | |
67 | 78 | smi_cmd.u64 = 0; |
68 | 79 | smi_cmd.s.phy_op = 0; /* MDIO_CLAUSE_22_WRITE */ |
69 | 80 | smi_cmd.s.phy_adr = phy_id; |
70 | 81 | smi_cmd.s.reg_adr = regnum; |
71 | - cvmx_write_csr(CVMX_SMIX_CMD(p->unit), smi_cmd.u64); | |
82 | + cvmx_write_csr(p->register_base + SMI_CMD, smi_cmd.u64); | |
72 | 83 | |
73 | 84 | do { |
74 | 85 | /* |
75 | 86 | * Wait 1000 clocks so we don't saturate the RSL bus |
76 | 87 | * doing reads. |
77 | 88 | */ |
78 | - cvmx_wait(1000); | |
79 | - smi_wr.u64 = cvmx_read_csr(CVMX_SMIX_WR_DAT(p->unit)); | |
89 | + __delay(1000); | |
90 | + smi_wr.u64 = cvmx_read_csr(p->register_base + SMI_WR_DAT); | |
80 | 91 | } while (smi_wr.s.pending && --timeout); |
81 | 92 | |
82 | 93 | if (timeout <= 0) |
83 | 94 | |
84 | 95 | |
85 | 96 | |
86 | 97 | |
87 | 98 | |
88 | 99 | |
89 | 100 | |
... | ... | @@ -88,38 +99,44 @@ |
88 | 99 | static int __devinit octeon_mdiobus_probe(struct platform_device *pdev) |
89 | 100 | { |
90 | 101 | struct octeon_mdiobus *bus; |
102 | + struct resource *res_mem; | |
91 | 103 | union cvmx_smix_en smi_en; |
92 | - int i; | |
93 | 104 | int err = -ENOENT; |
94 | 105 | |
95 | 106 | bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL); |
96 | 107 | if (!bus) |
97 | 108 | return -ENOMEM; |
98 | 109 | |
99 | - /* The platform_device id is our unit number. */ | |
100 | - bus->unit = pdev->id; | |
110 | + res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
101 | 111 | |
112 | + if (res_mem == NULL) { | |
113 | + dev_err(&pdev->dev, "found no memory resource\n"); | |
114 | + err = -ENXIO; | |
115 | + goto fail; | |
116 | + } | |
117 | + bus->mdio_phys = res_mem->start; | |
118 | + bus->regsize = resource_size(res_mem); | |
119 | + if (!devm_request_mem_region(&pdev->dev, bus->mdio_phys, bus->regsize, | |
120 | + res_mem->name)) { | |
121 | + dev_err(&pdev->dev, "request_mem_region failed\n"); | |
122 | + goto fail; | |
123 | + } | |
124 | + bus->register_base = | |
125 | + (u64)devm_ioremap(&pdev->dev, bus->mdio_phys, bus->regsize); | |
126 | + | |
102 | 127 | bus->mii_bus = mdiobus_alloc(); |
103 | 128 | |
104 | 129 | if (!bus->mii_bus) |
105 | - goto err; | |
130 | + goto fail; | |
106 | 131 | |
107 | 132 | smi_en.u64 = 0; |
108 | 133 | smi_en.s.en = 1; |
109 | - cvmx_write_csr(CVMX_SMIX_EN(bus->unit), smi_en.u64); | |
134 | + cvmx_write_csr(bus->register_base + SMI_EN, smi_en.u64); | |
110 | 135 | |
111 | - /* | |
112 | - * Standard Octeon evaluation boards don't support phy | |
113 | - * interrupts, we need to poll. | |
114 | - */ | |
115 | - for (i = 0; i < PHY_MAX_ADDR; i++) | |
116 | - bus->phy_irq[i] = PHY_POLL; | |
117 | - | |
118 | 136 | bus->mii_bus->priv = bus; |
119 | 137 | bus->mii_bus->irq = bus->phy_irq; |
120 | 138 | bus->mii_bus->name = "mdio-octeon"; |
121 | - snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", | |
122 | - bus->mii_bus->name, bus->unit); | |
139 | + snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%llx", bus->register_base); | |
123 | 140 | bus->mii_bus->parent = &pdev->dev; |
124 | 141 | |
125 | 142 | bus->mii_bus->read = octeon_mdiobus_read; |
126 | 143 | |
127 | 144 | |
128 | 145 | |
129 | 146 | |
... | ... | @@ -127,20 +144,18 @@ |
127 | 144 | |
128 | 145 | dev_set_drvdata(&pdev->dev, bus); |
129 | 146 | |
130 | - err = mdiobus_register(bus->mii_bus); | |
147 | + err = of_mdiobus_register(bus->mii_bus, pdev->dev.of_node); | |
131 | 148 | if (err) |
132 | - goto err_register; | |
149 | + goto fail_register; | |
133 | 150 | |
134 | 151 | dev_info(&pdev->dev, "Version " DRV_VERSION "\n"); |
135 | 152 | |
136 | 153 | return 0; |
137 | -err_register: | |
154 | +fail_register: | |
138 | 155 | mdiobus_free(bus->mii_bus); |
139 | - | |
140 | -err: | |
141 | - devm_kfree(&pdev->dev, bus); | |
156 | +fail: | |
142 | 157 | smi_en.u64 = 0; |
143 | - cvmx_write_csr(CVMX_SMIX_EN(bus->unit), smi_en.u64); | |
158 | + cvmx_write_csr(bus->register_base + SMI_EN, smi_en.u64); | |
144 | 159 | return err; |
145 | 160 | } |
146 | 161 | |
147 | 162 | |
148 | 163 | |
... | ... | @@ -154,14 +169,23 @@ |
154 | 169 | mdiobus_unregister(bus->mii_bus); |
155 | 170 | mdiobus_free(bus->mii_bus); |
156 | 171 | smi_en.u64 = 0; |
157 | - cvmx_write_csr(CVMX_SMIX_EN(bus->unit), smi_en.u64); | |
172 | + cvmx_write_csr(bus->register_base + SMI_EN, smi_en.u64); | |
158 | 173 | return 0; |
159 | 174 | } |
160 | 175 | |
176 | +static struct of_device_id octeon_mdiobus_match[] = { | |
177 | + { | |
178 | + .compatible = "cavium,octeon-3860-mdio", | |
179 | + }, | |
180 | + {}, | |
181 | +}; | |
182 | +MODULE_DEVICE_TABLE(of, octeon_mdiobus_match); | |
183 | + | |
161 | 184 | static struct platform_driver octeon_mdiobus_driver = { |
162 | 185 | .driver = { |
163 | 186 | .name = "mdio-octeon", |
164 | 187 | .owner = THIS_MODULE, |
188 | + .of_match_table = octeon_mdiobus_match, | |
165 | 189 | }, |
166 | 190 | .probe = octeon_mdiobus_probe, |
167 | 191 | .remove = __devexit_p(octeon_mdiobus_remove), |