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Commit 304b2c684e42af5b72d643322f783d88538dc817

Authored by Alexander Shiyan
Committed by Arnd Bergmann
1 parent 69964ea4c7
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

ARM: clps711x: Using a single definition for the PHYS and VIRT registers offset 

Using a single definition for the physical and virtual address register for all
variants boards clps711x. This patch also includes the use of a single function
clps_read/write in some units.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Showing 14 changed files with 34 additions and 85 deletions Side-by-side Diff

arch/arm/include/asm/hardware/clps7111.h
Diff comments   View file @ 304b2c6
... ... @@ -23,16 +23,7 @@
23 23 #ifndef __ASM_HARDWARE_CLPS7111_H
24 24 #define __ASM_HARDWARE_CLPS7111_H
25 25  
26   -#define CLPS7111_PHYS_BASE (0x80000000)
27   -
28   -#ifndef __ASSEMBLY__
29   -#define clps_readb(off) __raw_readb(CLPS7111_BASE + (off))
30   -#define clps_readw(off) __raw_readw(CLPS7111_BASE + (off))
31   -#define clps_readl(off) __raw_readl(CLPS7111_BASE + (off))
32   -#define clps_writeb(val,off) __raw_writeb(val, CLPS7111_BASE + (off))
33   -#define clps_writew(val,off) __raw_writew(val, CLPS7111_BASE + (off))
34   -#define clps_writel(val,off) __raw_writel(val, CLPS7111_BASE + (off))
35   -#endif
  26 +#define CLPS711X_PHYS_BASE (0x80000000)
36 27  
37 28 #define PADR (0x0000)
38 29 #define PBDR (0x0001)
arch/arm/include/asm/hardware/ep7211.h
Diff comments   View file @ 304b2c6
... ... @@ -23,15 +23,6 @@
23 23 #ifndef __ASM_HARDWARE_EP7211_H
24 24 #define __ASM_HARDWARE_EP7211_H
25 25  
26   -#include <asm/hardware/clps7111.h>
27   -
28   -/*
29   - * define EP7211_BASE to be the base address of the region
30   - * you want to access.
31   - */
32   -
33   -#define EP7211_PHYS_BASE (0x80000000)
34   -
35 26 /*
36 27 * XXX miket@bluemug.com: need to introduce EP7211 registers (those not
37 28 * present in 7212) here.
arch/arm/include/asm/hardware/ep7212.h
Diff comments   View file @ 304b2c6
... ... @@ -24,18 +24,6 @@
24 24 #define __ASM_HARDWARE_EP7212_H
25 25  
26 26 /*
27   - * define EP7212_BASE to be the base address of the region
28   - * you want to access.
29   - */
30   -
31   -#define EP7212_PHYS_BASE (0x80000000)
32   -
33   -#ifndef __ASSEMBLY__
34   -#define ep_readl(off) __raw_readl(EP7212_BASE + (off))
35   -#define ep_writel(val,off) __raw_writel(val, EP7212_BASE + (off))
36   -#endif
37   -
38   -/*
39 27 * These registers are specific to the EP7212 only
40 28 */
41 29 #define DAIR 0x2000
arch/arm/mach-clps711x/common.c
Diff comments   View file @ 304b2c6
... ... @@ -36,7 +36,6 @@
36 36 #include <asm/page.h>
37 37 #include <asm/mach/map.h>
38 38 #include <asm/mach/time.h>
39   -#include <asm/hardware/clps7111.h>
40 39 #include <asm/system_misc.h>
41 40  
42 41 /*
... ... @@ -44,8 +43,8 @@
44 43 */
45 44 static struct map_desc clps711x_io_desc[] __initdata = {
46 45 {
47   - .virtual = CLPS7111_VIRT_BASE,
48   - .pfn = __phys_to_pfn(CLPS7111_PHYS_BASE),
  46 + .virtual = (unsigned long)CLPS711X_VIRT_BASE,
  47 + .pfn = __phys_to_pfn(CLPS711X_PHYS_BASE),
49 48 .length = SZ_1M,
50 49 .type = MT_DEVICE
51 50 }
arch/arm/mach-clps711x/include/mach/debug-macro.S
Diff comments   View file @ 304b2c6
... ... @@ -12,7 +12,6 @@
12 12 */
13 13  
14 14 #include <mach/hardware.h>
15   -#include <asm/hardware/clps7111.h>
16 15  
17 16 .macro addruart, rp, rv, tmp
18 17 #ifndef CONFIG_DEBUG_CLPS711X_UART2
... ... @@ -20,8 +19,8 @@
20 19 #else
21 20 mov \rp, #0x1000 @ UART2
22 21 #endif
23   - orr \rv, \rp, #CLPS7111_VIRT_BASE
24   - orr \rp, \rp, #CLPS7111_PHYS_BASE
  22 + orr \rv, \rp, #CLPS711X_VIRT_BASE
  23 + orr \rp, \rp, #CLPS711X_PHYS_BASE
25 24 .endm
26 25  
27 26 .macro senduart,rd,rx
arch/arm/mach-clps711x/include/mach/entry-macro.S
Diff comments   View file @ 304b2c6
... ... @@ -8,7 +8,6 @@
8 8 * warranty of any kind, whether express or implied.
9 9 */
10 10 #include <mach/hardware.h>
11   -#include <asm/hardware/clps7111.h>
12 11  
13 12 .macro get_irqnr_preamble, base, tmp
14 13 .endm
... ... @@ -18,7 +17,7 @@
18 17 #endif
19 18  
20 19 .macro get_irqnr_and_base, irqnr, stat, base, mask
21   - mov \base, #CLPS7111_BASE
  20 + mov \base, #CLPS711X_VIRT_BASE
22 21 ldr \stat, [\base, #INTSR1]
23 22 ldr \mask, [\base, #INTMR1]
24 23 mov \irqnr, #4
arch/arm/mach-clps711x/include/mach/hardware.h
Diff comments   View file @ 304b2c6
... ... @@ -19,13 +19,22 @@
19 19 * along with this program; if not, write to the Free Software
20 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 21 */
22   -#ifndef __ASM_ARCH_HARDWARE_H
23   -#define __ASM_ARCH_HARDWARE_H
  22 +#ifndef __MACH_HARDWARE_H
  23 +#define __MACH_HARDWARE_H
24 24  
  25 +#include <asm/hardware/clps7111.h>
25 26  
26   -#define CLPS7111_VIRT_BASE 0xff000000
27   -#define CLPS7111_BASE CLPS7111_VIRT_BASE
  27 +#define CLPS711X_VIRT_BASE IOMEM(0xff000000)
28 28  
  29 +#ifndef __ASSEMBLY__
  30 +#define clps_readb(off) readb(CLPS711X_VIRT_BASE + (off))
  31 +#define clps_readw(off) readw(CLPS711X_VIRT_BASE + (off))
  32 +#define clps_readl(off) readl(CLPS711X_VIRT_BASE + (off))
  33 +#define clps_writeb(val,off) writeb(val, CLPS711X_VIRT_BASE + (off))
  34 +#define clps_writew(val,off) writew(val, CLPS711X_VIRT_BASE + (off))
  35 +#define clps_writel(val,off) writel(val, CLPS711X_VIRT_BASE + (off))
  36 +#endif
  37 +
29 38 /*
30 39 * The physical addresses that the external chip select signals map to is
31 40 * dependent on the setting of the nMEDCHG signal on EP7211 and EP7212
32 41  
... ... @@ -54,14 +63,10 @@
54 63  
55 64 #if defined (CONFIG_ARCH_EP7211)
56 65  
57   -#define EP7211_VIRT_BASE CLPS7111_VIRT_BASE
58   -#define EP7211_BASE CLPS7111_VIRT_BASE
59 66 #include <asm/hardware/ep7211.h>
60 67  
61 68 #elif defined (CONFIG_ARCH_EP7212)
62 69  
63   -#define EP7212_VIRT_BASE CLPS7111_VIRT_BASE
64   -#define EP7212_BASE CLPS7111_VIRT_BASE
65 70 #include <asm/hardware/ep7212.h>
66 71  
67 72 #endif
... ... @@ -71,10 +76,6 @@
71 76  
72 77 #if defined (CONFIG_ARCH_AUTCPU12)
73 78  
74   -#define CS89712_VIRT_BASE CLPS7111_VIRT_BASE
75   -#define CS89712_BASE CLPS7111_VIRT_BASE
76   -
77   -#include <asm/hardware/clps7111.h>
78 79 #include <asm/hardware/ep7212.h>
79 80 #include <asm/hardware/cs89712.h>
80 81  
81 82  
... ... @@ -83,15 +84,9 @@
83 84  
84 85 #if defined (CONFIG_ARCH_CDB89712)
85 86  
86   -#include <asm/hardware/clps7111.h>
87 87 #include <asm/hardware/ep7212.h>
88 88 #include <asm/hardware/cs89712.h>
89 89  
90   -/* static cdb89712_map_io() areas */
91   -#define REGISTER_START 0x80000000
92   -#define REGISTER_SIZE 0x4000
93   -#define REGISTER_BASE 0xff000000
94   -
95 90 #define ETHER_START 0x20000000
96 91 #define ETHER_SIZE 0x1000
97 92 #define ETHER_BASE 0xfe000000
98 93  
... ... @@ -154,12 +149,7 @@
154 149  
155 150 #if defined (CONFIG_ARCH_CEIVA)
156 151  
157   -#define CEIVA_VIRT_BASE CLPS7111_VIRT_BASE
158   -#define CEIVA_BASE CLPS7111_VIRT_BASE
159   -
160   -#include <asm/hardware/clps7111.h>
161 152 #include <asm/hardware/ep7212.h>
162   -
163 153  
164 154 /*
165 155 * The two flash banks are wired to chip selects 0 and 1. This is the mapping
arch/arm/mach-clps711x/include/mach/time.h
Diff comments   View file @ 304b2c6
... ... @@ -18,7 +18,7 @@
18 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 19 */
20 20 #include <asm/leds.h>
21   -#include <asm/hardware/clps7111.h>
  21 +#include <mach/hardware.h>
22 22  
23 23 extern void clps711x_setup_timer(void);
24 24  
arch/arm/mach-clps711x/include/mach/uncompress.h
Diff comments   View file @ 304b2c6
... ... @@ -17,15 +17,8 @@
17 17 * along with this program; if not, write to the Free Software
18 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 19 */
20   -#include <mach/hardware.h>
21 20 #include <asm/hardware/clps7111.h>
22 21  
23   -#undef CLPS7111_BASE
24   -#define CLPS7111_BASE CLPS7111_PHYS_BASE
25   -
26   -#define __raw_readl(p) (*(unsigned long *)(p))
27   -#define __raw_writel(v,p) (*(unsigned long *)(p) = (v))
28   -
29 22 #ifdef CONFIG_DEBUG_CLPS711X_UART2
30 23 #define SYSFLGx SYSFLG2
31 24 #define UARTDRx UARTDR2
32 25  
33 26  
34 27  
35 28  
... ... @@ -34,19 +27,25 @@
34 27 #define UARTDRx UARTDR1
35 28 #endif
36 29  
  30 +#define phys_reg(x) (*(volatile u32 *)(CLPS711X_PHYS_BASE + (x)))
  31 +
37 32 /*
  33 + * The following code assumes the serial port has already been
  34 + * initialized by the bootloader. If you didn't setup a port in
  35 + * your bootloader then nothing will appear (which might be desired).
  36 + *
38 37 * This does not append a newline
39 38 */
40 39 static inline void putc(int c)
41 40 {
42   - while (clps_readl(SYSFLGx) & SYSFLG_UTXFF)
  41 + while (phys_reg(SYSFLGx) & SYSFLG_UTXFF)
43 42 barrier();
44   - clps_writel(c, UARTDRx);
  43 + phys_reg(UARTDRx) = c;
45 44 }
46 45  
47 46 static inline void flush(void)
48 47 {
49   - while (clps_readl(SYSFLGx) & SYSFLG_UBUSY)
  48 + while (phys_reg(SYSFLGx) & SYSFLG_UBUSY)
50 49 barrier();
51 50 }
52 51  
arch/arm/mach-clps711x/p720t-leds.c
Diff comments   View file @ 304b2c6
... ... @@ -27,9 +27,6 @@
27 27 #include <asm/leds.h>
28 28 #include <asm/mach-types.h>
29 29  
30   -#include <asm/hardware/clps7111.h>
31   -#include <asm/hardware/ep7212.h>
32   -
33 30 static void p720t_leds_event(led_event_t ledevt)
34 31 {
35 32 unsigned long flags;
drivers/mtd/nand/autcpu12.c
Diff comments   View file @ 304b2c6
... ... @@ -102,10 +102,10 @@
102 102 void __iomem *addr;
103 103 unsigned char bits;
104 104  
105   - addr = CS89712_VIRT_BASE + AUTCPU12_SMC_PORT_OFFSET;
106   - bits = (ctrl & NAND_CLE) << 4;
  105 + bits = clps_readb(AUTCPU12_SMC_PORT_OFFSET) & ~0x30;
  106 + bits |= (ctrl & NAND_CLE) << 4;
107 107 bits |= (ctrl & NAND_ALE) << 2;
108   - writeb((readb(addr) & ~0x30) | bits, addr);
  108 + clps_writeb(bits, AUTCPU12_SMC_PORT_OFFSET);
109 109  
110 110 addr = autcpu12_fio_base + AUTCPU12_SMC_SELECT_OFFSET;
111 111 writeb((readb(addr) & ~0x1) | (ctrl & NAND_NCE), addr);
... ... @@ -120,9 +120,7 @@
120 120 */
121 121 int autcpu12_device_ready(struct mtd_info *mtd)
122 122 {
123   - void __iomem *addr = CS89712_VIRT_BASE + AUTCPU12_SMC_PORT_OFFSET;
124   -
125   - return readb(addr) & AUTCPU12_SMC_RDY;
  123 + return clps_readb(AUTCPU12_SMC_PORT_OFFSET) & AUTCPU12_SMC_RDY;
126 124 }
127 125  
128 126 /*
drivers/mtd/nand/h1910.c
Diff comments   View file @ 304b2c6
... ... @@ -24,7 +24,7 @@
24 24 #include <linux/mtd/nand.h>
25 25 #include <linux/mtd/partitions.h>
26 26 #include <asm/io.h>
27   -#include <mach/hardware.h> /* for CLPS7111_VIRT_BASE */
  27 +#include <mach/hardware.h>
28 28 #include <asm/sizes.h>
29 29 #include <mach/h1900-gpio.h>
30 30 #include <mach/ipaq.h>
drivers/tty/serial/clps711x.c
Diff comments   View file @ 304b2c6
... ... @@ -40,7 +40,6 @@
40 40  
41 41 #include <mach/hardware.h>
42 42 #include <asm/irq.h>
43   -#include <asm/hardware/clps7111.h>
44 43  
45 44 #define UART_NR 2
46 45  
drivers/video/clps711xfb.c
Diff comments   View file @ 304b2c6
... ... @@ -33,7 +33,6 @@
33 33 #include <asm/mach-types.h>
34 34 #include <linux/uaccess.h>
35 35  
36   -#include <asm/hardware/clps7111.h>
37 36 #include <mach/syspld.h>
38 37  
39 38 struct fb_info *cfb;