ARM: davinci: convert to common sched_clock() implementation

Davinci has its own sched_clock() implementation, which gets in the way of a single zImage. Moving to the common sched_clock framework makes the code slightly cleaner. Acked-by: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

ARM: davinci: convert to common sched_clock() implementation
Davinci has its own sched_clock() implementation, which gets in the way of a single zImage. Moving to the common sched_clock framework makes the code slightly cleaner. Acked-by: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Marc Zyngier
1 parent 5d0ef6ae63
Showing 2 changed files with 8 additions and 17 deletions Side-by-side Diff
arch/arm/Kconfig
arch/arm/mach-davinci/time.c
@@ -932,6 +932,7 @@
 	select ARCH_REQUIRE_GPIOLIB
 	select ZONE_DMA
 	select HAVE_IDE
+	select HAVE_SCHED_CLOCK
 	select CLKDEV_LOOKUP
 	select GENERIC_ALLOCATOR
 	select GENERIC_IRQ_CHIP
@@ -19,6 +19,7 @@
 #include <linux/err.h>
 #include <linux/platform_device.h>
  
+#include <asm/sched_clock.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
  
  
@@ -274,19 +275,9 @@
 	return (cycles_t)timer32_read(t);
 }
  
-/*
- * Kernel assumes that sched_clock can be called early but may not have
- * things ready yet.
- */
-static cycle_t read_dummy(struct clocksource *cs)
-{
-	return 0;
-}
-
-
 static struct clocksource clocksource_davinci = {
 	.rating		= 300,
-	.read		= read_dummy,
+	.read		= read_cycles,
 	.mask		= CLOCKSOURCE_MASK(32),
 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
 };
  
@@ -294,12 +285,9 @@
 /*
  * Overwrite weak default sched_clock with something more precise
  */
-unsigned long long notrace sched_clock(void)
+static u32 notrace davinci_read_sched_clock(void)
 {
-	const cycle_t cyc = clocksource_davinci.read(&clocksource_davinci);
-
-	return clocksource_cyc2ns(cyc, clocksource_davinci.mult,
-				clocksource_davinci.shift);
+	return timer32_read(&timers[TID_CLOCKSOURCE]);
 }
  
 /*
  
@@ -399,11 +387,13 @@
 	davinci_clock_tick_rate = clk_get_rate(timer_clk);
  
 	/* setup clocksource */
-	clocksource_davinci.read = read_cycles;
 	clocksource_davinci.name = id_to_name[clocksource_id];
 	if (clocksource_register_hz(&clocksource_davinci,
 				    davinci_clock_tick_rate))
 		printk(err, clocksource_davinci.name);
+
+	setup_sched_clock(davinci_read_sched_clock, 32,
+			  davinci_clock_tick_rate);
  
 	/* setup clockevent */
 	clockevent_davinci.name = id_to_name[timers[TID_CLOCKEVENT].id];
...	...	@@ -932,6 +932,7 @@
932	932	select ARCH_REQUIRE_GPIOLIB
933	933	select ZONE_DMA
934	934	select HAVE_IDE
	935	+ select HAVE_SCHED_CLOCK
935	936	select CLKDEV_LOOKUP
936	937	select GENERIC_ALLOCATOR
937	938	select GENERIC_IRQ_CHIP
...	...	@@ -19,6 +19,7 @@
19	19	#include <linux/err.h>
20	20	#include <linux/platform_device.h>
21	21
	22	+#include <asm/sched_clock.h>
22	23	#include <asm/mach/irq.h>
23	24	#include <asm/mach/time.h>
24	25
25	26
...	...	@@ -274,19 +275,9 @@
274	275	return (cycles_t)timer32_read(t);
275	276	}
276	277
277		-/*
278		- * Kernel assumes that sched_clock can be called early but may not have
279		- * things ready yet.
280		- */
281		-static cycle_t read_dummy(struct clocksource *cs)
282		-{
283		- return 0;
284		-}
285		-
286		-
287	278	static struct clocksource clocksource_davinci = {
288	279	.rating = 300,
289		- .read = read_dummy,
	280	+ .read = read_cycles,
290	281	.mask = CLOCKSOURCE_MASK(32),
291	282	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
292	283	};
293	284
...	...	@@ -294,12 +285,9 @@
294	285	/*
295	286	* Overwrite weak default sched_clock with something more precise
296	287	*/
297		-unsigned long long notrace sched_clock(void)
	288	+static u32 notrace davinci_read_sched_clock(void)
298	289	{
299		- const cycle_t cyc = clocksource_davinci.read(&clocksource_davinci);
300		-
301		- return clocksource_cyc2ns(cyc, clocksource_davinci.mult,
302		- clocksource_davinci.shift);
	290	+ return timer32_read(&timers[TID_CLOCKSOURCE]);
303	291	}
304	292
305	293	/*
306	294
...	...	@@ -399,11 +387,13 @@
399	387	davinci_clock_tick_rate = clk_get_rate(timer_clk);
400	388
401	389	/* setup clocksource */
402		- clocksource_davinci.read = read_cycles;
403	390	clocksource_davinci.name = id_to_name[clocksource_id];
404	391	if (clocksource_register_hz(&clocksource_davinci,
405	392	davinci_clock_tick_rate))
406	393	printk(err, clocksource_davinci.name);
	394	+
	395	+ setup_sched_clock(davinci_read_sched_clock, 32,
	396	+ davinci_clock_tick_rate);
407	397
408	398	/* setup clockevent */
409	399	clockevent_davinci.name = id_to_name[timers[TID_CLOCKEVENT].id];