Commit 37820108f395032e850e400139d956561a043c26
Exists in
smarc-l5.0.0_1.0.0-ga
and in
5 other branches
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM soc fixes from Olof Johansson: "A set of fixes and some minor cleanups for -rc2: - A series from Arnd that fixes warnings in drivers and other code included by ARM defconfigs. Most have been acked by corresponding maintainers (and seem quite hard to argue not picking up anyway in the few exception cases). - A few misc patches from the list for integrator/vt8500/i.MX - A batch of fixes to OMAP platforms, fixing: - boot problems on beaglebone, - regression fixes for local timers - clockdomain locking fixes - a few boot/sparse warnings - For Tegra: - Clock rate calculation overflow fix - Revert a change that removed timer clocks and a fix for symbol name clashes - For Renesas: - IO accessor / annotation cleanups to remove warnings - For Kirkwood/Dove/mvebu: - Fixes for device trees for Dove (some minor cleanups, some fixes) - Fixes for the mvebu gpio driver - Fix build problem for Feroceon due to missing ifdefs - Fix lsxl DTS files" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits) ARM: kirkwood: fix buttons on lsxl boards ARM: kirkwood: fix LEDs names for lsxl boards ARM: Kirkwood: fix disabling CACHE_FEROCEON_L2 gpio: mvebu: Add missing breaks in mvebu_gpio_irq_set_type ARM: dove: Add crypto engine to DT ARM: dove: Remove watchdog from DT ARM: dove: Restructure SoC device tree descriptor ARM: dove: Fix clock names of sata and gbe ARM: dove: Fix tauros2 device tree init ARM: dove: Add pcie clock support ARM: OMAP2+: Allow kernel to boot even if GPMC fails to reserve memory ARM: OMAP: clockdomain: Fix locking on _clkdm_clk_hwmod_enable / disable ARM: s3c: mark s3c2440_clk_add as __init_refok spi/s3c64xx: use correct dma_transfer_direction type ARM: OMAP4: devices: fixup OMAP4 DMIC platform device error message ARM: OMAP2+: clock data: Add dev-id for the omap-gpmc dummy fck ARM: OMAP: resolve sparse warning concerning debug_card_init() ARM: OMAP4: Fix twd_local_timer_register regression ARM: tegra: add tegra_timer clock ARM: tegra: rename tegra system timer ...
Showing 32 changed files Side-by-side Diff
- arch/arm/boot/dts/Makefile
- arch/arm/boot/dts/dove.dtsi
- arch/arm/boot/dts/imx6q-arm2.dts
- arch/arm/boot/dts/kirkwood-lsxl.dtsi
- arch/arm/boot/dts/wm8505.dtsi
- arch/arm/mach-dove/common.c
- arch/arm/mach-dove/pcie.c
- arch/arm/mach-kirkwood/board-dt.c
- arch/arm/mach-kirkwood/common.c
- arch/arm/mach-omap2/clock44xx_data.c
- arch/arm/mach-omap2/clockdomain.c
- arch/arm/mach-omap2/devices.c
- arch/arm/mach-omap2/gpmc.c
- arch/arm/mach-omap2/timer.c
- arch/arm/mach-s3c24xx/clock-s3c2440.c
- arch/arm/mach-shmobile/board-armadillo800eva.c
- arch/arm/mach-shmobile/clock-r8a7779.c
- arch/arm/mach-tegra/board-dt-tegra20.c
- arch/arm/mach-tegra/board-dt-tegra30.c
- arch/arm/mach-tegra/board.h
- arch/arm/mach-tegra/tegra20_clocks_data.c
- arch/arm/mach-tegra/tegra30_clocks.c
- arch/arm/mach-tegra/tegra30_clocks_data.c
- arch/arm/mach-tegra/timer.c
- arch/arm/plat-omap/debug-devices.c
- drivers/gpio/gpio-mvebu.c
- drivers/pcmcia/pxa2xx_sharpsl.c
- drivers/scsi/arm/fas216.c
- drivers/scsi/arm/oak.c
- drivers/spi/spi-s3c64xx.c
- drivers/usb/host/ehci-orion.c
- mm/slob.c
arch/arm/boot/dts/Makefile
... | ... | @@ -25,6 +25,8 @@ |
25 | 25 | exynos4210-trats.dtb \ |
26 | 26 | exynos5250-smdk5250.dtb |
27 | 27 | dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb |
28 | +dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ | |
29 | + integratorcp.dtb | |
28 | 30 | dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb |
29 | 31 | dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \ |
30 | 32 | kirkwood-dns325.dtb \ |
arch/arm/boot/dts/dove.dtsi
... | ... | @@ -4,22 +4,33 @@ |
4 | 4 | compatible = "marvell,dove"; |
5 | 5 | model = "Marvell Armada 88AP510 SoC"; |
6 | 6 | |
7 | - interrupt-parent = <&intc>; | |
8 | - | |
9 | - intc: interrupt-controller { | |
10 | - compatible = "marvell,orion-intc"; | |
11 | - interrupt-controller; | |
12 | - #interrupt-cells = <1>; | |
13 | - reg = <0xf1020204 0x04>, | |
14 | - <0xf1020214 0x04>; | |
15 | - }; | |
16 | - | |
17 | - mbus@f1000000 { | |
7 | + soc@f1000000 { | |
18 | 8 | compatible = "simple-bus"; |
19 | - ranges = <0 0xf1000000 0x4000000>; | |
20 | 9 | #address-cells = <1>; |
21 | 10 | #size-cells = <1>; |
11 | + interrupt-parent = <&intc>; | |
22 | 12 | |
13 | + ranges = <0xc8000000 0xc8000000 0x0100000 /* CESA SRAM 1M */ | |
14 | + 0xe0000000 0xe0000000 0x8000000 /* PCIe0 Mem 128M */ | |
15 | + 0xe8000000 0xe8000000 0x8000000 /* PCIe1 Mem 128M */ | |
16 | + 0xf0000000 0xf0000000 0x0100000 /* ScratchPad 1M */ | |
17 | + 0x00000000 0xf1000000 0x1000000 /* SB/NB regs 16M */ | |
18 | + 0xf2000000 0xf2000000 0x0100000 /* PCIe0 I/O 1M */ | |
19 | + 0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */ | |
20 | + 0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */ | |
21 | + | |
22 | + l2: l2-cache { | |
23 | + compatible = "marvell,tauros2-cache"; | |
24 | + marvell,tauros2-cache-features = <0>; | |
25 | + }; | |
26 | + | |
27 | + intc: interrupt-controller { | |
28 | + compatible = "marvell,orion-intc"; | |
29 | + interrupt-controller; | |
30 | + #interrupt-cells = <1>; | |
31 | + reg = <0x20204 0x04>, <0x20214 0x04>; | |
32 | + }; | |
33 | + | |
23 | 34 | uart0: serial@12000 { |
24 | 35 | compatible = "ns16550a"; |
25 | 36 | reg = <0x12000 0x100>; |
... | ... | @@ -56,11 +67,6 @@ |
56 | 67 | status = "disabled"; |
57 | 68 | }; |
58 | 69 | |
59 | - wdt: wdt@20300 { | |
60 | - compatible = "marvell,orion-wdt"; | |
61 | - reg = <0x20300 0x28>; | |
62 | - }; | |
63 | - | |
64 | 70 | gpio0: gpio@d0400 { |
65 | 71 | compatible = "marvell,orion-gpio"; |
66 | 72 | #gpio-cells = <2>; |
... | ... | @@ -138,6 +144,15 @@ |
138 | 144 | interrupts = <62>; |
139 | 145 | nr-ports = <1>; |
140 | 146 | status = "disabled"; |
147 | + }; | |
148 | + | |
149 | + crypto: crypto@30000 { | |
150 | + compatible = "marvell,orion-crypto"; | |
151 | + reg = <0x30000 0x10000>, | |
152 | + <0xc8000000 0x800>; | |
153 | + reg-names = "regs", "sram"; | |
154 | + interrupts = <31>; | |
155 | + status = "okay"; | |
141 | 156 | }; |
142 | 157 | }; |
143 | 158 | }; |
arch/arm/boot/dts/imx6q-arm2.dts
... | ... | @@ -37,6 +37,13 @@ |
37 | 37 | pinctrl_hog: hoggrp { |
38 | 38 | fsl,pins = < |
39 | 39 | 176 0x80000000 /* MX6Q_PAD_EIM_D25__GPIO_3_25 */ |
40 | + >; | |
41 | + }; | |
42 | + }; | |
43 | + | |
44 | + arm2 { | |
45 | + pinctrl_usdhc3_arm2: usdhc3grp-arm2 { | |
46 | + fsl,pins = < | |
40 | 47 | 1363 0x80000000 /* MX6Q_PAD_NANDF_CS0__GPIO_6_11 */ |
41 | 48 | 1369 0x80000000 /* MX6Q_PAD_NANDF_CS1__GPIO_6_14 */ |
42 | 49 | >; |
... | ... | @@ -58,7 +65,8 @@ |
58 | 65 | wp-gpios = <&gpio6 14 0>; |
59 | 66 | vmmc-supply = <®_3p3v>; |
60 | 67 | pinctrl-names = "default"; |
61 | - pinctrl-0 = <&pinctrl_usdhc3_1>; | |
68 | + pinctrl-0 = <&pinctrl_usdhc3_1 | |
69 | + &pinctrl_usdhc3_arm2>; | |
62 | 70 | status = "okay"; |
63 | 71 | }; |
64 | 72 |
arch/arm/boot/dts/kirkwood-lsxl.dtsi
... | ... | @@ -48,17 +48,19 @@ |
48 | 48 | #size-cells = <0>; |
49 | 49 | button@1 { |
50 | 50 | label = "Function Button"; |
51 | - linux,code = <132>; | |
51 | + linux,code = <357>; | |
52 | 52 | gpios = <&gpio1 9 1>; |
53 | 53 | }; |
54 | 54 | button@2 { |
55 | 55 | label = "Power-on Switch"; |
56 | - linux,code = <116>; | |
56 | + linux,code = <0>; | |
57 | + linux,input-type = <5>; | |
57 | 58 | gpios = <&gpio1 10 1>; |
58 | 59 | }; |
59 | 60 | button@3 { |
60 | 61 | label = "Power-auto Switch"; |
61 | - linux,code = <142>; | |
62 | + linux,code = <1>; | |
63 | + linux,input-type = <5>; | |
62 | 64 | gpios = <&gpio1 11 1>; |
63 | 65 | }; |
64 | 66 | }; |
65 | 67 | |
66 | 68 | |
67 | 69 | |
68 | 70 | |
... | ... | @@ -67,28 +69,28 @@ |
67 | 69 | compatible = "gpio-leds"; |
68 | 70 | |
69 | 71 | led@1 { |
70 | - label = "lschlv2:blue:func"; | |
72 | + label = "lsxl:blue:func"; | |
71 | 73 | gpios = <&gpio1 4 1>; |
72 | 74 | }; |
73 | 75 | |
74 | 76 | led@2 { |
75 | - label = "lschlv2:red:alarm"; | |
77 | + label = "lsxl:red:alarm"; | |
76 | 78 | gpios = <&gpio1 5 1>; |
77 | 79 | }; |
78 | 80 | |
79 | 81 | led@3 { |
80 | - label = "lschlv2:amber:info"; | |
82 | + label = "lsxl:amber:info"; | |
81 | 83 | gpios = <&gpio1 6 1>; |
82 | 84 | }; |
83 | 85 | |
84 | 86 | led@4 { |
85 | - label = "lschlv2:blue:power"; | |
87 | + label = "lsxl:blue:power"; | |
86 | 88 | gpios = <&gpio1 7 1>; |
87 | 89 | linux,default-trigger = "default-on"; |
88 | 90 | }; |
89 | 91 | |
90 | 92 | led@5 { |
91 | - label = "lschlv2:red:func"; | |
93 | + label = "lsxl:red:func"; | |
92 | 94 | gpios = <&gpio1 16 1>; |
93 | 95 | }; |
94 | 96 | }; |
arch/arm/boot/dts/wm8505.dtsi
... | ... | @@ -71,13 +71,13 @@ |
71 | 71 | ehci@d8007100 { |
72 | 72 | compatible = "via,vt8500-ehci"; |
73 | 73 | reg = <0xd8007100 0x200>; |
74 | - interrupts = <43>; | |
74 | + interrupts = <1>; | |
75 | 75 | }; |
76 | 76 | |
77 | 77 | uhci@d8007300 { |
78 | 78 | compatible = "platform-uhci"; |
79 | 79 | reg = <0xd8007300 0x200>; |
80 | - interrupts = <43>; | |
80 | + interrupts = <0>; | |
81 | 81 | }; |
82 | 82 | |
83 | 83 | fb@d8050800 { |
arch/arm/mach-dove/common.c
... | ... | @@ -32,6 +32,7 @@ |
32 | 32 | #include <linux/irq.h> |
33 | 33 | #include <plat/time.h> |
34 | 34 | #include <linux/platform_data/usb-ehci-orion.h> |
35 | +#include <plat/irq.h> | |
35 | 36 | #include <plat/common.h> |
36 | 37 | #include <plat/addr-map.h> |
37 | 38 | #include "common.h" |
... | ... | @@ -109,8 +110,8 @@ |
109 | 110 | |
110 | 111 | orion_clkdev_add(NULL, "orion-ehci.0", usb0); |
111 | 112 | orion_clkdev_add(NULL, "orion-ehci.1", usb1); |
112 | - orion_clkdev_add(NULL, "mv643xx_eth.0", ge); | |
113 | - orion_clkdev_add("0", "sata_mv.0", sata); | |
113 | + orion_clkdev_add(NULL, "mv643xx_eth_port.0", ge); | |
114 | + orion_clkdev_add(NULL, "sata_mv.0", sata); | |
114 | 115 | orion_clkdev_add("0", "pcie", pex0); |
115 | 116 | orion_clkdev_add("1", "pcie", pex1); |
116 | 117 | orion_clkdev_add(NULL, "sdhci-dove.0", sdio0); |
... | ... | @@ -399,7 +400,7 @@ |
399 | 400 | (dove_tclk + 499999) / 1000000); |
400 | 401 | |
401 | 402 | #ifdef CONFIG_CACHE_TAUROS2 |
402 | - tauros2_init(); | |
403 | + tauros2_init(0); | |
403 | 404 | #endif |
404 | 405 | dove_setup_cpu_mbus(); |
405 | 406 | |
... | ... | @@ -415,7 +416,6 @@ |
415 | 416 | dove_ehci0_init(); |
416 | 417 | dove_ehci1_init(); |
417 | 418 | dove_pcie_init(1, 1); |
418 | - dove_crypto_init(); | |
419 | 419 | |
420 | 420 | of_platform_populate(NULL, of_default_bus_match_table, |
421 | 421 | dove_auxdata_lookup, NULL); |
arch/arm/mach-dove/pcie.c
... | ... | @@ -10,6 +10,7 @@ |
10 | 10 | |
11 | 11 | #include <linux/kernel.h> |
12 | 12 | #include <linux/pci.h> |
13 | +#include <linux/clk.h> | |
13 | 14 | #include <video/vga.h> |
14 | 15 | #include <asm/mach/pci.h> |
15 | 16 | #include <asm/mach/arch.h> |
... | ... | @@ -188,6 +189,10 @@ |
188 | 189 | |
189 | 190 | if (orion_pcie_link_up(base)) { |
190 | 191 | struct pcie_port *pp = &pcie_port[num_pcie_ports++]; |
192 | + struct clk *clk = clk_get_sys("pcie", (index ? "1" : "0")); | |
193 | + | |
194 | + if (!IS_ERR(clk)) | |
195 | + clk_prepare_enable(clk); | |
191 | 196 | |
192 | 197 | printk(KERN_INFO "link up\n"); |
193 | 198 |
arch/arm/mach-kirkwood/board-dt.c
arch/arm/mach-kirkwood/common.c
... | ... | @@ -633,6 +633,7 @@ |
633 | 633 | |
634 | 634 | void __init kirkwood_l2_init(void) |
635 | 635 | { |
636 | +#ifdef CONFIG_CACHE_FEROCEON_L2 | |
636 | 637 | #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH |
637 | 638 | writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG); |
638 | 639 | feroceon_l2_init(1); |
... | ... | @@ -640,6 +641,7 @@ |
640 | 641 | writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG); |
641 | 642 | feroceon_l2_init(0); |
642 | 643 | #endif |
644 | +#endif | |
643 | 645 | } |
644 | 646 | |
645 | 647 | void __init kirkwood_init(void) |
646 | 648 | |
... | ... | @@ -657,9 +659,7 @@ |
657 | 659 | |
658 | 660 | kirkwood_setup_cpu_mbus(); |
659 | 661 | |
660 | -#ifdef CONFIG_CACHE_FEROCEON_L2 | |
661 | 662 | kirkwood_l2_init(); |
662 | -#endif | |
663 | 663 | |
664 | 664 | /* Setup root of clk tree */ |
665 | 665 | kirkwood_clk_init(); |
arch/arm/mach-omap2/clock44xx_data.c
... | ... | @@ -3294,7 +3294,7 @@ |
3294 | 3294 | CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_443X), |
3295 | 3295 | CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), |
3296 | 3296 | CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), |
3297 | - CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X), | |
3297 | + CLK("omap-gpmc", "fck", &dummy_ck, CK_443X), | |
3298 | 3298 | CLK("omap_i2c.1", "ick", &dummy_ck, CK_443X), |
3299 | 3299 | CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X), |
3300 | 3300 | CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X), |
arch/arm/mach-omap2/clockdomain.c
... | ... | @@ -925,15 +925,18 @@ |
925 | 925 | if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable) |
926 | 926 | return -EINVAL; |
927 | 927 | |
928 | + spin_lock_irqsave(&clkdm->lock, flags); | |
929 | + | |
928 | 930 | /* |
929 | 931 | * For arch's with no autodeps, clkcm_clk_enable |
930 | 932 | * should be called for every clock instance or hwmod that is |
931 | 933 | * enabled, so the clkdm can be force woken up. |
932 | 934 | */ |
933 | - if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) | |
935 | + if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) { | |
936 | + spin_unlock_irqrestore(&clkdm->lock, flags); | |
934 | 937 | return 0; |
938 | + } | |
935 | 939 | |
936 | - spin_lock_irqsave(&clkdm->lock, flags); | |
937 | 940 | arch_clkdm->clkdm_clk_enable(clkdm); |
938 | 941 | pwrdm_state_switch(clkdm->pwrdm.ptr); |
939 | 942 | spin_unlock_irqrestore(&clkdm->lock, flags); |
940 | 943 | |
941 | 944 | |
942 | 945 | |
943 | 946 | |
... | ... | @@ -950,15 +953,19 @@ |
950 | 953 | if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) |
951 | 954 | return -EINVAL; |
952 | 955 | |
956 | + spin_lock_irqsave(&clkdm->lock, flags); | |
957 | + | |
953 | 958 | if (atomic_read(&clkdm->usecount) == 0) { |
959 | + spin_unlock_irqrestore(&clkdm->lock, flags); | |
954 | 960 | WARN_ON(1); /* underflow */ |
955 | 961 | return -ERANGE; |
956 | 962 | } |
957 | 963 | |
958 | - if (atomic_dec_return(&clkdm->usecount) > 0) | |
964 | + if (atomic_dec_return(&clkdm->usecount) > 0) { | |
965 | + spin_unlock_irqrestore(&clkdm->lock, flags); | |
959 | 966 | return 0; |
967 | + } | |
960 | 968 | |
961 | - spin_lock_irqsave(&clkdm->lock, flags); | |
962 | 969 | arch_clkdm->clkdm_clk_disable(clkdm); |
963 | 970 | pwrdm_state_switch(clkdm->pwrdm.ptr); |
964 | 971 | spin_unlock_irqrestore(&clkdm->lock, flags); |
arch/arm/mach-omap2/devices.c
arch/arm/mach-omap2/gpmc.c
... | ... | @@ -868,9 +868,9 @@ |
868 | 868 | |
869 | 869 | } |
870 | 870 | |
871 | -static void __devinit gpmc_mem_init(void) | |
871 | +static int __devinit gpmc_mem_init(void) | |
872 | 872 | { |
873 | - int cs; | |
873 | + int cs, rc; | |
874 | 874 | unsigned long boot_rom_space = 0; |
875 | 875 | |
876 | 876 | /* never allocate the first page, to facilitate bug detection; |
877 | 877 | |
878 | 878 | |
... | ... | @@ -890,13 +890,21 @@ |
890 | 890 | if (!gpmc_cs_mem_enabled(cs)) |
891 | 891 | continue; |
892 | 892 | gpmc_cs_get_memconf(cs, &base, &size); |
893 | - if (gpmc_cs_insert_mem(cs, base, size) < 0) | |
894 | - BUG(); | |
893 | + rc = gpmc_cs_insert_mem(cs, base, size); | |
894 | + if (IS_ERR_VALUE(rc)) { | |
895 | + while (--cs >= 0) | |
896 | + if (gpmc_cs_mem_enabled(cs)) | |
897 | + gpmc_cs_delete_mem(cs); | |
898 | + return rc; | |
899 | + } | |
895 | 900 | } |
901 | + | |
902 | + return 0; | |
896 | 903 | } |
897 | 904 | |
898 | 905 | static __devinit int gpmc_probe(struct platform_device *pdev) |
899 | 906 | { |
907 | + int rc; | |
900 | 908 | u32 l; |
901 | 909 | struct resource *res; |
902 | 910 | |
... | ... | @@ -936,7 +944,13 @@ |
936 | 944 | dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), |
937 | 945 | GPMC_REVISION_MINOR(l)); |
938 | 946 | |
939 | - gpmc_mem_init(); | |
947 | + rc = gpmc_mem_init(); | |
948 | + if (IS_ERR_VALUE(rc)) { | |
949 | + clk_disable_unprepare(gpmc_l3_clk); | |
950 | + clk_put(gpmc_l3_clk); | |
951 | + dev_err(gpmc_dev, "failed to reserve memory\n"); | |
952 | + return rc; | |
953 | + } | |
940 | 954 | |
941 | 955 | if (IS_ERR_VALUE(gpmc_setup_irq())) |
942 | 956 | dev_warn(gpmc_dev, "gpmc_setup_irq failed\n"); |
arch/arm/mach-omap2/timer.c
... | ... | @@ -467,7 +467,7 @@ |
467 | 467 | #ifdef CONFIG_ARCH_OMAP4 |
468 | 468 | #ifdef CONFIG_LOCAL_TIMERS |
469 | 469 | static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, |
470 | - OMAP44XX_LOCAL_TWD_BASE, 29 + OMAP_INTC_START); | |
470 | + OMAP44XX_LOCAL_TWD_BASE, 29); | |
471 | 471 | #endif |
472 | 472 | |
473 | 473 | static void __init omap4_timer_init(void) |
arch/arm/mach-s3c24xx/clock-s3c2440.c
... | ... | @@ -163,7 +163,7 @@ |
163 | 163 | CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n), |
164 | 164 | }; |
165 | 165 | |
166 | -static int s3c2440_clk_add(struct device *dev, struct subsys_interface *sif) | |
166 | +static int __init_refok s3c2440_clk_add(struct device *dev, struct subsys_interface *sif) | |
167 | 167 | { |
168 | 168 | struct clk *clock_upll; |
169 | 169 | struct clk *clock_h; |
arch/arm/mach-shmobile/board-armadillo800eva.c
... | ... | @@ -1196,7 +1196,7 @@ |
1196 | 1196 | |
1197 | 1197 | #ifdef CONFIG_CACHE_L2X0 |
1198 | 1198 | /* Early BRESP enable, Shared attribute override enable, 32K*8way */ |
1199 | - l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff); | |
1199 | + l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff); | |
1200 | 1200 | #endif |
1201 | 1201 | |
1202 | 1202 | i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices)); |
arch/arm/mach-shmobile/clock-r8a7779.c
... | ... | @@ -24,17 +24,17 @@ |
24 | 24 | #include <linux/clkdev.h> |
25 | 25 | #include <mach/common.h> |
26 | 26 | |
27 | -#define FRQMR 0xffc80014 | |
28 | -#define MSTPCR0 0xffc80030 | |
29 | -#define MSTPCR1 0xffc80034 | |
30 | -#define MSTPCR3 0xffc8003c | |
31 | -#define MSTPSR1 0xffc80044 | |
32 | -#define MSTPSR4 0xffc80048 | |
33 | -#define MSTPSR6 0xffc8004c | |
34 | -#define MSTPCR4 0xffc80050 | |
35 | -#define MSTPCR5 0xffc80054 | |
36 | -#define MSTPCR6 0xffc80058 | |
37 | -#define MSTPCR7 0xffc80040 | |
27 | +#define FRQMR IOMEM(0xffc80014) | |
28 | +#define MSTPCR0 IOMEM(0xffc80030) | |
29 | +#define MSTPCR1 IOMEM(0xffc80034) | |
30 | +#define MSTPCR3 IOMEM(0xffc8003c) | |
31 | +#define MSTPSR1 IOMEM(0xffc80044) | |
32 | +#define MSTPSR4 IOMEM(0xffc80048) | |
33 | +#define MSTPSR6 IOMEM(0xffc8004c) | |
34 | +#define MSTPCR4 IOMEM(0xffc80050) | |
35 | +#define MSTPCR5 IOMEM(0xffc80054) | |
36 | +#define MSTPCR6 IOMEM(0xffc80058) | |
37 | +#define MSTPCR7 IOMEM(0xffc80040) | |
38 | 38 | |
39 | 39 | /* ioremap() through clock mapping mandatory to avoid |
40 | 40 | * collision with ARM coherent DMA virtual memory range. |
arch/arm/mach-tegra/board-dt-tegra20.c
... | ... | @@ -182,7 +182,7 @@ |
182 | 182 | .init_early = tegra20_init_early, |
183 | 183 | .init_irq = tegra_dt_init_irq, |
184 | 184 | .handle_irq = gic_handle_irq, |
185 | - .timer = &tegra_timer, | |
185 | + .timer = &tegra_sys_timer, | |
186 | 186 | .init_machine = tegra_dt_init, |
187 | 187 | .init_late = tegra_dt_init_late, |
188 | 188 | .restart = tegra_assert_system_reset, |
arch/arm/mach-tegra/board-dt-tegra30.c
... | ... | @@ -89,7 +89,7 @@ |
89 | 89 | .init_early = tegra30_init_early, |
90 | 90 | .init_irq = tegra_dt_init_irq, |
91 | 91 | .handle_irq = gic_handle_irq, |
92 | - .timer = &tegra_timer, | |
92 | + .timer = &tegra_sys_timer, | |
93 | 93 | .init_machine = tegra30_dt_init, |
94 | 94 | .init_late = tegra_init_late, |
95 | 95 | .restart = tegra_assert_system_reset, |
arch/arm/mach-tegra/board.h
arch/arm/mach-tegra/tegra20_clocks_data.c
arch/arm/mach-tegra/tegra30_clocks.c
... | ... | @@ -1199,7 +1199,7 @@ |
1199 | 1199 | { |
1200 | 1200 | struct clk_tegra *c = to_clk_tegra(hw); |
1201 | 1201 | unsigned long input_rate = *prate; |
1202 | - unsigned long output_rate = *prate; | |
1202 | + u64 output_rate = *prate; | |
1203 | 1203 | const struct clk_pll_freq_table *sel; |
1204 | 1204 | struct clk_pll_freq_table cfg; |
1205 | 1205 | int mul; |
arch/arm/mach-tegra/tegra30_clocks_data.c
arch/arm/mach-tegra/timer.c
arch/arm/plat-omap/debug-devices.c
drivers/gpio/gpio-mvebu.c
... | ... | @@ -381,11 +381,13 @@ |
381 | 381 | u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip)); |
382 | 382 | u &= ~(1 << pin); |
383 | 383 | writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip)); |
384 | + break; | |
384 | 385 | case IRQ_TYPE_EDGE_FALLING: |
385 | 386 | case IRQ_TYPE_LEVEL_LOW: |
386 | 387 | u = readl_relaxed(mvebu_gpioreg_in_pol(mvchip)); |
387 | 388 | u |= 1 << pin; |
388 | 389 | writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip)); |
390 | + break; | |
389 | 391 | case IRQ_TYPE_EDGE_BOTH: { |
390 | 392 | u32 v; |
391 | 393 | |
... | ... | @@ -401,6 +403,7 @@ |
401 | 403 | else |
402 | 404 | u &= ~(1 << pin); /* rising */ |
403 | 405 | writel_relaxed(u, mvebu_gpioreg_in_pol(mvchip)); |
406 | + break; | |
404 | 407 | } |
405 | 408 | } |
406 | 409 | return 0; |
drivers/pcmcia/pxa2xx_sharpsl.c
... | ... | @@ -194,7 +194,7 @@ |
194 | 194 | sharpsl_pcmcia_init_reset(skt); |
195 | 195 | } |
196 | 196 | |
197 | -static struct pcmcia_low_level sharpsl_pcmcia_ops __initdata = { | |
197 | +static struct pcmcia_low_level sharpsl_pcmcia_ops = { | |
198 | 198 | .owner = THIS_MODULE, |
199 | 199 | .hw_init = sharpsl_pcmcia_hw_init, |
200 | 200 | .socket_state = sharpsl_pcmcia_socket_state, |
drivers/scsi/arm/fas216.c
... | ... | @@ -179,6 +179,7 @@ |
179 | 179 | SCp->buffers_residual, suffix); |
180 | 180 | } |
181 | 181 | |
182 | +#ifdef CHECK_STRUCTURE | |
182 | 183 | static void fas216_dumpinfo(FAS216_Info *info) |
183 | 184 | { |
184 | 185 | static int used = 0; |
... | ... | @@ -223,7 +224,6 @@ |
223 | 224 | info->internal_done, info->magic_end); |
224 | 225 | } |
225 | 226 | |
226 | -#ifdef CHECK_STRUCTURE | |
227 | 227 | static void __fas216_checkmagic(FAS216_Info *info, const char *func) |
228 | 228 | { |
229 | 229 | int corruption = 0; |
drivers/scsi/arm/oak.c
drivers/spi/spi-s3c64xx.c
... | ... | @@ -132,7 +132,7 @@ |
132 | 132 | |
133 | 133 | struct s3c64xx_spi_dma_data { |
134 | 134 | unsigned ch; |
135 | - enum dma_data_direction direction; | |
135 | + enum dma_transfer_direction direction; | |
136 | 136 | enum dma_ch dmach; |
137 | 137 | struct property *dma_prop; |
138 | 138 | }; |
139 | 139 | |
... | ... | @@ -1067,11 +1067,11 @@ |
1067 | 1067 | |
1068 | 1068 | if (tx) { |
1069 | 1069 | dma_data = &sdd->tx_dma; |
1070 | - dma_data->direction = DMA_TO_DEVICE; | |
1070 | + dma_data->direction = DMA_MEM_TO_DEV; | |
1071 | 1071 | chan_str = "tx"; |
1072 | 1072 | } else { |
1073 | 1073 | dma_data = &sdd->rx_dma; |
1074 | - dma_data->direction = DMA_FROM_DEVICE; | |
1074 | + dma_data->direction = DMA_DEV_TO_MEM; | |
1075 | 1075 | chan_str = "rx"; |
1076 | 1076 | } |
1077 | 1077 |
drivers/usb/host/ehci-orion.c
mm/slob.c
... | ... | @@ -429,7 +429,7 @@ |
429 | 429 | __do_kmalloc_node(size_t size, gfp_t gfp, int node, unsigned long caller) |
430 | 430 | { |
431 | 431 | unsigned int *m; |
432 | - int align = max(ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN); | |
432 | + int align = max_t(size_t, ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN); | |
433 | 433 | void *ret; |
434 | 434 | |
435 | 435 | gfp &= gfp_allowed_mask; |
... | ... | @@ -502,7 +502,7 @@ |
502 | 502 | |
503 | 503 | sp = virt_to_page(block); |
504 | 504 | if (PageSlab(sp)) { |
505 | - int align = max(ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN); | |
505 | + int align = max_t(size_t, ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN); | |
506 | 506 | unsigned int *m = (unsigned int *)(block - align); |
507 | 507 | slob_free(m, *m + align); |
508 | 508 | } else |
... | ... | @@ -521,7 +521,7 @@ |
521 | 521 | |
522 | 522 | sp = virt_to_page(block); |
523 | 523 | if (PageSlab(sp)) { |
524 | - int align = max(ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN); | |
524 | + int align = max_t(size_t, ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN); | |
525 | 525 | unsigned int *m = (unsigned int *)(block - align); |
526 | 526 | return SLOB_UNITS(*m) * SLOB_UNIT; |
527 | 527 | } else |