Commit 3c3a1b1759616e6603027108f8abcbec54271e62
Committed by
Jesse Barnes
Jesse Barnes
1 parent
f22daf1fb9
Exists in
master
and in
7 other branches
PCI: pciehp: remove wrong workaround for bad DLLP
Remove wrong workaround for BAD DLLP error, which confused surprise down error with DLL errors. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Showing 1 changed file with 3 additions and 50 deletions Side-by-side Diff
drivers/pci/hotplug/pciehp_hpc.c
| ... | ... | @@ -535,55 +535,13 @@ |
| 535 | 535 | return retval; |
| 536 | 536 | } |
| 537 | 537 | |
| 538 | -static inline int pcie_mask_bad_dllp(struct controller *ctrl) | |
| 539 | -{ | |
| 540 | - struct pci_dev *dev = ctrl->pcie->port; | |
| 541 | - int pos; | |
| 542 | - u32 reg; | |
| 543 | - | |
| 544 | - pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | |
| 545 | - if (!pos) | |
| 546 | - return 0; | |
| 547 | - pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, ®); | |
| 548 | - if (reg & PCI_ERR_COR_BAD_DLLP) | |
| 549 | - return 0; | |
| 550 | - reg |= PCI_ERR_COR_BAD_DLLP; | |
| 551 | - pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, reg); | |
| 552 | - return 1; | |
| 553 | -} | |
| 554 | - | |
| 555 | -static inline void pcie_unmask_bad_dllp(struct controller *ctrl) | |
| 556 | -{ | |
| 557 | - struct pci_dev *dev = ctrl->pcie->port; | |
| 558 | - u32 reg; | |
| 559 | - int pos; | |
| 560 | - | |
| 561 | - pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | |
| 562 | - if (!pos) | |
| 563 | - return; | |
| 564 | - pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, ®); | |
| 565 | - if (!(reg & PCI_ERR_COR_BAD_DLLP)) | |
| 566 | - return; | |
| 567 | - reg &= ~PCI_ERR_COR_BAD_DLLP; | |
| 568 | - pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, reg); | |
| 569 | -} | |
| 570 | - | |
| 571 | 538 | int pciehp_power_off_slot(struct slot * slot) |
| 572 | 539 | { |
| 573 | 540 | struct controller *ctrl = slot->ctrl; |
| 574 | 541 | u16 slot_cmd; |
| 575 | 542 | u16 cmd_mask; |
| 576 | - int retval = 0; | |
| 577 | - int changed; | |
| 543 | + int retval; | |
| 578 | 544 | |
| 579 | - /* | |
| 580 | - * Set Bad DLLP Mask bit in Correctable Error Mask | |
| 581 | - * Register. This is the workaround against Bad DLLP error | |
| 582 | - * that sometimes happens during turning power off the slot | |
| 583 | - * which conforms to PCI Express 1.0a spec. | |
| 584 | - */ | |
| 585 | - changed = pcie_mask_bad_dllp(ctrl); | |
| 586 | - | |
| 587 | 545 | slot_cmd = POWER_OFF; |
| 588 | 546 | cmd_mask = PCI_EXP_SLTCTL_PCC; |
| 589 | 547 | if (!pciehp_poll_mode) { |
| 590 | 548 | |
| ... | ... | @@ -595,16 +553,11 @@ |
| 595 | 553 | retval = pcie_write_cmd(ctrl, slot_cmd, cmd_mask); |
| 596 | 554 | if (retval) { |
| 597 | 555 | ctrl_err(ctrl, "Write command failed!\n"); |
| 598 | - retval = -1; | |
| 599 | - goto out; | |
| 556 | + return retval; | |
| 600 | 557 | } |
| 601 | 558 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", |
| 602 | 559 | __func__, ctrl->cap_base + PCI_EXP_SLTCTL, slot_cmd); |
| 603 | - out: | |
| 604 | - if (changed) | |
| 605 | - pcie_unmask_bad_dllp(ctrl); | |
| 606 | - | |
| 607 | - return retval; | |
| 560 | + return 0; | |
| 608 | 561 | } |
| 609 | 562 | |
| 610 | 563 | static irqreturn_t pcie_isr(int irq, void *dev_id) |