Commit 3d18c98367eac23555ea4887c4f570423474eeaf
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ab75dc02c1
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MIPS: Fix Jazz 64-bit build error.
Move add_wired_entry to its own header file from where it will be always included. Patch up other users of add_wired_entry to also include the header as needed. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Showing 7 changed files with 15 additions and 6 deletions Side-by-side Diff
arch/mips/include/asm/pgtable-32.h
| ... | ... | @@ -19,12 +19,6 @@ |
| 19 | 19 | #include <asm-generic/pgtable-nopmd.h> |
| 20 | 20 | |
| 21 | 21 | /* |
| 22 | - * - add_wired_entry() add a fixed TLB entry, and move wired register | |
| 23 | - */ | |
| 24 | -extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, | |
| 25 | - unsigned long entryhi, unsigned long pagemask); | |
| 26 | - | |
| 27 | -/* | |
| 28 | 22 | * - add_temporary_entry() add a temporary TLB entry. We use TLB entries |
| 29 | 23 | * starting at the top and working down. This is for populating the |
| 30 | 24 | * TLB before trap_init() puts the TLB miss handler in place. It |
arch/mips/include/asm/tlbmisc.h
| 1 | +#ifndef __ASM_TLBMISC_H | |
| 2 | +#define __ASM_TLBMISC_H | |
| 3 | + | |
| 4 | +/* | |
| 5 | + * - add_wired_entry() add a fixed TLB entry, and move wired register | |
| 6 | + */ | |
| 7 | +extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1, | |
| 8 | + unsigned long entryhi, unsigned long pagemask); | |
| 9 | + | |
| 10 | +#endif /* __ASM_TLBMISC_H */ |
arch/mips/jazz/irq.c
arch/mips/jazz/setup.c
arch/mips/mm/tlb-r3k.c
arch/mips/mm/tlb-r4k.c