Commit 3d29b842e58fbca2c13a9f458fddbaa535c6e578

Authored by Eugeni Dodonov
Committed by Daniel Vetter
1 parent b2c606fe1d

drm/i915: add a LLC feature flag in device description

LLC is not SNB/IVB-specific, so we should check for it in a more generic
way.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Showing 6 changed files with 13 additions and 2 deletions Side-by-side Diff

drivers/gpu/drm/i915/i915_debugfs.c
... ... @@ -83,6 +83,7 @@
83 83 B(supports_tv);
84 84 B(has_bsd_ring);
85 85 B(has_blt_ring);
  86 + B(has_llc);
86 87 #undef B
87 88  
88 89 return 0;
drivers/gpu/drm/i915/i915_dma.c
... ... @@ -784,6 +784,9 @@
784 784 case I915_PARAM_HAS_GEN7_SOL_RESET:
785 785 value = 1;
786 786 break;
  787 + case I915_PARAM_HAS_LLC:
  788 + value = HAS_LLC(dev);
  789 + break;
787 790 default:
788 791 DRM_DEBUG_DRIVER("Unknown parameter %d\n",
789 792 param->param);
drivers/gpu/drm/i915/i915_drv.c
... ... @@ -214,6 +214,7 @@
214 214 .need_gfx_hws = 1, .has_hotplug = 1,
215 215 .has_bsd_ring = 1,
216 216 .has_blt_ring = 1,
  217 + .has_llc = 1,
217 218 };
218 219  
219 220 static const struct intel_device_info intel_sandybridge_m_info = {
... ... @@ -222,6 +223,7 @@
222 223 .has_fbc = 1,
223 224 .has_bsd_ring = 1,
224 225 .has_blt_ring = 1,
  226 + .has_llc = 1,
225 227 };
226 228  
227 229 static const struct intel_device_info intel_ivybridge_d_info = {
... ... @@ -229,6 +231,7 @@
229 231 .need_gfx_hws = 1, .has_hotplug = 1,
230 232 .has_bsd_ring = 1,
231 233 .has_blt_ring = 1,
  234 + .has_llc = 1,
232 235 };
233 236  
234 237 static const struct intel_device_info intel_ivybridge_m_info = {
... ... @@ -237,6 +240,7 @@
237 240 .has_fbc = 0, /* FBC is not enabled on Ivybridge mobile yet */
238 241 .has_bsd_ring = 1,
239 242 .has_blt_ring = 1,
  243 + .has_llc = 1,
240 244 };
241 245  
242 246 static const struct pci_device_id pciidlist[] = { /* aka */
drivers/gpu/drm/i915/i915_drv.h
... ... @@ -255,6 +255,7 @@
255 255 u8 supports_tv:1;
256 256 u8 has_bsd_ring:1;
257 257 u8 has_blt_ring:1;
  258 + u8 has_llc:1;
258 259 };
259 260  
260 261 enum no_fbc_reason {
... ... @@ -969,6 +970,7 @@
969 970  
970 971 #define HAS_BSD(dev) (INTEL_INFO(dev)->has_bsd_ring)
971 972 #define HAS_BLT(dev) (INTEL_INFO(dev)->has_blt_ring)
  973 +#define HAS_LLC(dev) (INTEL_INFO(dev)->has_llc)
972 974 #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
973 975  
974 976 #define HAS_OVERLAY(dev) (INTEL_INFO(dev)->has_overlay)
drivers/gpu/drm/i915/i915_gem.c
... ... @@ -3619,8 +3619,8 @@
3619 3619 obj->base.write_domain = I915_GEM_DOMAIN_CPU;
3620 3620 obj->base.read_domains = I915_GEM_DOMAIN_CPU;
3621 3621  
3622   - if (IS_GEN6(dev) || IS_GEN7(dev)) {
3623   - /* On Gen6, we can have the GPU use the LLC (the CPU
  3622 + if (HAS_LLC(dev)) {
  3623 + /* On some devices, we can have the GPU use the LLC (the CPU
3624 3624 * cache) for about a 10% performance improvement
3625 3625 * compared to uncached. Graphics requests other than
3626 3626 * display scanout are coherent with the CPU in
include/drm/i915_drm.h
... ... @@ -296,6 +296,7 @@
296 296 #define I915_PARAM_HAS_EXEC_CONSTANTS 14
297 297 #define I915_PARAM_HAS_RELAXED_DELTA 15
298 298 #define I915_PARAM_HAS_GEN7_SOL_RESET 16
  299 +#define I915_PARAM_HAS_LLC 17
299 300  
300 301 typedef struct drm_i915_getparam {
301 302 int param;