Doug / smarc-fsl-linux-kernel

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Commit 3e1b83ab3912a6f583897635bee0a2e0cd1545f7

Authored by Linus Torvalds
2 parents 8e3e076c5a 82fd866701
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86 

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86:
  x86: rdc: leds build/config fix
  x86: sysfs cpu?/topology is empty in 2.6.25 (32-bit Intel system)
  x86: revert commit 709f744 ("x86: bitops asm constraint fixes")
  x86: restrict keyboard io ports reservation to make ipmi driver work
  x86: fix fpu restore from sig return
  x86: remove spew print out about bus to node mapping
  x86: revert printk format warning change which is for linux-next
  x86: cleanup PAT cpu validation
  x86: geode: define geode_has_vsa2() even if CONFIG_MGEODE_LX is not set
  x86: GEODE: cache results from geode_has_vsa2() and uninline
  x86: revert geode config dependency

Showing 15 changed files Side-by-side Diff

... ... @@ -335,6 +335,7 @@
335 335 select GENERIC_GPIO
336 336 select LEDS_CLASS
337 337 select LEDS_GPIO
  338 + select NEW_LEDS
338 339 help
339 340 This option is needed for RDC R-321x system-on-chip, also known
340 341 as R-8610-(G).
... ... @@ -1662,7 +1663,6 @@
1662 1663  
1663 1664 config OLPC
1664 1665 bool "One Laptop Per Child support"
1665   - depends on MGEODE_LX
1666 1666 default n
1667 1667 help
1668 1668 Add support for detecting the unique features of the OLPC
arch/x86/kernel/cpu/addon_cpuid_features.c
Diff comments   View file @ 3e1b83a
... ... @@ -6,6 +6,7 @@
6 6  
7 7 #include <linux/cpu.h>
8 8  
  9 +#include <asm/pat.h>
9 10 #include <asm/processor.h>
10 11  
11 12 struct cpuid_bit {
... ... @@ -48,4 +49,24 @@
48 49 set_cpu_cap(c, cb->feature);
49 50 }
50 51 }
  52 +
  53 +#ifdef CONFIG_X86_PAT
  54 +void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
  55 +{
  56 + switch (c->x86_vendor) {
  57 + case X86_VENDOR_AMD:
  58 + if (c->x86 >= 0xf && c->x86 <= 0x11)
  59 + return;
  60 + break;
  61 + case X86_VENDOR_INTEL:
  62 + if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
  63 + return;
  64 + break;
  65 + }
  66 +
  67 + pat_disable(cpu_has_pat ?
  68 + "PAT disabled. Not yet verified on this CPU type." :
  69 + "PAT not supported by CPU.");
  70 +}
  71 +#endif
arch/x86/kernel/cpu/common.c
Diff comments   View file @ 3e1b83a
... ... @@ -12,6 +12,7 @@
12 12 #include <asm/mmu_context.h>
13 13 #include <asm/mtrr.h>
14 14 #include <asm/mce.h>
  15 +#include <asm/pat.h>
15 16 #ifdef CONFIG_X86_LOCAL_APIC
16 17 #include <asm/mpspec.h>
17 18 #include <asm/apic.h>
... ... @@ -308,19 +309,6 @@
308 309  
309 310 }
310 311  
311   - clear_cpu_cap(c, X86_FEATURE_PAT);
312   -
313   - switch (c->x86_vendor) {
314   - case X86_VENDOR_AMD:
315   - if (c->x86 >= 0xf && c->x86 <= 0x11)
316   - set_cpu_cap(c, X86_FEATURE_PAT);
317   - break;
318   - case X86_VENDOR_INTEL:
319   - if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
320   - set_cpu_cap(c, X86_FEATURE_PAT);
321   - break;
322   - }
323   -
324 312 }
325 313  
326 314 /*
... ... @@ -409,18 +397,6 @@
409 397 init_scattered_cpuid_features(c);
410 398 }
411 399  
412   - clear_cpu_cap(c, X86_FEATURE_PAT);
413   -
414   - switch (c->x86_vendor) {
415   - case X86_VENDOR_AMD:
416   - if (c->x86 >= 0xf && c->x86 <= 0x11)
417   - set_cpu_cap(c, X86_FEATURE_PAT);
418   - break;
419   - case X86_VENDOR_INTEL:
420   - if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
421   - set_cpu_cap(c, X86_FEATURE_PAT);
422   - break;
423   - }
424 400 }
425 401  
426 402 static void __cpuinit squash_the_stupid_serial_number(struct cpuinfo_x86 *c)
... ... @@ -651,6 +627,7 @@
651 627 cpu_devs[cvdev->vendor] = cvdev->cpu_dev;
652 628  
653 629 early_cpu_detect();
  630 + validate_pat_support(&boot_cpu_data);
654 631 }
655 632  
656 633 /* Make sure %fs is initialized properly in idle threads */
arch/x86/kernel/geode_32.c
Diff comments   View file @ 3e1b83a
... ... @@ -161,6 +161,25 @@
161 161 }
162 162 EXPORT_SYMBOL_GPL(geode_gpio_setup_event);
163 163  
  164 +int geode_has_vsa2(void)
  165 +{
  166 + static int has_vsa2 = -1;
  167 +
  168 + if (has_vsa2 == -1) {
  169 + /*
  170 + * The VSA has virtual registers that we can query for a
  171 + * signature.
  172 + */
  173 + outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
  174 + outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
  175 +
  176 + has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG);
  177 + }
  178 +
  179 + return has_vsa2;
  180 +}
  181 +EXPORT_SYMBOL_GPL(geode_has_vsa2);
  182 +
164 183 static int __init geode_southbridge_init(void)
165 184 {
166 185 if (!is_geode())
arch/x86/kernel/i387.c
Diff comments   View file @ 3e1b83a
... ... @@ -450,7 +450,6 @@
450 450 {
451 451 struct task_struct *tsk = current;
452 452  
453   - clear_fpu(tsk);
454 453 return __copy_from_user(&tsk->thread.xstate->fsave, buf,
455 454 sizeof(struct i387_fsave_struct));
456 455 }
... ... @@ -461,7 +460,6 @@
461 460 struct user_i387_ia32_struct env;
462 461 int err;
463 462  
464   - clear_fpu(tsk);
465 463 err = __copy_from_user(&tsk->thread.xstate->fxsave, &buf->_fxsr_env[0],
466 464 sizeof(struct i387_fxsave_struct));
467 465 /* mxcsr reserved bits must be masked to zero for security reasons */
... ... @@ -478,6 +476,16 @@
478 476 int err;
479 477  
480 478 if (HAVE_HWFP) {
  479 + struct task_struct *tsk = current;
  480 +
  481 + clear_fpu(tsk);
  482 +
  483 + if (!used_math()) {
  484 + err = init_fpu(tsk);
  485 + if (err)
  486 + return err;
  487 + }
  488 +
481 489 if (cpu_has_fxsr)
482 490 err = restore_i387_fxsave(buf);
483 491 else
arch/x86/kernel/setup.c
Diff comments   View file @ 3e1b83a
... ... @@ -95,7 +95,7 @@
95 95  
96 96 /* Copy section for each CPU (we discard the original) */
97 97 size = PERCPU_ENOUGH_ROOM;
98   - printk(KERN_INFO "PERCPU: Allocating %zd bytes of per cpu data\n",
  98 + printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n",
99 99 size);
100 100  
101 101 for_each_possible_cpu(i) {
arch/x86/kernel/setup_32.c
Diff comments   View file @ 3e1b83a
... ... @@ -127,7 +127,12 @@
127 127 }, {
128 128 .name = "keyboard",
129 129 .start = 0x0060,
130   - .end = 0x006f,
  130 + .end = 0x0060,
  131 + .flags = IORESOURCE_BUSY | IORESOURCE_IO
  132 +}, {
  133 + .name = "keyboard",
  134 + .start = 0x0064,
  135 + .end = 0x0064,
131 136 .flags = IORESOURCE_BUSY | IORESOURCE_IO
132 137 }, {
133 138 .name = "dma page reg",
arch/x86/kernel/setup_64.c
Diff comments   View file @ 3e1b83a
... ... @@ -70,6 +70,7 @@
70 70 #include <asm/ds.h>
71 71 #include <asm/topology.h>
72 72 #include <asm/trampoline.h>
  73 +#include <asm/pat.h>
73 74  
74 75 #include <mach_apic.h>
75 76 #ifdef CONFIG_PARAVIRT
76 77  
... ... @@ -128,8 +129,10 @@
128 129 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
129 130 { .name = "timer1", .start = 0x50, .end = 0x53,
130 131 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
131   - { .name = "keyboard", .start = 0x60, .end = 0x6f,
  132 + { .name = "keyboard", .start = 0x60, .end = 0x60,
132 133 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
  134 + { .name = "keyboard", .start = 0x64, .end = 0x64,
  135 + .flags = IORESOURCE_BUSY | IORESOURCE_IO },
133 136 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
134 137 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
135 138 { .name = "pic2", .start = 0xa0, .end = 0xa1,
136 139  
137 140  
138 141  
... ... @@ -1063,25 +1066,19 @@
1063 1066 if (c->extended_cpuid_level >= 0x80000007)
1064 1067 c->x86_power = cpuid_edx(0x80000007);
1065 1068  
1066   -
1067   - clear_cpu_cap(c, X86_FEATURE_PAT);
1068   -
1069 1069 switch (c->x86_vendor) {
1070 1070 case X86_VENDOR_AMD:
1071 1071 early_init_amd(c);
1072   - if (c->x86 >= 0xf && c->x86 <= 0x11)
1073   - set_cpu_cap(c, X86_FEATURE_PAT);
1074 1072 break;
1075 1073 case X86_VENDOR_INTEL:
1076 1074 early_init_intel(c);
1077   - if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
1078   - set_cpu_cap(c, X86_FEATURE_PAT);
1079 1075 break;
1080 1076 case X86_VENDOR_CENTAUR:
1081 1077 early_init_centaur(c);
1082 1078 break;
1083 1079 }
1084 1080  
  1081 + validate_pat_support(c);
1085 1082 }
1086 1083  
1087 1084 /*
... ... @@ -25,32 +25,25 @@
25 25 #include <asm/mtrr.h>
26 26 #include <asm/io.h>
27 27  
28   -int pat_wc_enabled = 1;
  28 +#ifdef CONFIG_X86_PAT
  29 +int __read_mostly pat_wc_enabled = 1;
29 30  
30   -static u64 __read_mostly boot_pat_state;
31   -
32   -static int nopat(char *str)
  31 +void __init pat_disable(char *reason)
33 32 {
34 33 pat_wc_enabled = 0;
35   - printk(KERN_INFO "x86: PAT support disabled.\n");
36   -
37   - return 0;
  34 + printk(KERN_INFO "%s\n", reason);
38 35 }
39   -early_param("nopat", nopat);
40 36  
41   -static int pat_known_cpu(void)
  37 +static int nopat(char *str)
42 38 {
43   - if (!pat_wc_enabled)
44   - return 0;
45   -
46   - if (cpu_has_pat)
47   - return 1;
48   -
49   - pat_wc_enabled = 0;
50   - printk(KERN_INFO "CPU and/or kernel does not support PAT.\n");
  39 + pat_disable("PAT support disabled.");
51 40 return 0;
52 41 }
  42 +early_param("nopat", nopat);
  43 +#endif
53 44  
  45 +static u64 __read_mostly boot_pat_state;
  46 +
54 47 enum {
55 48 PAT_UC = 0, /* uncached */
56 49 PAT_WC = 1, /* Write combining */
57 50  
... ... @@ -66,17 +59,19 @@
66 59 {
67 60 u64 pat;
68 61  
69   -#ifndef CONFIG_X86_PAT
70   - nopat(NULL);
71   -#endif
72   -
73   - /* Boot CPU enables PAT based on CPU feature */
74   - if (!smp_processor_id() && !pat_known_cpu())
  62 + if (!pat_wc_enabled)
75 63 return;
76 64  
77   - /* APs enable PAT iff boot CPU has enabled it before */
78   - if (smp_processor_id() && !pat_wc_enabled)
79   - return;
  65 + /* Paranoia check. */
  66 + if (!cpu_has_pat) {
  67 + printk(KERN_ERR "PAT enabled, but CPU feature cleared\n");
  68 + /*
  69 + * Panic if this happens on the secondary CPU, and we
  70 + * switched to PAT on the boot CPU. We have no way to
  71 + * undo PAT.
  72 + */
  73 + BUG_ON(boot_pat_state);
  74 + }
80 75  
81 76 /* Set PWT to Write-Combining. All other bits stay the same */
82 77 /*
83 78  
... ... @@ -95,9 +90,8 @@
95 90 PAT(4,WB) | PAT(5,WC) | PAT(6,UC_MINUS) | PAT(7,UC);
96 91  
97 92 /* Boot CPU check */
98   - if (!smp_processor_id()) {
  93 + if (!boot_pat_state)
99 94 rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
100   - }
101 95  
102 96 wrmsrl(MSR_IA32_CR_PAT, pat);
103 97 printk(KERN_INFO "x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
arch/x86/pci/k8-bus_64.c
Diff comments   View file @ 3e1b83a
... ... @@ -504,14 +504,6 @@
504 504 }
505 505 }
506 506  
507   -#ifdef CONFIG_NUMA
508   - for (i = 0; i < BUS_NR; i++) {
509   - node = mp_bus_to_node[i];
510   - if (node >= 0)
511   - printk(KERN_DEBUG "bus: %02x to node: %02x\n", i, node);
512   - }
513   -#endif
514   -
515 507 for (i = 0; i < pci_root_num; i++) {
516 508 int res_num;
517 509 int busnum;
include/asm-x86/bitops.h
Diff comments   View file @ 3e1b83a
... ... @@ -23,13 +23,10 @@
23 23 #if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1)
24 24 /* Technically wrong, but this avoids compilation errors on some gcc
25 25 versions. */
26   -#define ADDR "=m" (*(volatile long *)addr)
27   -#define BIT_ADDR "=m" (((volatile int *)addr)[nr >> 5])
  26 +#define ADDR "=m" (*(volatile long *) addr)
28 27 #else
29 28 #define ADDR "+m" (*(volatile long *) addr)
30   -#define BIT_ADDR "+m" (((volatile int *)addr)[nr >> 5])
31 29 #endif
32   -#define BASE_ADDR "m" (*(volatile int *)addr)
33 30  
34 31 /**
35 32 * set_bit - Atomically set a bit in memory
... ... @@ -77,7 +74,7 @@
77 74 */
78 75 static inline void clear_bit(int nr, volatile void *addr)
79 76 {
80   - asm volatile(LOCK_PREFIX "btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
  77 + asm volatile(LOCK_PREFIX "btr %1,%0" : ADDR : "Ir" (nr));
81 78 }
82 79  
83 80 /*
... ... @@ -96,7 +93,7 @@
96 93  
97 94 static inline void __clear_bit(int nr, volatile void *addr)
98 95 {
99   - asm volatile("btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
  96 + asm volatile("btr %1,%0" : ADDR : "Ir" (nr));
100 97 }
101 98  
102 99 /*
... ... @@ -131,7 +128,7 @@
131 128 */
132 129 static inline void __change_bit(int nr, volatile void *addr)
133 130 {
134   - asm volatile("btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
  131 + asm volatile("btc %1,%0" : ADDR : "Ir" (nr));
135 132 }
136 133  
137 134 /**
... ... @@ -145,7 +142,7 @@
145 142 */
146 143 static inline void change_bit(int nr, volatile void *addr)
147 144 {
148   - asm volatile(LOCK_PREFIX "btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR);
  145 + asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr));
149 146 }
150 147  
151 148 /**
... ... @@ -191,9 +188,10 @@
191 188 {
192 189 int oldbit;
193 190  
194   - asm volatile("bts %2,%3\n\t"
195   - "sbb %0,%0"
196   - : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR);
  191 + asm("bts %2,%1\n\t"
  192 + "sbb %0,%0"
  193 + : "=r" (oldbit), ADDR
  194 + : "Ir" (nr));
197 195 return oldbit;
198 196 }
199 197  
200 198  
... ... @@ -229,9 +227,10 @@
229 227 {
230 228 int oldbit;
231 229  
232   - asm volatile("btr %2,%3\n\t"
  230 + asm volatile("btr %2,%1\n\t"
233 231 "sbb %0,%0"
234   - : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR);
  232 + : "=r" (oldbit), ADDR
  233 + : "Ir" (nr));
235 234 return oldbit;
236 235 }
237 236  
238 237  
... ... @@ -240,9 +239,10 @@
240 239 {
241 240 int oldbit;
242 241  
243   - asm volatile("btc %2,%3\n\t"
  242 + asm volatile("btc %2,%1\n\t"
244 243 "sbb %0,%0"
245   - : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR);
  244 + : "=r" (oldbit), ADDR
  245 + : "Ir" (nr) : "memory");
246 246  
247 247 return oldbit;
248 248 }
249 249  
... ... @@ -276,11 +276,10 @@
276 276 {
277 277 int oldbit;
278 278  
279   - asm volatile("bt %2,%3\n\t"
  279 + asm volatile("bt %2,%1\n\t"
280 280 "sbb %0,%0"
281 281 : "=r" (oldbit)
282   - : "m" (((volatile const int *)addr)[nr >> 5]),
283   - "Ir" (nr), BASE_ADDR);
  282 + : "m" (*(unsigned long *)addr), "Ir" (nr));
284 283  
285 284 return oldbit;
286 285 }
... ... @@ -397,8 +396,6 @@
397 396 }
398 397 #endif /* __KERNEL__ */
399 398  
400   -#undef BASE_ADDR
401   -#undef BIT_ADDR
402 399 #undef ADDR
403 400  
404 401 static inline void set_bit_string(unsigned long *bitmap,
include/asm-x86/geode.h
Diff comments   View file @ 3e1b83a
... ... @@ -185,16 +185,14 @@
185 185 return (is_geode_gx() || is_geode_lx());
186 186 }
187 187  
188   -/*
189   - * The VSA has virtual registers that we can query for a signature.
190   - */
  188 +#ifdef CONFIG_MGEODE_LX
  189 +extern int geode_has_vsa2(void);
  190 +#else
191 191 static inline int geode_has_vsa2(void)
192 192 {
193   - outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
194   - outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
195   -
196   - return (inw(VSA_VRC_DATA) == VSA_SIG);
  193 + return 0;
197 194 }
  195 +#endif
198 196  
199 197 /* MFGPTs */
200 198  
include/asm-x86/i387.h
Diff comments   View file @ 3e1b83a
... ... @@ -175,7 +175,15 @@
175 175 */
176 176 static inline int restore_i387(struct _fpstate __user *buf)
177 177 {
178   - set_used_math();
  178 + struct task_struct *tsk = current;
  179 + int err;
  180 +
  181 + if (!used_math()) {
  182 + err = init_fpu(tsk);
  183 + if (err)
  184 + return err;
  185 + }
  186 +
179 187 if (!(task_thread_info(current)->status & TS_USEDFPU)) {
180 188 clts();
181 189 task_thread_info(current)->status |= TS_USEDFPU;
include/asm-x86/pat.h
Diff comments   View file @ 3e1b83a
... ... @@ -4,13 +4,21 @@
4 4  
5 5 #include <linux/types.h>
6 6  
  7 +#ifdef CONFIG_X86_PAT
7 8 extern int pat_wc_enabled;
  9 +extern void validate_pat_support(struct cpuinfo_x86 *c);
  10 +#else
  11 +static const int pat_wc_enabled = 0;
  12 +static inline void validate_pat_support(struct cpuinfo_x86 *c) { }
  13 +#endif
8 14  
9 15 extern void pat_init(void);
10 16  
11 17 extern int reserve_memtype(u64 start, u64 end,
12 18 unsigned long req_type, unsigned long *ret_type);
13 19 extern int free_memtype(u64 start, u64 end);
  20 +
  21 +extern void pat_disable(char *reason);
14 22  
15 23 #endif
include/asm-x86/topology.h
Diff comments   View file @ 3e1b83a
... ... @@ -25,6 +25,16 @@
25 25 #ifndef _ASM_X86_TOPOLOGY_H
26 26 #define _ASM_X86_TOPOLOGY_H
27 27  
  28 +#ifdef CONFIG_X86_32
  29 +# ifdef CONFIG_X86_HT
  30 +# define ENABLE_TOPO_DEFINES
  31 +# endif
  32 +#else
  33 +# ifdef CONFIG_SMP
  34 +# define ENABLE_TOPO_DEFINES
  35 +# endif
  36 +#endif
  37 +
28 38 #ifdef CONFIG_NUMA
29 39 #include <linux/cpumask.h>
30 40 #include <asm/mpspec.h>
31 41  
... ... @@ -130,20 +140,12 @@
130 140 extern unsigned long node_remap_size[];
131 141 #define node_has_online_mem(nid) (node_start_pfn[nid] != node_end_pfn[nid])
132 142  
133   -# ifdef CONFIG_X86_HT
134   -# define ENABLE_TOPO_DEFINES
135   -# endif
136   -
137 143 # define SD_CACHE_NICE_TRIES 1
138 144 # define SD_IDLE_IDX 1
139 145 # define SD_NEWIDLE_IDX 2
140 146 # define SD_FORKEXEC_IDX 0
141 147  
142 148 #else
143   -
144   -# ifdef CONFIG_SMP
145   -# define ENABLE_TOPO_DEFINES
146   -# endif
147 149  
148 150 # define SD_CACHE_NICE_TRIES 2
149 151 # define SD_IDLE_IDX 2