Commit 3f21cdee412089ed7ea12c3650bfb4211cf0b1d0
1 parent
786d7cdd06
Exists in
master
and in
7 other branches
[MIPS] PB1100: Fix pile of warnings
CC arch/mips/au1000/pb1100/board_setup.o arch/mips/au1000/pb1100/board_setup.c: In function ‘board_setup’: arch/mips/au1000/pb1100/board_setup.c:104: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast arch/mips/au1000/pb1100/board_setup.c:105: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast arch/mips/au1000/pb1100/board_setup.c:105: warning: passing argument 2 of ‘writeb’ makes pointer from integer without a cast arch/mips/au1000/pb1100/board_setup.c:109: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast arch/mips/au1000/pb1100/board_setup.c:110: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast arch/mips/au1000/pb1100/board_setup.c:110: warning: passing argument 2 of ‘writeb’ makes pointer from integer without a cast arch/mips/au1000/pb1100/board_setup.c:51: warning: unused variable ‘sys_clksrc’ arch/mips/au1000/pb1100/board_setup.c:51: warning: unused variable ‘sys_freqctrl’ arch/mips/au1000/pb1100/board_setup.c:50: warning: unused variable ‘pin_func’ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Showing 1 changed file with 48 additions and 45 deletions Side-by-side Diff
arch/mips/au1000/pb1100/board_setup.c
... | ... | @@ -47,8 +47,7 @@ |
47 | 47 | |
48 | 48 | void __init board_setup(void) |
49 | 49 | { |
50 | - u32 pin_func; | |
51 | - u32 sys_freqctrl, sys_clksrc; | |
50 | + volatile void __iomem * base = (volatile void __iomem *) 0xac000000UL; | |
52 | 51 | |
53 | 52 | // set AUX clock to 12MHz * 8 = 96 MHz |
54 | 53 | au_writel(8, SYS_AUXPLL); |
55 | 54 | |
56 | 55 | |
57 | 56 | |
58 | 57 | |
59 | 58 | |
60 | 59 | |
61 | 60 | |
62 | 61 | |
63 | 62 | |
64 | 63 | |
... | ... | @@ -56,58 +55,62 @@ |
56 | 55 | udelay(100); |
57 | 56 | |
58 | 57 | #ifdef CONFIG_USB_OHCI |
59 | - // configure pins GPIO[14:9] as GPIO | |
60 | - pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80); | |
58 | + { | |
59 | + u32 pin_func, sys_freqctrl, sys_clksrc; | |
61 | 60 | |
62 | - /* zero and disable FREQ2 */ | |
63 | - sys_freqctrl = au_readl(SYS_FREQCTRL0); | |
64 | - sys_freqctrl &= ~0xFFF00000; | |
65 | - au_writel(sys_freqctrl, SYS_FREQCTRL0); | |
61 | + // configure pins GPIO[14:9] as GPIO | |
62 | + pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80); | |
66 | 63 | |
67 | - /* zero and disable USBH/USBD/IrDA clock */ | |
68 | - sys_clksrc = au_readl(SYS_CLKSRC); | |
69 | - sys_clksrc &= ~0x0000001F; | |
70 | - au_writel(sys_clksrc, SYS_CLKSRC); | |
64 | + /* zero and disable FREQ2 */ | |
65 | + sys_freqctrl = au_readl(SYS_FREQCTRL0); | |
66 | + sys_freqctrl &= ~0xFFF00000; | |
67 | + au_writel(sys_freqctrl, SYS_FREQCTRL0); | |
71 | 68 | |
72 | - sys_freqctrl = au_readl(SYS_FREQCTRL0); | |
73 | - sys_freqctrl &= ~0xFFF00000; | |
69 | + /* zero and disable USBH/USBD/IrDA clock */ | |
70 | + sys_clksrc = au_readl(SYS_CLKSRC); | |
71 | + sys_clksrc &= ~0x0000001F; | |
72 | + au_writel(sys_clksrc, SYS_CLKSRC); | |
74 | 73 | |
75 | - sys_clksrc = au_readl(SYS_CLKSRC); | |
76 | - sys_clksrc &= ~0x0000001F; | |
74 | + sys_freqctrl = au_readl(SYS_FREQCTRL0); | |
75 | + sys_freqctrl &= ~0xFFF00000; | |
77 | 76 | |
78 | - // FREQ2 = aux/2 = 48 MHz | |
79 | - sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); | |
80 | - au_writel(sys_freqctrl, SYS_FREQCTRL0); | |
77 | + sys_clksrc = au_readl(SYS_CLKSRC); | |
78 | + sys_clksrc &= ~0x0000001F; | |
81 | 79 | |
82 | - /* | |
83 | - * Route 48MHz FREQ2 into USBH/USBD/IrDA | |
84 | - */ | |
85 | - sys_clksrc |= ((4<<2) | (0<<1) | 0 ); | |
86 | - au_writel(sys_clksrc, SYS_CLKSRC); | |
80 | + // FREQ2 = aux/2 = 48 MHz | |
81 | + sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); | |
82 | + au_writel(sys_freqctrl, SYS_FREQCTRL0); | |
87 | 83 | |
88 | - /* setup the static bus controller */ | |
89 | - au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ | |
90 | - au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ | |
91 | - au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ | |
84 | + /* | |
85 | + * Route 48MHz FREQ2 into USBH/USBD/IrDA | |
86 | + */ | |
87 | + sys_clksrc |= ((4<<2) | (0<<1) | 0 ); | |
88 | + au_writel(sys_clksrc, SYS_CLKSRC); | |
92 | 89 | |
93 | - // get USB Functionality pin state (device vs host drive pins) | |
94 | - pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); | |
95 | - // 2nd USB port is USB host | |
96 | - pin_func |= 0x8000; | |
97 | - au_writel(pin_func, SYS_PINFUNC); | |
90 | + /* setup the static bus controller */ | |
91 | + au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ | |
92 | + au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ | |
93 | + au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ | |
94 | + | |
95 | + // get USB Functionality pin state (device vs host drive pins) | |
96 | + pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); | |
97 | + // 2nd USB port is USB host | |
98 | + pin_func |= 0x8000; | |
99 | + au_writel(pin_func, SYS_PINFUNC); | |
100 | + } | |
98 | 101 | #endif // defined (CONFIG_USB_OHCI) |
99 | 102 | |
100 | 103 | /* Enable sys bus clock divider when IDLE state or no bus activity. */ |
101 | 104 | au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); |
102 | 105 | |
103 | 106 | // Enable the RTC if not already enabled |
104 | - if (!(readb(0xac000028) & 0x20)) { | |
105 | - writeb(readb(0xac000028) | 0x20, 0xac000028); | |
107 | + if (!(readb(base + 0x28) & 0x20)) { | |
108 | + writeb(readb(base + 0x28) | 0x20, base + 0x28); | |
106 | 109 | au_sync(); |
107 | 110 | } |
108 | 111 | // Put the clock in BCD mode |
109 | - if (readb(0xac00002C) & 0x4) { /* reg B */ | |
110 | - writeb(readb(0xac00002c) & ~0x4, 0xac00002c); | |
112 | + if (readb(base + 0x2C) & 0x4) { /* reg B */ | |
113 | + writeb(readb(base + 0x2c) & ~0x4, base + 0x2c); | |
111 | 114 | au_sync(); |
112 | 115 | } |
113 | 116 | } |