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Commit 3f9be35bd9090eaa2f68ed9b24efdbf3abcf4b28

Authored by Axel Lin
Committed by Samuel Ortiz
1 parent 302b95621d
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

mfd: rc5t583: Fix array subscript is above array bounds 

I got below build warning while compiling this driver.
It's obviously RC5T583_MAX_INTERRUPT_MASK_REGS is 9 but irq_en_add
array only has 8 elements.

  CC      drivers/mfd/rc5t583-irq.o
drivers/mfd/rc5t583-irq.c: In function 'rc5t583_irq_sync_unlock':
drivers/mfd/rc5t583-irq.c:227: warning: array subscript is above array bounds
drivers/mfd/rc5t583-irq.c: In function 'rc5t583_irq_init':
drivers/mfd/rc5t583-irq.c:349: warning: array subscript is above array bounds

Since the number of interrupt enable registers is 8, this patch adds
define for RC5T583_MAX_INTERRUPT_EN_REGS to fix this bug.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

Showing 2 changed files with 3 additions and 2 deletions Side-by-side Diff

drivers/mfd/rc5t583-irq.c
Diff comments   View file @ 3f9be35
... ... @@ -345,7 +345,7 @@
345 345 mutex_init(&rc5t583->irq_lock);
346 346  
347 347 /* Initailize all int register to 0 */
348   - for (i = 0; i < RC5T583_MAX_INTERRUPT_MASK_REGS; i++) {
  348 + for (i = 0; i < RC5T583_MAX_INTERRUPT_EN_REGS; i++) {
349 349 ret = rc5t583_write(rc5t583->dev, irq_en_add[i],
350 350 rc5t583->irq_en_reg[i]);
351 351 if (ret < 0)
include/linux/mfd/rc5t583.h
Diff comments   View file @ 3f9be35
... ... @@ -33,6 +33,7 @@
33 33 /* Maximum number of main interrupts */
34 34 #define MAX_MAIN_INTERRUPT 5
35 35 #define RC5T583_MAX_GPEDGE_REG 2
  36 +#define RC5T583_MAX_INTERRUPT_EN_REGS 8
36 37 #define RC5T583_MAX_INTERRUPT_MASK_REGS 9
37 38  
38 39 /* Interrupt enable register */
... ... @@ -304,7 +305,7 @@
304 305 uint8_t intc_inten_reg;
305 306  
306 307 /* For group interrupt bits and address */
307   - uint8_t irq_en_reg[RC5T583_MAX_INTERRUPT_MASK_REGS];
  308 + uint8_t irq_en_reg[RC5T583_MAX_INTERRUPT_EN_REGS];
308 309  
309 310 /* For gpio edge */
310 311 uint8_t gpedge_reg[RC5T583_MAX_GPEDGE_REG];