x86: i8259: Convert to new irq_chip functions

Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>

x86: i8259: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
Thomas Gleixner
1 parent 020dd984d7
Showing 5 changed files with 47 additions and 44 deletions Side-by-side Diff
arch/x86/include/asm/i8259.h
arch/x86/kernel/apic/io_apic.c
arch/x86/kernel/apic/nmi.c
arch/x86/kernel/i8259.c
arch/x86/kernel/smpboot.c
@@ -55,6 +55,8 @@
 struct legacy_pic {
 	int nr_legacy_irqs;
 	struct irq_chip *chip;
+	void (*mask)(unsigned int irq);
+	void (*unmask)(unsigned int irq);
 	void (*mask_all)(void);
 	void (*restore_mask)(void);
 	void (*init)(int auto_eoi);
@@ -1459,7 +1459,7 @@
  
 	ioapic_register_intr(irq, desc, trigger);
 	if (irq < legacy_pic->nr_legacy_irqs)
-		legacy_pic->chip->mask(irq);
+		legacy_pic->mask(irq);
  
 	ioapic_write_entry(apic_id, pin, entry);
 }
@@ -2233,7 +2233,7 @@
  
 	raw_spin_lock_irqsave(&ioapic_lock, flags);
 	if (irq < legacy_pic->nr_legacy_irqs) {
-		legacy_pic->chip->mask(irq);
+		legacy_pic->mask(irq);
 		if (legacy_pic->irq_pending(irq))
 			was_pending = 1;
 	}
@@ -2928,7 +2928,7 @@
 	/*
 	 * get/set the timer IRQ vector:
 	 */
-	legacy_pic->chip->mask(0);
+	legacy_pic->mask(0);
 	assign_irq_vector(0, cfg, apic->target_cpus());
  
 	/*
@@ -3000,7 +3000,7 @@
 		if (timer_irq_works()) {
 			if (nmi_watchdog == NMI_IO_APIC) {
 				setup_nmi();
-				legacy_pic->chip->unmask(0);
+				legacy_pic->unmask(0);
 			}
 			if (disable_timer_pin_1 > 0)
 				clear_IO_APIC_pin(0, pin1);
  
  
@@ -3023,14 +3023,14 @@
 		 */
 		replace_pin_at_irq_node(cfg, node, apic1, pin1, apic2, pin2);
 		setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);
-		legacy_pic->chip->unmask(0);
+		legacy_pic->unmask(0);
 		if (timer_irq_works()) {
 			apic_printk(APIC_QUIET, KERN_INFO "....... works.\n");
 			timer_through_8259 = 1;
 			if (nmi_watchdog == NMI_IO_APIC) {
-				legacy_pic->chip->mask(0);
+				legacy_pic->mask(0);
 				setup_nmi();
-				legacy_pic->chip->unmask(0);
+				legacy_pic->unmask(0);
 			}
 			goto out;
 		}
@@ -3038,7 +3038,7 @@
 		 * Cleanup, just in case ...
 		 */
 		local_irq_disable();
-		legacy_pic->chip->mask(0);
+		legacy_pic->mask(0);
 		clear_IO_APIC_pin(apic2, pin2);
 		apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n");
 	}
  
@@ -3057,14 +3057,14 @@
  
 	lapic_register_intr(0, desc);
 	apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector);	/* Fixed mode */
-	legacy_pic->chip->unmask(0);
+	legacy_pic->unmask(0);
  
 	if (timer_irq_works()) {
 		apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");
 		goto out;
 	}
 	local_irq_disable();
-	legacy_pic->chip->mask(0);
+	legacy_pic->mask(0);
 	apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector);
 	apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n");
  
@@ -178,7 +178,7 @@
 error:
 	if (nmi_watchdog == NMI_IO_APIC) {
 		if (!timer_through_8259)
-			legacy_pic->chip->mask(0);
+			legacy_pic->mask(0);
 		on_each_cpu(__acpi_nmi_disable, NULL, 1);
 	}
  
@@ -29,25 +29,11 @@
  * plus some generic x86 specific things if generic specifics makes
  * any sense at all.
  */
+static void init_8259A(int auto_eoi);
  
 static int i8259A_auto_eoi;
 DEFINE_RAW_SPINLOCK(i8259A_lock);
-static void mask_and_ack_8259A(unsigned int);
-static void mask_8259A(void);
-static void unmask_8259A(void);
-static void disable_8259A_irq(unsigned int irq);
-static void enable_8259A_irq(unsigned int irq);
-static void init_8259A(int auto_eoi);
-static int i8259A_irq_pending(unsigned int irq);
  
-struct irq_chip i8259A_chip = {
-	.name		= "XT-PIC",
-	.mask		= disable_8259A_irq,
-	.disable	= disable_8259A_irq,
-	.unmask		= enable_8259A_irq,
-	.mask_ack	= mask_and_ack_8259A,
-};
-
 /*
  * 8259A PIC functions to handle ISA devices:
  */
@@ -68,7 +54,7 @@
  */
 unsigned long io_apic_irqs;
  
-static void disable_8259A_irq(unsigned int irq)
+static void mask_8259A_irq(unsigned int irq)
 {
 	unsigned int mask = 1 << irq;
 	unsigned long flags;
  
@@ -82,8 +68,13 @@
 	raw_spin_unlock_irqrestore(&i8259A_lock, flags);
 }
  
-static void enable_8259A_irq(unsigned int irq)
+static void disable_8259A_irq(struct irq_data *data)
 {
+	mask_8259A_irq(data->irq);
+}
+
+static void unmask_8259A_irq(unsigned int irq)
+{
 	unsigned int mask = ~(1 << irq);
 	unsigned long flags;
  
@@ -96,6 +87,11 @@
 	raw_spin_unlock_irqrestore(&i8259A_lock, flags);
 }
  
+static void enable_8259A_irq(struct irq_data *data)
+{
+	unmask_8259A_irq(data->irq);
+}
+
 static int i8259A_irq_pending(unsigned int irq)
 {
 	unsigned int mask = 1<<irq;
@@ -117,7 +113,7 @@
 	disable_irq_nosync(irq);
 	io_apic_irqs &= ~(1<<irq);
 	set_irq_chip_and_handler_name(irq, &i8259A_chip, handle_level_irq,
-				      "XT");
+				      i8259A_chip.name);
 	enable_irq(irq);
 }
  
  
@@ -150,8 +146,9 @@
  * first, _then_ send the EOI, and the order of EOI
  * to the two 8259s is important!
  */
-static void mask_and_ack_8259A(unsigned int irq)
+static void mask_and_ack_8259A(struct irq_data *data)
 {
+	unsigned int irq = data->irq;
 	unsigned int irqmask = 1 << irq;
 	unsigned long flags;
  
@@ -223,6 +220,14 @@
 	}
 }
  
+struct irq_chip i8259A_chip = {
+	.name		= "XT-PIC",
+	.irq_mask	= disable_8259A_irq,
+	.irq_disable	= disable_8259A_irq,
+	.irq_unmask	= enable_8259A_irq,
+	.irq_mask_ack	= mask_and_ack_8259A,
+};
+
 static char irq_trigger[2];
 /**
  * ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ
  
@@ -342,9 +347,9 @@
 		 * In AEOI mode we just have to mask the interrupt
 		 * when acking.
 		 */
-		i8259A_chip.mask_ack = disable_8259A_irq;
+		i8259A_chip.irq_mask_ack = disable_8259A_irq;
 	else
-		i8259A_chip.mask_ack = mask_and_ack_8259A;
+		i8259A_chip.irq_mask_ack = mask_and_ack_8259A;
  
 	udelay(100);		/* wait for 8259A to initialize */
  
@@ -363,14 +368,6 @@
 static void legacy_pic_noop(void) { };
 static void legacy_pic_uint_noop(unsigned int unused) { };
 static void legacy_pic_int_noop(int unused) { };
-
-static struct irq_chip dummy_pic_chip  = {
-	.name = "dummy pic",
-	.mask = legacy_pic_uint_noop,
-	.unmask = legacy_pic_uint_noop,
-	.disable = legacy_pic_uint_noop,
-	.mask_ack = legacy_pic_uint_noop,
-};
 static int legacy_pic_irq_pending_noop(unsigned int irq)
 {
 	return 0;
@@ -378,7 +375,9 @@
  
 struct legacy_pic null_legacy_pic = {
 	.nr_legacy_irqs = 0,
-	.chip = &dummy_pic_chip,
+	.chip = &dummy_irq_chip,
+	.mask = legacy_pic_uint_noop,
+	.unmask = legacy_pic_uint_noop,
 	.mask_all = legacy_pic_noop,
 	.restore_mask = legacy_pic_noop,
 	.init = legacy_pic_int_noop,
@@ -389,7 +388,9 @@
 struct legacy_pic default_legacy_pic = {
 	.nr_legacy_irqs = NR_IRQS_LEGACY,
 	.chip  = &i8259A_chip,
-	.mask_all  = mask_8259A,
+	.mask = mask_8259A_irq,
+	.unmask = unmask_8259A_irq,
+	.mask_all = mask_8259A,
 	.restore_mask = unmask_8259A,
 	.init = init_8259A,
 	.irq_pending = i8259A_irq_pending,
@@ -324,9 +324,9 @@
 	check_tsc_sync_target();
  
 	if (nmi_watchdog == NMI_IO_APIC) {
-		legacy_pic->chip->mask(0);
+		legacy_pic->mask(0);
 		enable_NMI_through_LVT0();
-		legacy_pic->chip->unmask(0);
+		legacy_pic->unmask(0);
 	}
  
 	/* This must be done before setting cpu_online_mask */
...	...	@@ -55,6 +55,8 @@
55	55	struct legacy_pic {
56	56	int nr_legacy_irqs;
57	57	struct irq_chip *chip;
	58	+ void (*mask)(unsigned int irq);
	59	+ void (*unmask)(unsigned int irq);
58	60	void (*mask_all)(void);
59	61	void (*restore_mask)(void);
60	62	void (*init)(int auto_eoi);
...	...	@@ -1459,7 +1459,7 @@
1459	1459
1460	1460	ioapic_register_intr(irq, desc, trigger);
1461	1461	if (irq < legacy_pic->nr_legacy_irqs)
1462		- legacy_pic->chip->mask(irq);
	1462	+ legacy_pic->mask(irq);
1463	1463
1464	1464	ioapic_write_entry(apic_id, pin, entry);
1465	1465	}
...	...	@@ -2233,7 +2233,7 @@
2233	2233
2234	2234	raw_spin_lock_irqsave(&ioapic_lock, flags);
2235	2235	if (irq < legacy_pic->nr_legacy_irqs) {
2236		- legacy_pic->chip->mask(irq);
	2236	+ legacy_pic->mask(irq);
2237	2237	if (legacy_pic->irq_pending(irq))
2238	2238	was_pending = 1;
2239	2239	}
...	...	@@ -2928,7 +2928,7 @@
2928	2928	/*
2929	2929	* get/set the timer IRQ vector:
2930	2930	*/
2931		- legacy_pic->chip->mask(0);
	2931	+ legacy_pic->mask(0);
2932	2932	assign_irq_vector(0, cfg, apic->target_cpus());
2933	2933
2934	2934	/*
...	...	@@ -3000,7 +3000,7 @@
3000	3000	if (timer_irq_works()) {
3001	3001	if (nmi_watchdog == NMI_IO_APIC) {
3002	3002	setup_nmi();
3003		- legacy_pic->chip->unmask(0);
	3003	+ legacy_pic->unmask(0);
3004	3004	}
3005	3005	if (disable_timer_pin_1 > 0)
3006	3006	clear_IO_APIC_pin(0, pin1);
3007	3007
3008	3008
...	...	@@ -3023,14 +3023,14 @@
3023	3023	*/
3024	3024	replace_pin_at_irq_node(cfg, node, apic1, pin1, apic2, pin2);
3025	3025	setup_timer_IRQ0_pin(apic2, pin2, cfg->vector);
3026		- legacy_pic->chip->unmask(0);
	3026	+ legacy_pic->unmask(0);
3027	3027	if (timer_irq_works()) {
3028	3028	apic_printk(APIC_QUIET, KERN_INFO "....... works.\n");
3029	3029	timer_through_8259 = 1;
3030	3030	if (nmi_watchdog == NMI_IO_APIC) {
3031		- legacy_pic->chip->mask(0);
	3031	+ legacy_pic->mask(0);
3032	3032	setup_nmi();
3033		- legacy_pic->chip->unmask(0);
	3033	+ legacy_pic->unmask(0);
3034	3034	}
3035	3035	goto out;
3036	3036	}
...	...	@@ -3038,7 +3038,7 @@
3038	3038	* Cleanup, just in case ...
3039	3039	*/
3040	3040	local_irq_disable();
3041		- legacy_pic->chip->mask(0);
	3041	+ legacy_pic->mask(0);
3042	3042	clear_IO_APIC_pin(apic2, pin2);
3043	3043	apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n");
3044	3044	}
3045	3045
...	...	@@ -3057,14 +3057,14 @@
3057	3057
3058	3058	lapic_register_intr(0, desc);
3059	3059	apic_write(APIC_LVT0, APIC_DM_FIXED \| cfg->vector); /* Fixed mode */
3060		- legacy_pic->chip->unmask(0);
	3060	+ legacy_pic->unmask(0);
3061	3061
3062	3062	if (timer_irq_works()) {
3063	3063	apic_printk(APIC_QUIET, KERN_INFO "..... works.\n");
3064	3064	goto out;
3065	3065	}
3066	3066	local_irq_disable();
3067		- legacy_pic->chip->mask(0);
	3067	+ legacy_pic->mask(0);
3068	3068	apic_write(APIC_LVT0, APIC_LVT_MASKED \| APIC_DM_FIXED \| cfg->vector);
3069	3069	apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n");
3070	3070
...	...	@@ -178,7 +178,7 @@
178	178	error:
179	179	if (nmi_watchdog == NMI_IO_APIC) {
180	180	if (!timer_through_8259)
181		- legacy_pic->chip->mask(0);
	181	+ legacy_pic->mask(0);
182	182	on_each_cpu(__acpi_nmi_disable, NULL, 1);
183	183	}
184	184
...	...	@@ -29,25 +29,11 @@
29	29	* plus some generic x86 specific things if generic specifics makes
30	30	* any sense at all.
31	31	*/
	32	+static void init_8259A(int auto_eoi);
32	33
33	34	static int i8259A_auto_eoi;
34	35	DEFINE_RAW_SPINLOCK(i8259A_lock);
35		-static void mask_and_ack_8259A(unsigned int);
36		-static void mask_8259A(void);
37		-static void unmask_8259A(void);
38		-static void disable_8259A_irq(unsigned int irq);
39		-static void enable_8259A_irq(unsigned int irq);
40		-static void init_8259A(int auto_eoi);
41		-static int i8259A_irq_pending(unsigned int irq);
42	36
43		-struct irq_chip i8259A_chip = {
44		- .name = "XT-PIC",
45		- .mask = disable_8259A_irq,
46		- .disable = disable_8259A_irq,
47		- .unmask = enable_8259A_irq,
48		- .mask_ack = mask_and_ack_8259A,
49		-};
50		-
51	37	/*
52	38	* 8259A PIC functions to handle ISA devices:
53	39	*/
...	...	@@ -68,7 +54,7 @@
68	54	*/
69	55	unsigned long io_apic_irqs;
70	56
71		-static void disable_8259A_irq(unsigned int irq)
	57	+static void mask_8259A_irq(unsigned int irq)
72	58	{
73	59	unsigned int mask = 1 << irq;
74	60	unsigned long flags;
75	61
...	...	@@ -82,8 +68,13 @@
82	68	raw_spin_unlock_irqrestore(&i8259A_lock, flags);
83	69	}
84	70
85		-static void enable_8259A_irq(unsigned int irq)
	71	+static void disable_8259A_irq(struct irq_data *data)
86	72	{
	73	+ mask_8259A_irq(data->irq);
	74	+}
	75	+
	76	+static void unmask_8259A_irq(unsigned int irq)
	77	+{
87	78	unsigned int mask = ~(1 << irq);
88	79	unsigned long flags;
89	80
...	...	@@ -96,6 +87,11 @@
96	87	raw_spin_unlock_irqrestore(&i8259A_lock, flags);
97	88	}
98	89
	90	+static void enable_8259A_irq(struct irq_data *data)
	91	+{
	92	+ unmask_8259A_irq(data->irq);
	93	+}
	94	+
99	95	static int i8259A_irq_pending(unsigned int irq)
100	96	{
101	97	unsigned int mask = 1<<irq;
...	...	@@ -117,7 +113,7 @@
117	113	disable_irq_nosync(irq);
118	114	io_apic_irqs &= ~(1<<irq);
119	115	set_irq_chip_and_handler_name(irq, &i8259A_chip, handle_level_irq,
120		- "XT");
	116	+ i8259A_chip.name);
121	117	enable_irq(irq);
122	118	}
123	119
124	120
...	...	@@ -150,8 +146,9 @@
150	146	* first, _then_ send the EOI, and the order of EOI
151	147	* to the two 8259s is important!
152	148	*/
153		-static void mask_and_ack_8259A(unsigned int irq)
	149	+static void mask_and_ack_8259A(struct irq_data *data)
154	150	{
	151	+ unsigned int irq = data->irq;
155	152	unsigned int irqmask = 1 << irq;
156	153	unsigned long flags;
157	154
...	...	@@ -223,6 +220,14 @@
223	220	}
224	221	}
225	222
	223	+struct irq_chip i8259A_chip = {
	224	+ .name = "XT-PIC",
	225	+ .irq_mask = disable_8259A_irq,
	226	+ .irq_disable = disable_8259A_irq,
	227	+ .irq_unmask = enable_8259A_irq,
	228	+ .irq_mask_ack = mask_and_ack_8259A,
	229	+};
	230	+
226	231	static char irq_trigger[2];
227	232	/**
228	233	* ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ
229	234
...	...	@@ -342,9 +347,9 @@
342	347	* In AEOI mode we just have to mask the interrupt
343	348	* when acking.
344	349	*/
345		- i8259A_chip.mask_ack = disable_8259A_irq;
	350	+ i8259A_chip.irq_mask_ack = disable_8259A_irq;
346	351	else
347		- i8259A_chip.mask_ack = mask_and_ack_8259A;
	352	+ i8259A_chip.irq_mask_ack = mask_and_ack_8259A;
348	353
349	354	udelay(100); /* wait for 8259A to initialize */
350	355
...	...	@@ -363,14 +368,6 @@
363	368	static void legacy_pic_noop(void) { };
364	369	static void legacy_pic_uint_noop(unsigned int unused) { };
365	370	static void legacy_pic_int_noop(int unused) { };
366		-
367		-static struct irq_chip dummy_pic_chip = {
368		- .name = "dummy pic",
369		- .mask = legacy_pic_uint_noop,
370		- .unmask = legacy_pic_uint_noop,
371		- .disable = legacy_pic_uint_noop,
372		- .mask_ack = legacy_pic_uint_noop,
373		-};
374	371	static int legacy_pic_irq_pending_noop(unsigned int irq)
375	372	{
376	373	return 0;
...	...	@@ -378,7 +375,9 @@
378	375
379	376	struct legacy_pic null_legacy_pic = {
380	377	.nr_legacy_irqs = 0,
381		- .chip = &dummy_pic_chip,
	378	+ .chip = &dummy_irq_chip,
	379	+ .mask = legacy_pic_uint_noop,
	380	+ .unmask = legacy_pic_uint_noop,
382	381	.mask_all = legacy_pic_noop,
383	382	.restore_mask = legacy_pic_noop,
384	383	.init = legacy_pic_int_noop,
...	...	@@ -389,7 +388,9 @@
389	388	struct legacy_pic default_legacy_pic = {
390	389	.nr_legacy_irqs = NR_IRQS_LEGACY,
391	390	.chip = &i8259A_chip,
392		- .mask_all = mask_8259A,
	391	+ .mask = mask_8259A_irq,
	392	+ .unmask = unmask_8259A_irq,
	393	+ .mask_all = mask_8259A,
393	394	.restore_mask = unmask_8259A,
394	395	.init = init_8259A,
395	396	.irq_pending = i8259A_irq_pending,
...	...	@@ -324,9 +324,9 @@
324	324	check_tsc_sync_target();
325	325
326	326	if (nmi_watchdog == NMI_IO_APIC) {
327		- legacy_pic->chip->mask(0);
	327	+ legacy_pic->mask(0);
328	328	enable_NMI_through_LVT0();
329		- legacy_pic->chip->unmask(0);
	329	+ legacy_pic->unmask(0);
330	330	}
331	331
332	332	/* This must be done before setting cpu_online_mask */