Commit 4312a7ef9cd744849e16ef4bdeb7ca6beec9ec76

Authored by Stephen Boyd
Committed by David Brown
1 parent 66a8950949

ARM: msm: Allow timer.c to compile on multiple targets

The timer code relies on #defines from mach/iomap.h, cpu_is_*()
checks, and a global irq #define. All this makes this file
impossible to compile in a mult-target build. Therefore, make a
sys_timer struct for each SoC so that machine descriptors can
reference the correct timer. Then go through and replace all the
defines with raw values that are passed to a common
initialization function.

This paves the way to adding DT support to this code as well as
allows us to compile this file on multiple targets at the same
time.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>

Showing 9 changed files with 125 additions and 60 deletions Side-by-side Diff

arch/arm/mach-msm/board-halibut.c
... ... @@ -36,6 +36,7 @@
36 36 #include <linux/mtd/partitions.h>
37 37  
38 38 #include "devices.h"
  39 +#include "common.h"
39 40  
40 41 static struct resource smc91x_resources[] = {
41 42 [0] = {
... ... @@ -66,8 +67,6 @@
66 67 &smc91x_device,
67 68 };
68 69  
69   -extern struct sys_timer msm_timer;
70   -
71 70 static void __init halibut_init_early(void)
72 71 {
73 72 arch_ioremap_caller = __msm_ioremap_caller;
... ... @@ -107,6 +106,6 @@
107 106 .init_irq = halibut_init_irq,
108 107 .init_machine = halibut_init,
109 108 .init_late = halibut_init_late,
110   - .timer = &msm_timer,
  109 + .timer = &msm7x01_timer,
111 110 MACHINE_END
arch/arm/mach-msm/board-msm7x30.c
... ... @@ -38,9 +38,8 @@
38 38 #include "devices.h"
39 39 #include "gpiomux.h"
40 40 #include "proc_comm.h"
  41 +#include "common.h"
41 42  
42   -extern struct sys_timer msm_timer;
43   -
44 43 static void __init msm7x30_fixup(struct tag *tag, char **cmdline,
45 44 struct meminfo *mi)
46 45 {
... ... @@ -132,7 +131,7 @@
132 131 .init_irq = msm7x30_init_irq,
133 132 .init_machine = msm7x30_init,
134 133 .init_late = msm7x30_init_late,
135   - .timer = &msm_timer,
  134 + .timer = &msm7x30_timer,
136 135 MACHINE_END
137 136  
138 137 MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
... ... @@ -143,7 +142,7 @@
143 142 .init_irq = msm7x30_init_irq,
144 143 .init_machine = msm7x30_init,
145 144 .init_late = msm7x30_init_late,
146   - .timer = &msm_timer,
  145 + .timer = &msm7x30_timer,
147 146 MACHINE_END
148 147  
149 148 MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
... ... @@ -154,6 +153,6 @@
154 153 .init_irq = msm7x30_init_irq,
155 154 .init_machine = msm7x30_init,
156 155 .init_late = msm7x30_init_late,
157   - .timer = &msm_timer,
  156 + .timer = &msm7x30_timer,
158 157 MACHINE_END
arch/arm/mach-msm/board-msm8960.c
... ... @@ -31,6 +31,7 @@
31 31 #include <mach/msm_iomap.h>
32 32  
33 33 #include "devices.h"
  34 +#include "common.h"
34 35  
35 36 static void __init msm8960_fixup(struct tag *tag, char **cmdline,
36 37 struct meminfo *mi)
... ... @@ -90,7 +91,7 @@
90 91 .reserve = msm8960_reserve,
91 92 .map_io = msm8960_map_io,
92 93 .init_irq = msm8960_init_irq,
93   - .timer = &msm_timer,
  94 + .timer = &msm8960_timer,
94 95 .handle_irq = gic_handle_irq,
95 96 .init_machine = msm8960_sim_init,
96 97 .init_late = msm8960_init_late,
... ... @@ -101,7 +102,7 @@
101 102 .reserve = msm8960_reserve,
102 103 .map_io = msm8960_map_io,
103 104 .init_irq = msm8960_init_irq,
104   - .timer = &msm_timer,
  105 + .timer = &msm8960_timer,
105 106 .handle_irq = gic_handle_irq,
106 107 .init_machine = msm8960_rumi3_init,
107 108 .init_late = msm8960_init_late,
arch/arm/mach-msm/board-msm8x60.c
... ... @@ -28,6 +28,7 @@
28 28  
29 29 #include <mach/board.h>
30 30 #include <mach/msm_iomap.h>
  31 +#include "common.h"
31 32  
32 33 static void __init msm8x60_fixup(struct tag *tag, char **cmdline,
33 34 struct meminfo *mi)
... ... @@ -114,7 +115,7 @@
114 115 .handle_irq = gic_handle_irq,
115 116 .init_machine = msm8x60_init,
116 117 .init_late = msm8x60_init_late,
117   - .timer = &msm_timer,
  118 + .timer = &msm8x60_timer,
118 119 MACHINE_END
119 120  
120 121 MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
... ... @@ -125,7 +126,7 @@
125 126 .handle_irq = gic_handle_irq,
126 127 .init_machine = msm8x60_init,
127 128 .init_late = msm8x60_init_late,
128   - .timer = &msm_timer,
  129 + .timer = &msm8x60_timer,
129 130 MACHINE_END
130 131  
131 132 MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
... ... @@ -136,7 +137,7 @@
136 137 .handle_irq = gic_handle_irq,
137 138 .init_machine = msm8x60_init,
138 139 .init_late = msm8x60_init_late,
139   - .timer = &msm_timer,
  140 + .timer = &msm8x60_timer,
140 141 MACHINE_END
141 142  
142 143 MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
... ... @@ -147,7 +148,7 @@
147 148 .handle_irq = gic_handle_irq,
148 149 .init_machine = msm8x60_init,
149 150 .init_late = msm8x60_init_late,
150   - .timer = &msm_timer,
  151 + .timer = &msm8x60_timer,
151 152 MACHINE_END
152 153  
153 154 #ifdef CONFIG_OF
... ... @@ -158,7 +159,7 @@
158 159 .handle_irq = gic_handle_irq,
159 160 .init_machine = msm8x60_dt_init,
160 161 .init_late = msm8x60_init_late,
161   - .timer = &msm_timer,
  162 + .timer = &msm8x60_timer,
162 163 .dt_compat = msm8x60_fluid_match,
163 164 MACHINE_END
164 165 #endif /* CONFIG_OF */
arch/arm/mach-msm/board-qsd8x50.c
... ... @@ -35,9 +35,8 @@
35 35 #include <mach/mmc.h>
36 36  
37 37 #include "devices.h"
  38 +#include "common.h"
38 39  
39   -extern struct sys_timer msm_timer;
40   -
41 40 static const resource_size_t qsd8x50_surf_smc91x_base __initdata = 0x70000300;
42 41 static const unsigned qsd8x50_surf_smc91x_gpio __initdata = 156;
43 42  
... ... @@ -201,7 +200,7 @@
201 200 .init_irq = qsd8x50_init_irq,
202 201 .init_machine = qsd8x50_init,
203 202 .init_late = qsd8x50_init_late,
204   - .timer = &msm_timer,
  203 + .timer = &qsd8x50_timer,
205 204 MACHINE_END
206 205  
207 206 MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
... ... @@ -210,6 +209,6 @@
210 209 .init_irq = qsd8x50_init_irq,
211 210 .init_machine = qsd8x50_init,
212 211 .init_late = qsd8x50_init_late,
213   - .timer = &msm_timer,
  212 + .timer = &qsd8x50_timer,
214 213 MACHINE_END
arch/arm/mach-msm/board-trout.c
... ... @@ -31,6 +31,7 @@
31 31  
32 32 #include "devices.h"
33 33 #include "board-trout.h"
  34 +#include "common.h"
34 35  
35 36 extern int trout_init_mmc(unsigned int);
36 37  
... ... @@ -42,8 +43,6 @@
42 43 &msm_device_i2c,
43 44 };
44 45  
45   -extern struct sys_timer msm_timer;
46   -
47 46 static void __init trout_init_early(void)
48 47 {
49 48 arch_ioremap_caller = __msm_ioremap_caller;
... ... @@ -111,6 +110,6 @@
111 110 .init_irq = trout_init_irq,
112 111 .init_machine = trout_init,
113 112 .init_late = trout_init_late,
114   - .timer = &msm_timer,
  113 + .timer = &msm7x01_timer,
115 114 MACHINE_END
arch/arm/mach-msm/common.h
  1 +/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
  2 + *
  3 + * This program is free software; you can redistribute it and/or modify
  4 + * it under the terms of the GNU General Public License version 2 and
  5 + * only version 2 as published by the Free Software Foundation.
  6 + *
  7 + * This program is distributed in the hope that it will be useful,
  8 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10 + * GNU General Public License for more details.
  11 + */
  12 +#ifndef __MACH_COMMON_H
  13 +#define __MACH_COMMON_H
  14 +
  15 +extern struct sys_timer msm7x01_timer;
  16 +extern struct sys_timer msm7x30_timer;
  17 +extern struct sys_timer msm8x60_timer;
  18 +extern struct sys_timer msm8960_timer;
  19 +extern struct sys_timer qsd8x50_timer;
  20 +
  21 +#endif
arch/arm/mach-msm/include/mach/board.h
... ... @@ -33,8 +33,6 @@
33 33  
34 34 struct clk_lookup;
35 35  
36   -extern struct sys_timer msm_timer;
37   -
38 36 /* common init routines for use by arch/arm/mach-msm/board-*.c */
39 37  
40 38 void __init msm_add_devices(void);
arch/arm/mach-msm/timer.c
1 1 /*
2 2 *
3 3 * Copyright (C) 2007 Google, Inc.
4   - * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
  4 + * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved.
5 5 *
6 6 * This software is licensed under the terms of the GNU General Public
7 7 * License version 2, as published by the Free Software Foundation, and
... ... @@ -26,9 +26,7 @@
26 26 #include <asm/localtimer.h>
27 27 #include <asm/sched_clock.h>
28 28  
29   -#include <mach/msm_iomap.h>
30   -#include <mach/cpu.h>
31   -#include <mach/board.h>
  29 +#include "common.h"
32 30  
33 31 #define TIMER_MATCH_VAL 0x0000
34 32 #define TIMER_COUNT_VAL 0x0004
... ... @@ -36,7 +34,7 @@
36 34 #define TIMER_ENABLE_CLR_ON_MATCH_EN BIT(1)
37 35 #define TIMER_ENABLE_EN BIT(0)
38 36 #define TIMER_CLEAR 0x000C
39   -#define DGT_CLK_CTL 0x0034
  37 +#define DGT_CLK_CTL 0x0030
40 38 #define DGT_CLK_CTL_DIV_4 0x3
41 39  
42 40 #define GPT_HZ 32768
43 41  
44 42  
45 43  
46 44  
47 45  
... ... @@ -172,44 +170,21 @@
172 170 return msm_clocksource.read(&msm_clocksource);
173 171 }
174 172  
175   -static void __init msm_timer_init(void)
  173 +static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq,
  174 + bool percpu)
176 175 {
177 176 struct clock_event_device *ce = &msm_clockevent;
178 177 struct clocksource *cs = &msm_clocksource;
179 178 int res;
180   - u32 dgt_hz;
181 179  
182   - if (cpu_is_msm7x01()) {
183   - event_base = MSM_CSR_BASE;
184   - source_base = MSM_CSR_BASE + 0x10;
185   - dgt_hz = 19200000 >> MSM_DGT_SHIFT; /* 600 KHz */
186   - cs->read = msm_read_timer_count_shift;
187   - cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT));
188   - } else if (cpu_is_msm7x30()) {
189   - event_base = MSM_CSR_BASE + 0x04;
190   - source_base = MSM_CSR_BASE + 0x24;
191   - dgt_hz = 24576000 / 4;
192   - } else if (cpu_is_qsd8x50()) {
193   - event_base = MSM_CSR_BASE;
194   - source_base = MSM_CSR_BASE + 0x10;
195   - dgt_hz = 19200000 / 4;
196   - } else if (cpu_is_msm8x60() || cpu_is_msm8960()) {
197   - event_base = MSM_TMR_BASE + 0x04;
198   - /* Use CPU0's timer as the global clock source. */
199   - source_base = MSM_TMR0_BASE + 0x24;
200   - dgt_hz = 27000000 / 4;
201   - writel_relaxed(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL);
202   - } else
203   - BUG();
204   -
205 180 writel_relaxed(0, event_base + TIMER_ENABLE);
206 181 writel_relaxed(0, event_base + TIMER_CLEAR);
207 182 writel_relaxed(~0, event_base + TIMER_MATCH_VAL);
208 183 ce->cpumask = cpumask_of(0);
  184 + ce->irq = irq;
209 185  
210   - ce->irq = INT_GP_TIMER_EXP;
211 186 clockevents_config_and_register(ce, GPT_HZ, 4, 0xffffffff);
212   - if (cpu_is_msm8x60() || cpu_is_msm8960()) {
  187 + if (percpu) {
213 188 msm_evt.percpu_evt = alloc_percpu(struct clock_event_device *);
214 189 if (!msm_evt.percpu_evt) {
215 190 pr_err("memory allocation failed for %s\n", ce->name);
216 191  
... ... @@ -238,11 +213,84 @@
238 213 res = clocksource_register_hz(cs, dgt_hz);
239 214 if (res)
240 215 pr_err("clocksource_register failed\n");
241   - setup_sched_clock(msm_sched_clock_read,
242   - cpu_is_msm7x01() ? 32 - MSM_DGT_SHIFT : 32, dgt_hz);
  216 + setup_sched_clock(msm_sched_clock_read, sched_bits, dgt_hz);
243 217 }
244 218  
245   -struct sys_timer msm_timer = {
246   - .init = msm_timer_init
  219 +static int __init msm_timer_map(phys_addr_t event, phys_addr_t source)
  220 +{
  221 + event_base = ioremap(event, SZ_64);
  222 + if (!event_base) {
  223 + pr_err("Failed to map event base\n");
  224 + return 1;
  225 + }
  226 + source_base = ioremap(source, SZ_64);
  227 + if (!source_base) {
  228 + pr_err("Failed to map source base\n");
  229 + return 1;
  230 + }
  231 + return 0;
  232 +}
  233 +
  234 +static void __init msm7x01_timer_init(void)
  235 +{
  236 + struct clocksource *cs = &msm_clocksource;
  237 +
  238 + if (msm_timer_map(0xc0100000, 0xc0100010))
  239 + return;
  240 + cs->read = msm_read_timer_count_shift;
  241 + cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT));
  242 + /* 600 KHz */
  243 + msm_timer_init(19200000 >> MSM_DGT_SHIFT, 32 - MSM_DGT_SHIFT, 7,
  244 + false);
  245 +}
  246 +
  247 +struct sys_timer msm7x01_timer = {
  248 + .init = msm7x01_timer_init
  249 +};
  250 +
  251 +static void __init msm7x30_timer_init(void)
  252 +{
  253 + if (msm_timer_map(0xc0100004, 0xc0100024))
  254 + return;
  255 + msm_timer_init(24576000 / 4, 32, 1, false);
  256 +}
  257 +
  258 +struct sys_timer msm7x30_timer = {
  259 + .init = msm7x30_timer_init
  260 +};
  261 +
  262 +static void __init msm8x60_timer_init(void)
  263 +{
  264 + if (msm_timer_map(0x02000004, 0x02040024))
  265 + return;
  266 + writel_relaxed(DGT_CLK_CTL_DIV_4, event_base + DGT_CLK_CTL);
  267 + msm_timer_init(27000000 / 4, 32, 17, true);
  268 +}
  269 +
  270 +struct sys_timer msm8x60_timer = {
  271 + .init = msm8x60_timer_init
  272 +};
  273 +
  274 +static void __init msm8960_timer_init(void)
  275 +{
  276 + if (msm_timer_map(0x0200A004, 0x0208A024))
  277 + return;
  278 + writel_relaxed(DGT_CLK_CTL_DIV_4, event_base + DGT_CLK_CTL);
  279 + msm_timer_init(27000000 / 4, 32, 17, true);
  280 +}
  281 +
  282 +struct sys_timer msm8960_timer = {
  283 + .init = msm8960_timer_init
  284 +};
  285 +
  286 +static void __init qsd8x50_timer_init(void)
  287 +{
  288 + if (msm_timer_map(0xAC100000, 0xAC100010))
  289 + return;
  290 + msm_timer_init(19200000 / 4, 32, 7, false);
  291 +}
  292 +
  293 +struct sys_timer qsd8x50_timer = {
  294 + .init = qsd8x50_timer_init
247 295 };