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Commit 45c2da62199bcea380273b2fba7fa16c1ff27a30

Authored by Jim Lin
Committed by Greg Kroah-Hartman
1 parent 8d733e26c0
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

USB: EHCI: Tegra: Fix wrong register definition 

Fix the issue that EHCI registers, hostpc[0] and usbmode_ex,
are not correctly accessed on Tegra3 platform.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Showing 1 changed file with 3 additions and 3 deletions Side-by-side Diff

include/linux/usb/ehci_def.h
Diff comments   View file @ 45c2da6
... ... @@ -171,18 +171,18 @@
171 171 #define USBMODE_CM_HC (3<<0) /* host controller mode */
172 172 #define USBMODE_CM_IDLE (0<<0) /* idle state */
173 173  
174   - u32 reserved4[7];
  174 + u32 reserved4[6];
175 175  
176 176 /* Moorestown has some non-standard registers, partially due to the fact that
177 177 * its EHCI controller has both TT and LPM support. HOSTPCx are extensions to
178 178 * PORTSCx
179 179 */
180 180 /* HOSTPC: offset 0x84 */
181   - u32 hostpc[0]; /* HOSTPC extension */
  181 + u32 hostpc[1]; /* HOSTPC extension */
182 182 #define HOSTPC_PHCD (1<<22) /* Phy clock disable */
183 183 #define HOSTPC_PSPD (3<<25) /* Port speed detection */
184 184  
185   - u32 reserved5[17];
  185 + u32 reserved5[16];
186 186  
187 187 /* USBMODE_EX: offset 0xc8 */
188 188 u32 usbmode_ex; /* USB Device mode extension */