ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup

Currently on the Lager board NFS timeouts/delays are seen when booting. That turned out to happen because the SoC's ETH_LINK signal turns on and off after each packet. It is connected to Micrel KSZ8041 PHY's LED0 signal. Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds to non-default 01 setting of the PHY control register 1 bits 14-15. The 'sh_eth' driver resets the PHY when opening the network device, so we have to set the mentioned bits back to 01 from the default 00 value which causes bouncing of ETH_LINK. That can be achieved using the PHY platform fixup mechanism if we also modify the driver to use it.. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup
Currently on the Lager board NFS timeouts/delays are seen when booting. That turned out to happen because the SoC's ETH_LINK signal turns on and off after each packet. It is connected to Micrel KSZ8041 PHY's LED0 signal. Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds to non-default 01 setting of the PHY control register 1 bits 14-15. The 'sh_eth' driver resets the PHY when opening the network device, so we have to set the mentioned bits back to 01 from the default 00 value which causes bouncing of ETH_LINK. That can be achieved using the PHY platform fixup mechanism if we also modify the driver to use it.. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov · Simon Horman
1 parent df1d0584b2
Showing 1 changed file with 26 additions and 1 deletions Side-by-side Diff
arch/arm/mach-shmobile/board-lager.c
@@ -29,6 +29,7 @@
 #include <linux/pinctrl/machine.h>
 #include <linux/platform_data/gpio-rcar.h>
 #include <linux/platform_device.h>
+#include <linux/phy.h>
 #include <linux/regulator/fixed.h>
 #include <linux/regulator/machine.h>
 #include <linux/sh_eth.h>
@@ -155,6 +156,30 @@
 					  &ether_pdata, sizeof(ether_pdata));
 }
  
+/*
+ * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
+ * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
+ * 14-15. We have to set them back to 01 from the default 00 value each time
+ * the PHY is reset. It's also important because the PHY's LED0 signal is
+ * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
+ * bounce on and off after each packet, which we apparently want to avoid.
+ */
+static int lager_ksz8041_fixup(struct phy_device *phydev)
+{
+	u16 phyctrl1 = phy_read(phydev, 0x1e);
+
+	phyctrl1 &= ~0xc000;
+	phyctrl1 |= 0x4000;
+	return phy_write(phydev, 0x1e, phyctrl1);
+}
+
+static void __init lager_init(void)
+{
+	lager_add_standard_devices();
+
+	phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
+}
+
 static const char *lager_boards_compat_dt[] __initdata = {
 	"renesas,lager",
 	NULL,
@@ -163,7 +188,7 @@
 DT_MACHINE_START(LAGER_DT, "lager")
 	.init_early	= r8a7790_init_delay,
 	.init_time	= r8a7790_timer_init,
-	.init_machine	= lager_add_standard_devices,
+	.init_machine	= lager_init,
 	.dt_compat	= lager_boards_compat_dt,
 MACHINE_END
...	...	@@ -29,6 +29,7 @@
29	29	#include <linux/pinctrl/machine.h>
30	30	#include <linux/platform_data/gpio-rcar.h>
31	31	#include <linux/platform_device.h>
	32	+#include <linux/phy.h>
32	33	#include <linux/regulator/fixed.h>
33	34	#include <linux/regulator/machine.h>
34	35	#include <linux/sh_eth.h>
...	...	@@ -155,6 +156,30 @@
155	156	&ether_pdata, sizeof(ether_pdata));
156	157	}
157	158
	159	+/*
	160	+ * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
	161	+ * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
	162	+ * 14-15. We have to set them back to 01 from the default 00 value each time
	163	+ * the PHY is reset. It's also important because the PHY's LED0 signal is
	164	+ * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
	165	+ * bounce on and off after each packet, which we apparently want to avoid.
	166	+ */
	167	+static int lager_ksz8041_fixup(struct phy_device *phydev)
	168	+{
	169	+ u16 phyctrl1 = phy_read(phydev, 0x1e);
	170	+
	171	+ phyctrl1 &= ~0xc000;
	172	+ phyctrl1 \|= 0x4000;
	173	+ return phy_write(phydev, 0x1e, phyctrl1);
	174	+}
	175	+
	176	+static void __init lager_init(void)
	177	+{
	178	+ lager_add_standard_devices();
	179	+
	180	+ phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
	181	+}
	182	+
158	183	static const char *lager_boards_compat_dt[] __initdata = {
159	184	"renesas,lager",
160	185	NULL,
...	...	@@ -163,7 +188,7 @@
163	188	DT_MACHINE_START(LAGER_DT, "lager")
164	189	.init_early = r8a7790_init_delay,
165	190	.init_time = r8a7790_timer_init,
166		- .init_machine = lager_add_standard_devices,
	191	+ .init_machine = lager_init,
167	192	.dt_compat = lager_boards_compat_dt,
168	193	MACHINE_END