Doug / smarc-fsl-linux-kernel

Download as
Browse Code ยป

Commit 48d224d1efec98b0b78e511150b4f5752beceb7c

Authored by Olof Johansson
2 parents 9121dfca73 45c3eb7d3a
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

Merge tag 'tags/omap-for-v3.8/cleanup-multiplatform-no-clock-signed' of git://gi… 

…t.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/pm2

From Tony Lindgren:
Remaining patches to allow omap2+ to build with multiplatform
enabled. Unfortunately the DMA header patch had to be redone
to avoid adding new multiplatform specific include paths, the
other patches are just trivial compile fixes.

Note that this does not yet contain the necessary Kconfig
changes as we are still waiting for some drivers to get
fixed up first.

* tag 'tags/omap-for-v3.8/cleanup-multiplatform-no-clock-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP: Move plat-omap/dma-omap.h to include/linux/omap-dma.h
  ASoC: OMAP: mcbsp fixes for enabling ARM multiplatform support
  watchdog: OMAP: fixup for ARM multiplatform support

Conflicts due to surrounding changes in:
	arch/arm/mach-omap2/omap_hwmod_2420_data.c
	arch/arm/mach-omap2/omap_hwmod_2430_data.c

Signed-off-by: Olof Johansson <olof@lixom.net>

Showing 49 changed files Side-by-side Diff

arch/arm/mach-omap1/board-h2.c
Diff comments   View file @ 48d224d
... ... @@ -39,7 +39,7 @@
39 39 #include <asm/mach/map.h>
40 40  
41 41 #include <mach/mux.h>
42   -#include <plat-omap/dma-omap.h>
  42 +#include <linux/omap-dma.h>
43 43 #include <mach/tc.h>
44 44 #include <mach/irda.h>
45 45 #include <linux/platform_data/keypad-omap.h>
arch/arm/mach-omap1/board-h3.c
Diff comments   View file @ 48d224d
... ... @@ -43,7 +43,7 @@
43 43 #include <mach/mux.h>
44 44 #include <mach/tc.h>
45 45 #include <linux/platform_data/keypad-omap.h>
46   -#include <plat-omap/dma-omap.h>
  46 +#include <linux/omap-dma.h>
47 47 #include <mach/flash.h>
48 48  
49 49 #include <mach/hardware.h>
arch/arm/mach-omap1/board-palmte.c
Diff comments   View file @ 48d224d
... ... @@ -37,7 +37,7 @@
37 37 #include <mach/flash.h>
38 38 #include <mach/mux.h>
39 39 #include <mach/tc.h>
40   -#include <plat-omap/dma-omap.h>
  40 +#include <linux/omap-dma.h>
41 41 #include <mach/irda.h>
42 42 #include <linux/platform_data/keypad-omap.h>
43 43  
arch/arm/mach-omap1/board-palmtt.c
Diff comments   View file @ 48d224d
... ... @@ -36,7 +36,7 @@
36 36  
37 37 #include <mach/flash.h>
38 38 #include <mach/mux.h>
39   -#include <plat-omap/dma-omap.h>
  39 +#include <linux/omap-dma.h>
40 40 #include <mach/tc.h>
41 41 #include <mach/irda.h>
42 42 #include <linux/platform_data/keypad-omap.h>
arch/arm/mach-omap1/board-palmz71.c
Diff comments   View file @ 48d224d
... ... @@ -38,7 +38,7 @@
38 38  
39 39 #include <mach/flash.h>
40 40 #include <mach/mux.h>
41   -#include <plat-omap/dma-omap.h>
  41 +#include <linux/omap-dma.h>
42 42 #include <mach/tc.h>
43 43 #include <mach/irda.h>
44 44 #include <linux/platform_data/keypad-omap.h>
arch/arm/mach-omap1/board-sx1.c
Diff comments   View file @ 48d224d
... ... @@ -36,7 +36,7 @@
36 36  
37 37 #include <mach/flash.h>
38 38 #include <mach/mux.h>
39   -#include <plat-omap/dma-omap.h>
  39 +#include <linux/omap-dma.h>
40 40 #include <mach/irda.h>
41 41 #include <mach/tc.h>
42 42 #include <mach/board-sx1.h>
arch/arm/mach-omap1/dma.c
Diff comments   View file @ 48d224d
... ... @@ -25,7 +25,7 @@
25 25 #include <linux/device.h>
26 26 #include <linux/io.h>
27 27  
28   -#include <plat-omap/dma-omap.h>
  28 +#include <linux/omap-dma.h>
29 29 #include <mach/tc.h>
30 30  
31 31 #include <mach/irqs.h>
arch/arm/mach-omap1/io.c
Diff comments   View file @ 48d224d
... ... @@ -18,7 +18,7 @@
18 18  
19 19 #include <mach/mux.h>
20 20 #include <mach/tc.h>
21   -#include <plat-omap/dma-omap.h>
  21 +#include <linux/omap-dma.h>
22 22  
23 23 #include "iomap.h"
24 24 #include "common.h"
arch/arm/mach-omap1/lcd_dma.c
Diff comments   View file @ 48d224d
... ... @@ -27,7 +27,7 @@
27 27 #include <linux/interrupt.h>
28 28 #include <linux/io.h>
29 29  
30   -#include <plat-omap/dma-omap.h>
  30 +#include <linux/omap-dma.h>
31 31  
32 32 #include <mach/hardware.h>
33 33 #include <mach/lcdc.h>
arch/arm/mach-omap1/mcbsp.c
Diff comments   View file @ 48d224d
... ... @@ -19,7 +19,7 @@
19 19 #include <linux/platform_device.h>
20 20 #include <linux/slab.h>
21 21  
22   -#include <plat-omap/dma-omap.h>
  22 +#include <linux/omap-dma.h>
23 23 #include <mach/mux.h>
24 24 #include "soc.h"
25 25 #include <linux/platform_data/asoc-ti-mcbsp.h>
arch/arm/mach-omap1/pm.c
Diff comments   View file @ 48d224d
... ... @@ -52,7 +52,7 @@
52 52  
53 53 #include <mach/tc.h>
54 54 #include <mach/mux.h>
55   -#include <plat-omap/dma-omap.h>
  55 +#include <linux/omap-dma.h>
56 56 #include <plat/dmtimer.h>
57 57  
58 58 #include <mach/irqs.h>
arch/arm/mach-omap2/board-3430sdp.c
Diff comments   View file @ 48d224d
... ... @@ -31,7 +31,7 @@
31 31 #include <asm/mach/map.h>
32 32  
33 33 #include "common.h"
34   -#include <plat-omap/dma-omap.h>
  34 +#include <linux/omap-dma.h>
35 35 #include <video/omapdss.h>
36 36 #include <video/omap-panel-tfp410.h>
37 37  
arch/arm/mach-omap2/board-h4.c
Diff comments   View file @ 48d224d
... ... @@ -32,7 +32,7 @@
32 32 #include <asm/mach/arch.h>
33 33 #include <asm/mach/map.h>
34 34  
35   -#include <plat-omap/dma-omap.h>
  35 +#include <linux/omap-dma.h>
36 36 #include <plat/debug-devices.h>
37 37  
38 38 #include <video/omapdss.h>
arch/arm/mach-omap2/board-rx51-peripherals.c
Diff comments   View file @ 48d224d
... ... @@ -31,7 +31,7 @@
31 31 #include <asm/system_info.h>
32 32  
33 33 #include "common.h"
34   -#include <plat-omap/dma-omap.h>
  34 +#include <linux/omap-dma.h>
35 35 #include "gpmc-smc91x.h"
36 36  
37 37 #include "board-rx51.h"
arch/arm/mach-omap2/board-rx51.c
Diff comments   View file @ 48d224d
... ... @@ -24,7 +24,7 @@
24 24 #include <asm/mach/arch.h>
25 25 #include <asm/mach/map.h>
26 26  
27   -#include <plat-omap/dma-omap.h>
  27 +#include <linux/omap-dma.h>
28 28  
29 29 #include "common.h"
30 30 #include "mux.h"
arch/arm/mach-omap2/devices.c
Diff comments   View file @ 48d224d
... ... @@ -24,7 +24,7 @@
24 24 #include <asm/mach-types.h>
25 25 #include <asm/mach/map.h>
26 26  
27   -#include <plat-omap/dma-omap.h>
  27 +#include <linux/omap-dma.h>
28 28  
29 29 #include "iomap.h"
30 30 #include "omap_hwmod.h"
arch/arm/mach-omap2/dma.c
Diff comments   View file @ 48d224d
... ... @@ -28,7 +28,7 @@
28 28 #include <linux/init.h>
29 29 #include <linux/device.h>
30 30  
31   -#include <plat-omap/dma-omap.h>
  31 +#include <linux/omap-dma.h>
32 32  
33 33 #include "soc.h"
34 34 #include "omap_hwmod.h"
arch/arm/mach-omap2/io.c
Diff comments   View file @ 48d224d
... ... @@ -25,7 +25,7 @@
25 25 #include <asm/tlb.h>
26 26 #include <asm/mach/map.h>
27 27  
28   -#include <plat-omap/dma-omap.h>
  28 +#include <linux/omap-dma.h>
29 29  
30 30 #include "omap_hwmod.h"
31 31 #include "soc.h"
arch/arm/mach-omap2/mcbsp.c
Diff comments   View file @ 48d224d
... ... @@ -21,7 +21,7 @@
21 21 #include <linux/platform_data/asoc-ti-mcbsp.h>
22 22 #include <linux/pm_runtime.h>
23 23  
24   -#include <plat-omap/dma-omap.h>
  24 +#include <linux/omap-dma.h>
25 25  
26 26 #include "omap_device.h"
27 27  
arch/arm/mach-omap2/omap_hwmod_2420_data.c
Diff comments   View file @ 48d224d
... ... @@ -15,8 +15,8 @@
15 15  
16 16 #include <linux/i2c-omap.h>
17 17 #include <linux/platform_data/spi-omap2-mcspi.h>
18   -
19   -#include <plat-omap/dma-omap.h>
  18 +#include <linux/omap-dma.h>
  19 +#include <plat/dmtimer.h>
20 20  
21 21 #include "omap_hwmod.h"
22 22 #include "l3_2xxx.h"
arch/arm/mach-omap2/omap_hwmod_2430_data.c
Diff comments   View file @ 48d224d
... ... @@ -16,8 +16,8 @@
16 16 #include <linux/i2c-omap.h>
17 17 #include <linux/platform_data/asoc-ti-mcbsp.h>
18 18 #include <linux/platform_data/spi-omap2-mcspi.h>
19   -
20   -#include <plat-omap/dma-omap.h>
  19 +#include <linux/omap-dma.h>
  20 +#include <plat/dmtimer.h>
21 21  
22 22 #include "omap_hwmod.h"
23 23 #include "mmc.h"
arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
Diff comments   View file @ 48d224d
... ... @@ -10,7 +10,8 @@
10 10 * published by the Free Software Foundation.
11 11 */
12 12  
13   -#include <plat-omap/dma-omap.h>
  13 +#include <linux/dmaengine.h>
  14 +#include <linux/omap-dma.h>
14 15  
15 16 #include "omap_hwmod.h"
16 17 #include "hdq1w.h"
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
Diff comments   View file @ 48d224d
... ... @@ -10,7 +10,7 @@
10 10 */
11 11  
12 12 #include <linux/platform_data/gpio-omap.h>
13   -#include <plat-omap/dma-omap.h>
  13 +#include <linux/omap-dma.h>
14 14 #include <plat/dmtimer.h>
15 15 #include <linux/platform_data/spi-omap2-mcspi.h>
16 16  
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
Diff comments   View file @ 48d224d
... ... @@ -19,7 +19,7 @@
19 19 #include <linux/power/smartreflex.h>
20 20 #include <linux/platform_data/gpio-omap.h>
21 21  
22   -#include <plat-omap/dma-omap.h>
  22 +#include <linux/omap-dma.h>
23 23 #include "l3_3xxx.h"
24 24 #include "l4_3xxx.h"
25 25 #include <linux/platform_data/asoc-ti-mcbsp.h>
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
Diff comments   View file @ 48d224d
... ... @@ -23,7 +23,7 @@
23 23 #include <linux/power/smartreflex.h>
24 24 #include <linux/i2c-omap.h>
25 25  
26   -#include <plat-omap/dma-omap.h>
  26 +#include <linux/omap-dma.h>
27 27  
28 28 #include <linux/platform_data/omap_ocp2scp.h>
29 29 #include <linux/platform_data/spi-omap2-mcspi.h>
arch/arm/mach-omap2/pm24xx.c
Diff comments   View file @ 48d224d
... ... @@ -38,7 +38,7 @@
38 38 #include <asm/mach-types.h>
39 39 #include <asm/system_misc.h>
40 40  
41   -#include <plat-omap/dma-omap.h>
  41 +#include <linux/omap-dma.h>
42 42  
43 43 #include "soc.h"
44 44 #include "common.h"
arch/arm/mach-omap2/pm34xx.c
Diff comments   View file @ 48d224d
... ... @@ -28,6 +28,7 @@
28 28 #include <linux/clk.h>
29 29 #include <linux/delay.h>
30 30 #include <linux/slab.h>
  31 +#include <linux/omap-dma.h>
31 32 #include <linux/platform_data/gpio-omap.h>
32 33  
33 34 #include <trace/events/power.h>
... ... @@ -38,8 +39,6 @@
38 39  
39 40 #include "clockdomain.h"
40 41 #include "powerdomain.h"
41   -#include <plat-omap/dma-omap.h>
42   -
43 42 #include "soc.h"
44 43 #include "common.h"
45 44 #include "cm3xxx.h"
arch/arm/mach-omap2/serial.c
Diff comments   View file @ 48d224d
... ... @@ -26,9 +26,9 @@
26 26 #include <linux/slab.h>
27 27 #include <linux/pm_runtime.h>
28 28 #include <linux/console.h>
  29 +#include <linux/omap-dma.h>
29 30  
30 31 #include <plat/omap-serial.h>
31   -#include <plat-omap/dma-omap.h>
32 32  
33 33 #include "common.h"
34 34 #include "omap_hwmod.h"
arch/arm/plat-omap/dma.c
Diff comments   View file @ 48d224d
... ... @@ -36,7 +36,7 @@
36 36 #include <linux/slab.h>
37 37 #include <linux/delay.h>
38 38  
39   -#include <plat-omap/dma-omap.h>
  39 +#include <linux/omap-dma.h>
40 40  
41 41 /*
42 42 * MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA
arch/arm/plat-omap/include/plat-omap/dma-omap.h
View file @ 48d224d
1   -/*
2   - * OMAP DMA handling defines and function
3   - *
4   - * Copyright (C) 2003 Nokia Corporation
5   - * Author: Juha Yrjรถlรค <juha.yrjola@nokia.com>
6   - *
7   - * This program is free software; you can redistribute it and/or modify
8   - * it under the terms of the GNU General Public License as published by
9   - * the Free Software Foundation; either version 2 of the License, or
10   - * (at your option) any later version.
11   - *
12   - * This program is distributed in the hope that it will be useful,
13   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
14   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15   - * GNU General Public License for more details.
16   - *
17   - * You should have received a copy of the GNU General Public License
18   - * along with this program; if not, write to the Free Software
19   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20   - */
21   -#ifndef __ASM_ARCH_DMA_H
22   -#define __ASM_ARCH_DMA_H
23   -
24   -#include <linux/platform_device.h>
25   -
26   -#define INT_DMA_LCD 25
27   -
28   -#define OMAP1_DMA_TOUT_IRQ (1 << 0)
29   -#define OMAP_DMA_DROP_IRQ (1 << 1)
30   -#define OMAP_DMA_HALF_IRQ (1 << 2)
31   -#define OMAP_DMA_FRAME_IRQ (1 << 3)
32   -#define OMAP_DMA_LAST_IRQ (1 << 4)
33   -#define OMAP_DMA_BLOCK_IRQ (1 << 5)
34   -#define OMAP1_DMA_SYNC_IRQ (1 << 6)
35   -#define OMAP2_DMA_PKT_IRQ (1 << 7)
36   -#define OMAP2_DMA_TRANS_ERR_IRQ (1 << 8)
37   -#define OMAP2_DMA_SECURE_ERR_IRQ (1 << 9)
38   -#define OMAP2_DMA_SUPERVISOR_ERR_IRQ (1 << 10)
39   -#define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11)
40   -
41   -#define OMAP_DMA_CCR_EN (1 << 7)
42   -#define OMAP_DMA_CCR_RD_ACTIVE (1 << 9)
43   -#define OMAP_DMA_CCR_WR_ACTIVE (1 << 10)
44   -#define OMAP_DMA_CCR_SEL_SRC_DST_SYNC (1 << 24)
45   -#define OMAP_DMA_CCR_BUFFERING_DISABLE (1 << 25)
46   -
47   -#define OMAP_DMA_DATA_TYPE_S8 0x00
48   -#define OMAP_DMA_DATA_TYPE_S16 0x01
49   -#define OMAP_DMA_DATA_TYPE_S32 0x02
50   -
51   -#define OMAP_DMA_SYNC_ELEMENT 0x00
52   -#define OMAP_DMA_SYNC_FRAME 0x01
53   -#define OMAP_DMA_SYNC_BLOCK 0x02
54   -#define OMAP_DMA_SYNC_PACKET 0x03
55   -
56   -#define OMAP_DMA_DST_SYNC_PREFETCH 0x02
57   -#define OMAP_DMA_SRC_SYNC 0x01
58   -#define OMAP_DMA_DST_SYNC 0x00
59   -
60   -#define OMAP_DMA_PORT_EMIFF 0x00
61   -#define OMAP_DMA_PORT_EMIFS 0x01
62   -#define OMAP_DMA_PORT_OCP_T1 0x02
63   -#define OMAP_DMA_PORT_TIPB 0x03
64   -#define OMAP_DMA_PORT_OCP_T2 0x04
65   -#define OMAP_DMA_PORT_MPUI 0x05
66   -
67   -#define OMAP_DMA_AMODE_CONSTANT 0x00
68   -#define OMAP_DMA_AMODE_POST_INC 0x01
69   -#define OMAP_DMA_AMODE_SINGLE_IDX 0x02
70   -#define OMAP_DMA_AMODE_DOUBLE_IDX 0x03
71   -
72   -#define DMA_DEFAULT_FIFO_DEPTH 0x10
73   -#define DMA_DEFAULT_ARB_RATE 0x01
74   -/* Pass THREAD_RESERVE ORed with THREAD_FIFO for tparams */
75   -#define DMA_THREAD_RESERVE_NORM (0x00 << 12) /* Def */
76   -#define DMA_THREAD_RESERVE_ONET (0x01 << 12)
77   -#define DMA_THREAD_RESERVE_TWOT (0x02 << 12)
78   -#define DMA_THREAD_RESERVE_THREET (0x03 << 12)
79   -#define DMA_THREAD_FIFO_NONE (0x00 << 14) /* Def */
80   -#define DMA_THREAD_FIFO_75 (0x01 << 14)
81   -#define DMA_THREAD_FIFO_25 (0x02 << 14)
82   -#define DMA_THREAD_FIFO_50 (0x03 << 14)
83   -
84   -/* DMA4_OCP_SYSCONFIG bits */
85   -#define DMA_SYSCONFIG_MIDLEMODE_MASK (3 << 12)
86   -#define DMA_SYSCONFIG_CLOCKACTIVITY_MASK (3 << 8)
87   -#define DMA_SYSCONFIG_EMUFREE (1 << 5)
88   -#define DMA_SYSCONFIG_SIDLEMODE_MASK (3 << 3)
89   -#define DMA_SYSCONFIG_SOFTRESET (1 << 2)
90   -#define DMA_SYSCONFIG_AUTOIDLE (1 << 0)
91   -
92   -#define DMA_SYSCONFIG_MIDLEMODE(n) ((n) << 12)
93   -#define DMA_SYSCONFIG_SIDLEMODE(n) ((n) << 3)
94   -
95   -#define DMA_IDLEMODE_SMARTIDLE 0x2
96   -#define DMA_IDLEMODE_NO_IDLE 0x1
97   -#define DMA_IDLEMODE_FORCE_IDLE 0x0
98   -
99   -/* Chaining modes*/
100   -#ifndef CONFIG_ARCH_OMAP1
101   -#define OMAP_DMA_STATIC_CHAIN 0x1
102   -#define OMAP_DMA_DYNAMIC_CHAIN 0x2
103   -#define OMAP_DMA_CHAIN_ACTIVE 0x1
104   -#define OMAP_DMA_CHAIN_INACTIVE 0x0
105   -#endif
106   -
107   -#define DMA_CH_PRIO_HIGH 0x1
108   -#define DMA_CH_PRIO_LOW 0x0 /* Def */
109   -
110   -/* Errata handling */
111   -#define IS_DMA_ERRATA(id) (errata & (id))
112   -#define SET_DMA_ERRATA(id) (errata |= (id))
113   -
114   -#define DMA_ERRATA_IFRAME_BUFFERING BIT(0x0)
115   -#define DMA_ERRATA_PARALLEL_CHANNELS BIT(0x1)
116   -#define DMA_ERRATA_i378 BIT(0x2)
117   -#define DMA_ERRATA_i541 BIT(0x3)
118   -#define DMA_ERRATA_i88 BIT(0x4)
119   -#define DMA_ERRATA_3_3 BIT(0x5)
120   -#define DMA_ROMCODE_BUG BIT(0x6)
121   -
122   -/* Attributes for OMAP DMA Contrller */
123   -#define DMA_LINKED_LCH BIT(0x0)
124   -#define GLOBAL_PRIORITY BIT(0x1)
125   -#define RESERVE_CHANNEL BIT(0x2)
126   -#define IS_CSSA_32 BIT(0x3)
127   -#define IS_CDSA_32 BIT(0x4)
128   -#define IS_RW_PRIORITY BIT(0x5)
129   -#define ENABLE_1510_MODE BIT(0x6)
130   -#define SRC_PORT BIT(0x7)
131   -#define DST_PORT BIT(0x8)
132   -#define SRC_INDEX BIT(0x9)
133   -#define DST_INDEX BIT(0xa)
134   -#define IS_BURST_ONLY4 BIT(0xb)
135   -#define CLEAR_CSR_ON_READ BIT(0xc)
136   -#define IS_WORD_16 BIT(0xd)
137   -#define ENABLE_16XX_MODE BIT(0xe)
138   -#define HS_CHANNELS_RESERVED BIT(0xf)
139   -
140   -/* Defines for DMA Capabilities */
141   -#define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18)
142   -#define DMA_HAS_CONSTANT_FILL_CAPS (0x1 << 19)
143   -#define DMA_HAS_DESCRIPTOR_CAPS (0x3 << 20)
144   -
145   -enum omap_reg_offsets {
146   -
147   -GCR, GSCR, GRST1, HW_ID,
148   -PCH2_ID, PCH0_ID, PCH1_ID, PCHG_ID,
149   -PCHD_ID, CAPS_0, CAPS_1, CAPS_2,
150   -CAPS_3, CAPS_4, PCH2_SR, PCH0_SR,
151   -PCH1_SR, PCHD_SR, REVISION, IRQSTATUS_L0,
152   -IRQSTATUS_L1, IRQSTATUS_L2, IRQSTATUS_L3, IRQENABLE_L0,
153   -IRQENABLE_L1, IRQENABLE_L2, IRQENABLE_L3, SYSSTATUS,
154   -OCP_SYSCONFIG,
155   -
156   -/* omap1+ specific */
157   -CPC, CCR2, LCH_CTRL,
158   -
159   -/* Common registers for all omap's */
160   -CSDP, CCR, CICR, CSR,
161   -CEN, CFN, CSFI, CSEI,
162   -CSAC, CDAC, CDEI,
163   -CDFI, CLNK_CTRL,
164   -
165   -/* Channel specific registers */
166   -CSSA, CDSA, COLOR,
167   -CCEN, CCFN,
168   -
169   -/* omap3630 and omap4 specific */
170   -CDP, CNDP, CCDN,
171   -
172   -};
173   -
174   -enum omap_dma_burst_mode {
175   - OMAP_DMA_DATA_BURST_DIS = 0,
176   - OMAP_DMA_DATA_BURST_4,
177   - OMAP_DMA_DATA_BURST_8,
178   - OMAP_DMA_DATA_BURST_16,
179   -};
180   -
181   -enum end_type {
182   - OMAP_DMA_LITTLE_ENDIAN = 0,
183   - OMAP_DMA_BIG_ENDIAN
184   -};
185   -
186   -enum omap_dma_color_mode {
187   - OMAP_DMA_COLOR_DIS = 0,
188   - OMAP_DMA_CONSTANT_FILL,
189   - OMAP_DMA_TRANSPARENT_COPY
190   -};
191   -
192   -enum omap_dma_write_mode {
193   - OMAP_DMA_WRITE_NON_POSTED = 0,
194   - OMAP_DMA_WRITE_POSTED,
195   - OMAP_DMA_WRITE_LAST_NON_POSTED
196   -};
197   -
198   -enum omap_dma_channel_mode {
199   - OMAP_DMA_LCH_2D = 0,
200   - OMAP_DMA_LCH_G,
201   - OMAP_DMA_LCH_P,
202   - OMAP_DMA_LCH_PD
203   -};
204   -
205   -struct omap_dma_channel_params {
206   - int data_type; /* data type 8,16,32 */
207   - int elem_count; /* number of elements in a frame */
208   - int frame_count; /* number of frames in a element */
209   -
210   - int src_port; /* Only on OMAP1 REVISIT: Is this needed? */
211   - int src_amode; /* constant, post increment, indexed,
212   - double indexed */
213   - unsigned long src_start; /* source address : physical */
214   - int src_ei; /* source element index */
215   - int src_fi; /* source frame index */
216   -
217   - int dst_port; /* Only on OMAP1 REVISIT: Is this needed? */
218   - int dst_amode; /* constant, post increment, indexed,
219   - double indexed */
220   - unsigned long dst_start; /* source address : physical */
221   - int dst_ei; /* source element index */
222   - int dst_fi; /* source frame index */
223   -
224   - int trigger; /* trigger attached if the channel is
225   - synchronized */
226   - int sync_mode; /* sycn on element, frame , block or packet */
227   - int src_or_dst_synch; /* source synch(1) or destination synch(0) */
228   -
229   - int ie; /* interrupt enabled */
230   -
231   - unsigned char read_prio;/* read priority */
232   - unsigned char write_prio;/* write priority */
233   -
234   -#ifndef CONFIG_ARCH_OMAP1
235   - enum omap_dma_burst_mode burst_mode; /* Burst mode 4/8/16 words */
236   -#endif
237   -};
238   -
239   -struct omap_dma_lch {
240   - int next_lch;
241   - int dev_id;
242   - u16 saved_csr;
243   - u16 enabled_irqs;
244   - const char *dev_name;
245   - void (*callback)(int lch, u16 ch_status, void *data);
246   - void *data;
247   - long flags;
248   - /* required for Dynamic chaining */
249   - int prev_linked_ch;
250   - int next_linked_ch;
251   - int state;
252   - int chain_id;
253   - int status;
254   -};
255   -
256   -struct omap_dma_dev_attr {
257   - u32 dev_caps;
258   - u16 lch_count;
259   - u16 chan_count;
260   - struct omap_dma_lch *chan;
261   -};
262   -
263   -/* System DMA platform data structure */
264   -struct omap_system_dma_plat_info {
265   - struct omap_dma_dev_attr *dma_attr;
266   - u32 errata;
267   - void (*disable_irq_lch)(int lch);
268   - void (*show_dma_caps)(void);
269   - void (*clear_lch_regs)(int lch);
270   - void (*clear_dma)(int lch);
271   - void (*dma_write)(u32 val, int reg, int lch);
272   - u32 (*dma_read)(int reg, int lch);
273   -};
274   -
275   -#ifdef CONFIG_ARCH_OMAP2PLUS
276   -#define dma_omap2plus() 1
277   -#else
278   -#define dma_omap2plus() 0
279   -#endif
280   -#define dma_omap1() (!dma_omap2plus())
281   -#define dma_omap15xx() ((dma_omap1() && (d->dev_caps & ENABLE_1510_MODE)))
282   -#define dma_omap16xx() ((dma_omap1() && (d->dev_caps & ENABLE_16XX_MODE)))
283   -
284   -extern void omap_set_dma_priority(int lch, int dst_port, int priority);
285   -extern int omap_request_dma(int dev_id, const char *dev_name,
286   - void (*callback)(int lch, u16 ch_status, void *data),
287   - void *data, int *dma_ch);
288   -extern void omap_enable_dma_irq(int ch, u16 irq_bits);
289   -extern void omap_disable_dma_irq(int ch, u16 irq_bits);
290   -extern void omap_free_dma(int ch);
291   -extern void omap_start_dma(int lch);
292   -extern void omap_stop_dma(int lch);
293   -extern void omap_set_dma_transfer_params(int lch, int data_type,
294   - int elem_count, int frame_count,
295   - int sync_mode,
296   - int dma_trigger, int src_or_dst_synch);
297   -extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode,
298   - u32 color);
299   -extern void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode);
300   -extern void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode);
301   -
302   -extern void omap_set_dma_src_params(int lch, int src_port, int src_amode,
303   - unsigned long src_start,
304   - int src_ei, int src_fi);
305   -extern void omap_set_dma_src_index(int lch, int eidx, int fidx);
306   -extern void omap_set_dma_src_data_pack(int lch, int enable);
307   -extern void omap_set_dma_src_burst_mode(int lch,
308   - enum omap_dma_burst_mode burst_mode);
309   -
310   -extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
311   - unsigned long dest_start,
312   - int dst_ei, int dst_fi);
313   -extern void omap_set_dma_dest_index(int lch, int eidx, int fidx);
314   -extern void omap_set_dma_dest_data_pack(int lch, int enable);
315   -extern void omap_set_dma_dest_burst_mode(int lch,
316   - enum omap_dma_burst_mode burst_mode);
317   -
318   -extern void omap_set_dma_params(int lch,
319   - struct omap_dma_channel_params *params);
320   -
321   -extern void omap_dma_link_lch(int lch_head, int lch_queue);
322   -extern void omap_dma_unlink_lch(int lch_head, int lch_queue);
323   -
324   -extern int omap_set_dma_callback(int lch,
325   - void (*callback)(int lch, u16 ch_status, void *data),
326   - void *data);
327   -extern dma_addr_t omap_get_dma_src_pos(int lch);
328   -extern dma_addr_t omap_get_dma_dst_pos(int lch);
329   -extern void omap_clear_dma(int lch);
330   -extern int omap_get_dma_active_status(int lch);
331   -extern int omap_dma_running(void);
332   -extern void omap_dma_set_global_params(int arb_rate, int max_fifo_depth,
333   - int tparams);
334   -extern int omap_dma_set_prio_lch(int lch, unsigned char read_prio,
335   - unsigned char write_prio);
336   -extern void omap_set_dma_dst_endian_type(int lch, enum end_type etype);
337   -extern void omap_set_dma_src_endian_type(int lch, enum end_type etype);
338   -extern int omap_get_dma_index(int lch, int *ei, int *fi);
339   -
340   -void omap_dma_global_context_save(void);
341   -void omap_dma_global_context_restore(void);
342   -
343   -extern void omap_dma_disable_irq(int lch);
344   -
345   -/* Chaining APIs */
346   -#ifndef CONFIG_ARCH_OMAP1
347   -extern int omap_request_dma_chain(int dev_id, const char *dev_name,
348   - void (*callback) (int lch, u16 ch_status,
349   - void *data),
350   - int *chain_id, int no_of_chans,
351   - int chain_mode,
352   - struct omap_dma_channel_params params);
353   -extern int omap_free_dma_chain(int chain_id);
354   -extern int omap_dma_chain_a_transfer(int chain_id, int src_start,
355   - int dest_start, int elem_count,
356   - int frame_count, void *callbk_data);
357   -extern int omap_start_dma_chain_transfers(int chain_id);
358   -extern int omap_stop_dma_chain_transfers(int chain_id);
359   -extern int omap_get_dma_chain_index(int chain_id, int *ei, int *fi);
360   -extern int omap_get_dma_chain_dst_pos(int chain_id);
361   -extern int omap_get_dma_chain_src_pos(int chain_id);
362   -
363   -extern int omap_modify_dma_chain_params(int chain_id,
364   - struct omap_dma_channel_params params);
365   -extern int omap_dma_chain_status(int chain_id);
366   -#endif
367   -
368   -#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_FB_OMAP)
369   -#include <mach/lcd_dma.h>
370   -#else
371   -static inline int omap_lcd_dma_running(void)
372   -{
373   - return 0;
374   -}
375   -#endif
376   -
377   -#endif /* __ASM_ARCH_DMA_H */
drivers/crypto/omap-aes.c
Diff comments   View file @ 48d224d
... ... @@ -29,7 +29,7 @@
29 29 #include <crypto/scatterwalk.h>
30 30 #include <crypto/aes.h>
31 31  
32   -#include <plat-omap/dma-omap.h>
  32 +#include <linux/omap-dma.h>
33 33  
34 34 /* OMAP TRM gives bitfields as start:end, where start is the higher bit
35 35 number. For example 7:0 */
drivers/crypto/omap-sham.c
Diff comments   View file @ 48d224d
... ... @@ -37,7 +37,7 @@
37 37 #include <crypto/hash.h>
38 38 #include <crypto/internal/hash.h>
39 39  
40   -#include <plat-omap/dma-omap.h>
  40 +#include <linux/omap-dma.h>
41 41 #include <mach/irqs.h>
42 42  
43 43 #define SHA_REG_DIGEST(x) (0x00 + ((x) * 0x04))
drivers/dma/omap-dma.c
Diff comments   View file @ 48d224d
... ... @@ -19,8 +19,6 @@
19 19  
20 20 #include "virt-dma.h"
21 21  
22   -#include <plat-omap/dma-omap.h>
23   -
24 22 struct omap_dmadev {
25 23 struct dma_device ddev;
26 24 spinlock_t lock;
drivers/media/platform/omap/omap_vout.c
Diff comments   View file @ 48d224d
... ... @@ -45,7 +45,7 @@
45 45 #include <media/v4l2-ioctl.h>
46 46  
47 47 #include <plat/cpu.h>
48   -#include <plat-omap/dma-omap.h>
  48 +#include <linux/omap-dma.h>
49 49 #include <video/omapvrfb.h>
50 50 #include <video/omapdss.h>
51 51  
drivers/media/platform/omap/omap_vout_vrfb.c
Diff comments   View file @ 48d224d
... ... @@ -16,7 +16,7 @@
16 16 #include <media/videobuf-dma-contig.h>
17 17 #include <media/v4l2-device.h>
18 18  
19   -#include <plat-omap/dma-omap.h>
  19 +#include <linux/omap-dma.h>
20 20 #include <video/omapvrfb.h>
21 21  
22 22 #include "omap_voutdef.h"
drivers/media/platform/omap3isp/ispstat.h
Diff comments   View file @ 48d224d
... ... @@ -30,7 +30,7 @@
30 30  
31 31 #include <linux/types.h>
32 32 #include <linux/omap3isp.h>
33   -#include <plat-omap/dma-omap.h>
  33 +#include <linux/omap-dma.h>
34 34 #include <media/v4l2-event.h>
35 35  
36 36 #include "isp.h"
drivers/media/platform/soc_camera/omap1_camera.c
Diff comments   View file @ 48d224d
... ... @@ -34,7 +34,7 @@
34 34 #include <media/videobuf-dma-contig.h>
35 35 #include <media/videobuf-dma-sg.h>
36 36  
37   -#include <plat-omap/dma-omap.h>
  37 +#include <linux/omap-dma.h>
38 38  
39 39  
40 40 #define DRIVER_NAME "omap1-camera"
drivers/mtd/nand/omap2.c
Diff comments   View file @ 48d224d
... ... @@ -27,7 +27,6 @@
27 27 #include <linux/bch.h>
28 28 #endif
29 29  
30   -#include <plat-omap/dma-omap.h>
31 30 #include <linux/platform_data/mtd-nand-omap2.h>
32 31  
33 32 #define DRIVER_NAME "omap2-nand"
drivers/mtd/onenand/omap2.c
Diff comments   View file @ 48d224d
... ... @@ -41,7 +41,7 @@
41 41 #include <linux/platform_data/mtd-onenand-omap2.h>
42 42 #include <asm/gpio.h>
43 43  
44   -#include <plat-omap/dma-omap.h>
  44 +#include <linux/omap-dma.h>
45 45  
46 46 #define DRIVER_NAME "omap2-onenand"
47 47  
drivers/usb/gadget/omap_udc.c
Diff comments   View file @ 48d224d
... ... @@ -44,7 +44,7 @@
44 44 #include <asm/unaligned.h>
45 45 #include <asm/mach-types.h>
46 46  
47   -#include <plat-omap/dma-omap.h>
  47 +#include <linux/omap-dma.h>
48 48  
49 49 #include <mach/usb.h>
50 50  
drivers/usb/musb/tusb6010_omap.c
Diff comments   View file @ 48d224d
... ... @@ -16,7 +16,7 @@
16 16 #include <linux/platform_device.h>
17 17 #include <linux/dma-mapping.h>
18 18 #include <linux/slab.h>
19   -#include <plat-omap/dma-omap.h>
  19 +#include <linux/omap-dma.h>
20 20  
21 21 #include "musb_core.h"
22 22 #include "tusb6010.h"
drivers/video/omap/lcdc.c
Diff comments   View file @ 48d224d
... ... @@ -31,7 +31,7 @@
31 31 #include <linux/gfp.h>
32 32  
33 33 #include <mach/lcdc.h>
34   -#include <plat-omap/dma-omap.h>
  34 +#include <linux/omap-dma.h>
35 35  
36 36 #include <asm/mach-types.h>
37 37  
drivers/video/omap/omapfb_main.c
Diff comments   View file @ 48d224d
... ... @@ -30,7 +30,7 @@
30 30 #include <linux/uaccess.h>
31 31 #include <linux/module.h>
32 32  
33   -#include <plat-omap/dma-omap.h>
  33 +#include <linux/omap-dma.h>
34 34  
35 35 #include "omapfb.h"
36 36 #include "lcdc.h"
drivers/video/omap/sossi.c
Diff comments   View file @ 48d224d
... ... @@ -25,7 +25,7 @@
25 25 #include <linux/io.h>
26 26 #include <linux/interrupt.h>
27 27  
28   -#include <plat-omap/dma-omap.h>
  28 +#include <linux/omap-dma.h>
29 29  
30 30 #include "omapfb.h"
31 31 #include "lcdc.h"
drivers/watchdog/omap_wdt.c
Diff comments   View file @ 48d224d
... ... @@ -45,8 +45,6 @@
45 45 #include <linux/uaccess.h>
46 46 #include <linux/slab.h>
47 47 #include <linux/pm_runtime.h>
48   -#include <mach/hardware.h>
49   -
50 48 #include <linux/platform_data/omap-wd-timer.h>
51 49  
52 50 #include "omap_wdt.h"
include/linux/omap-dma.h
Diff comments   View file @ 48d224d
... ... @@ -19,5 +19,371 @@
19 19 }
20 20 #endif
21 21  
  22 +/*
  23 + * Legacy OMAP DMA handling defines and functions
  24 + *
  25 + * NOTE: Do not use these any longer.
  26 + *
  27 + * Use the generic dmaengine functions as defined in
  28 + * include/linux/dmaengine.h.
  29 + *
  30 + * Copyright (C) 2003 Nokia Corporation
  31 + * Author: Juha Yrjรถlรค <juha.yrjola@nokia.com>
  32 + *
  33 + */
  34 +
  35 +#include <linux/platform_device.h>
  36 +
  37 +#define INT_DMA_LCD 25
  38 +
  39 +#define OMAP1_DMA_TOUT_IRQ (1 << 0)
  40 +#define OMAP_DMA_DROP_IRQ (1 << 1)
  41 +#define OMAP_DMA_HALF_IRQ (1 << 2)
  42 +#define OMAP_DMA_FRAME_IRQ (1 << 3)
  43 +#define OMAP_DMA_LAST_IRQ (1 << 4)
  44 +#define OMAP_DMA_BLOCK_IRQ (1 << 5)
  45 +#define OMAP1_DMA_SYNC_IRQ (1 << 6)
  46 +#define OMAP2_DMA_PKT_IRQ (1 << 7)
  47 +#define OMAP2_DMA_TRANS_ERR_IRQ (1 << 8)
  48 +#define OMAP2_DMA_SECURE_ERR_IRQ (1 << 9)
  49 +#define OMAP2_DMA_SUPERVISOR_ERR_IRQ (1 << 10)
  50 +#define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11)
  51 +
  52 +#define OMAP_DMA_CCR_EN (1 << 7)
  53 +#define OMAP_DMA_CCR_RD_ACTIVE (1 << 9)
  54 +#define OMAP_DMA_CCR_WR_ACTIVE (1 << 10)
  55 +#define OMAP_DMA_CCR_SEL_SRC_DST_SYNC (1 << 24)
  56 +#define OMAP_DMA_CCR_BUFFERING_DISABLE (1 << 25)
  57 +
  58 +#define OMAP_DMA_DATA_TYPE_S8 0x00
  59 +#define OMAP_DMA_DATA_TYPE_S16 0x01
  60 +#define OMAP_DMA_DATA_TYPE_S32 0x02
  61 +
  62 +#define OMAP_DMA_SYNC_ELEMENT 0x00
  63 +#define OMAP_DMA_SYNC_FRAME 0x01
  64 +#define OMAP_DMA_SYNC_BLOCK 0x02
  65 +#define OMAP_DMA_SYNC_PACKET 0x03
  66 +
  67 +#define OMAP_DMA_DST_SYNC_PREFETCH 0x02
  68 +#define OMAP_DMA_SRC_SYNC 0x01
  69 +#define OMAP_DMA_DST_SYNC 0x00
  70 +
  71 +#define OMAP_DMA_PORT_EMIFF 0x00
  72 +#define OMAP_DMA_PORT_EMIFS 0x01
  73 +#define OMAP_DMA_PORT_OCP_T1 0x02
  74 +#define OMAP_DMA_PORT_TIPB 0x03
  75 +#define OMAP_DMA_PORT_OCP_T2 0x04
  76 +#define OMAP_DMA_PORT_MPUI 0x05
  77 +
  78 +#define OMAP_DMA_AMODE_CONSTANT 0x00
  79 +#define OMAP_DMA_AMODE_POST_INC 0x01
  80 +#define OMAP_DMA_AMODE_SINGLE_IDX 0x02
  81 +#define OMAP_DMA_AMODE_DOUBLE_IDX 0x03
  82 +
  83 +#define DMA_DEFAULT_FIFO_DEPTH 0x10
  84 +#define DMA_DEFAULT_ARB_RATE 0x01
  85 +/* Pass THREAD_RESERVE ORed with THREAD_FIFO for tparams */
  86 +#define DMA_THREAD_RESERVE_NORM (0x00 << 12) /* Def */
  87 +#define DMA_THREAD_RESERVE_ONET (0x01 << 12)
  88 +#define DMA_THREAD_RESERVE_TWOT (0x02 << 12)
  89 +#define DMA_THREAD_RESERVE_THREET (0x03 << 12)
  90 +#define DMA_THREAD_FIFO_NONE (0x00 << 14) /* Def */
  91 +#define DMA_THREAD_FIFO_75 (0x01 << 14)
  92 +#define DMA_THREAD_FIFO_25 (0x02 << 14)
  93 +#define DMA_THREAD_FIFO_50 (0x03 << 14)
  94 +
  95 +/* DMA4_OCP_SYSCONFIG bits */
  96 +#define DMA_SYSCONFIG_MIDLEMODE_MASK (3 << 12)
  97 +#define DMA_SYSCONFIG_CLOCKACTIVITY_MASK (3 << 8)
  98 +#define DMA_SYSCONFIG_EMUFREE (1 << 5)
  99 +#define DMA_SYSCONFIG_SIDLEMODE_MASK (3 << 3)
  100 +#define DMA_SYSCONFIG_SOFTRESET (1 << 2)
  101 +#define DMA_SYSCONFIG_AUTOIDLE (1 << 0)
  102 +
  103 +#define DMA_SYSCONFIG_MIDLEMODE(n) ((n) << 12)
  104 +#define DMA_SYSCONFIG_SIDLEMODE(n) ((n) << 3)
  105 +
  106 +#define DMA_IDLEMODE_SMARTIDLE 0x2
  107 +#define DMA_IDLEMODE_NO_IDLE 0x1
  108 +#define DMA_IDLEMODE_FORCE_IDLE 0x0
  109 +
  110 +/* Chaining modes*/
  111 +#ifndef CONFIG_ARCH_OMAP1
  112 +#define OMAP_DMA_STATIC_CHAIN 0x1
  113 +#define OMAP_DMA_DYNAMIC_CHAIN 0x2
  114 +#define OMAP_DMA_CHAIN_ACTIVE 0x1
  115 +#define OMAP_DMA_CHAIN_INACTIVE 0x0
22 116 #endif
  117 +
  118 +#define DMA_CH_PRIO_HIGH 0x1
  119 +#define DMA_CH_PRIO_LOW 0x0 /* Def */
  120 +
  121 +/* Errata handling */
  122 +#define IS_DMA_ERRATA(id) (errata & (id))
  123 +#define SET_DMA_ERRATA(id) (errata |= (id))
  124 +
  125 +#define DMA_ERRATA_IFRAME_BUFFERING BIT(0x0)
  126 +#define DMA_ERRATA_PARALLEL_CHANNELS BIT(0x1)
  127 +#define DMA_ERRATA_i378 BIT(0x2)
  128 +#define DMA_ERRATA_i541 BIT(0x3)
  129 +#define DMA_ERRATA_i88 BIT(0x4)
  130 +#define DMA_ERRATA_3_3 BIT(0x5)
  131 +#define DMA_ROMCODE_BUG BIT(0x6)
  132 +
  133 +/* Attributes for OMAP DMA Contrller */
  134 +#define DMA_LINKED_LCH BIT(0x0)
  135 +#define GLOBAL_PRIORITY BIT(0x1)
  136 +#define RESERVE_CHANNEL BIT(0x2)
  137 +#define IS_CSSA_32 BIT(0x3)
  138 +#define IS_CDSA_32 BIT(0x4)
  139 +#define IS_RW_PRIORITY BIT(0x5)
  140 +#define ENABLE_1510_MODE BIT(0x6)
  141 +#define SRC_PORT BIT(0x7)
  142 +#define DST_PORT BIT(0x8)
  143 +#define SRC_INDEX BIT(0x9)
  144 +#define DST_INDEX BIT(0xa)
  145 +#define IS_BURST_ONLY4 BIT(0xb)
  146 +#define CLEAR_CSR_ON_READ BIT(0xc)
  147 +#define IS_WORD_16 BIT(0xd)
  148 +#define ENABLE_16XX_MODE BIT(0xe)
  149 +#define HS_CHANNELS_RESERVED BIT(0xf)
  150 +
  151 +/* Defines for DMA Capabilities */
  152 +#define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18)
  153 +#define DMA_HAS_CONSTANT_FILL_CAPS (0x1 << 19)
  154 +#define DMA_HAS_DESCRIPTOR_CAPS (0x3 << 20)
  155 +
  156 +enum omap_reg_offsets {
  157 +
  158 +GCR, GSCR, GRST1, HW_ID,
  159 +PCH2_ID, PCH0_ID, PCH1_ID, PCHG_ID,
  160 +PCHD_ID, CAPS_0, CAPS_1, CAPS_2,
  161 +CAPS_3, CAPS_4, PCH2_SR, PCH0_SR,
  162 +PCH1_SR, PCHD_SR, REVISION, IRQSTATUS_L0,
  163 +IRQSTATUS_L1, IRQSTATUS_L2, IRQSTATUS_L3, IRQENABLE_L0,
  164 +IRQENABLE_L1, IRQENABLE_L2, IRQENABLE_L3, SYSSTATUS,
  165 +OCP_SYSCONFIG,
  166 +
  167 +/* omap1+ specific */
  168 +CPC, CCR2, LCH_CTRL,
  169 +
  170 +/* Common registers for all omap's */
  171 +CSDP, CCR, CICR, CSR,
  172 +CEN, CFN, CSFI, CSEI,
  173 +CSAC, CDAC, CDEI,
  174 +CDFI, CLNK_CTRL,
  175 +
  176 +/* Channel specific registers */
  177 +CSSA, CDSA, COLOR,
  178 +CCEN, CCFN,
  179 +
  180 +/* omap3630 and omap4 specific */
  181 +CDP, CNDP, CCDN,
  182 +
  183 +};
  184 +
  185 +enum omap_dma_burst_mode {
  186 + OMAP_DMA_DATA_BURST_DIS = 0,
  187 + OMAP_DMA_DATA_BURST_4,
  188 + OMAP_DMA_DATA_BURST_8,
  189 + OMAP_DMA_DATA_BURST_16,
  190 +};
  191 +
  192 +enum end_type {
  193 + OMAP_DMA_LITTLE_ENDIAN = 0,
  194 + OMAP_DMA_BIG_ENDIAN
  195 +};
  196 +
  197 +enum omap_dma_color_mode {
  198 + OMAP_DMA_COLOR_DIS = 0,
  199 + OMAP_DMA_CONSTANT_FILL,
  200 + OMAP_DMA_TRANSPARENT_COPY
  201 +};
  202 +
  203 +enum omap_dma_write_mode {
  204 + OMAP_DMA_WRITE_NON_POSTED = 0,
  205 + OMAP_DMA_WRITE_POSTED,
  206 + OMAP_DMA_WRITE_LAST_NON_POSTED
  207 +};
  208 +
  209 +enum omap_dma_channel_mode {
  210 + OMAP_DMA_LCH_2D = 0,
  211 + OMAP_DMA_LCH_G,
  212 + OMAP_DMA_LCH_P,
  213 + OMAP_DMA_LCH_PD
  214 +};
  215 +
  216 +struct omap_dma_channel_params {
  217 + int data_type; /* data type 8,16,32 */
  218 + int elem_count; /* number of elements in a frame */
  219 + int frame_count; /* number of frames in a element */
  220 +
  221 + int src_port; /* Only on OMAP1 REVISIT: Is this needed? */
  222 + int src_amode; /* constant, post increment, indexed,
  223 + double indexed */
  224 + unsigned long src_start; /* source address : physical */
  225 + int src_ei; /* source element index */
  226 + int src_fi; /* source frame index */
  227 +
  228 + int dst_port; /* Only on OMAP1 REVISIT: Is this needed? */
  229 + int dst_amode; /* constant, post increment, indexed,
  230 + double indexed */
  231 + unsigned long dst_start; /* source address : physical */
  232 + int dst_ei; /* source element index */
  233 + int dst_fi; /* source frame index */
  234 +
  235 + int trigger; /* trigger attached if the channel is
  236 + synchronized */
  237 + int sync_mode; /* sycn on element, frame , block or packet */
  238 + int src_or_dst_synch; /* source synch(1) or destination synch(0) */
  239 +
  240 + int ie; /* interrupt enabled */
  241 +
  242 + unsigned char read_prio;/* read priority */
  243 + unsigned char write_prio;/* write priority */
  244 +
  245 +#ifndef CONFIG_ARCH_OMAP1
  246 + enum omap_dma_burst_mode burst_mode; /* Burst mode 4/8/16 words */
  247 +#endif
  248 +};
  249 +
  250 +struct omap_dma_lch {
  251 + int next_lch;
  252 + int dev_id;
  253 + u16 saved_csr;
  254 + u16 enabled_irqs;
  255 + const char *dev_name;
  256 + void (*callback)(int lch, u16 ch_status, void *data);
  257 + void *data;
  258 + long flags;
  259 + /* required for Dynamic chaining */
  260 + int prev_linked_ch;
  261 + int next_linked_ch;
  262 + int state;
  263 + int chain_id;
  264 + int status;
  265 +};
  266 +
  267 +struct omap_dma_dev_attr {
  268 + u32 dev_caps;
  269 + u16 lch_count;
  270 + u16 chan_count;
  271 + struct omap_dma_lch *chan;
  272 +};
  273 +
  274 +/* System DMA platform data structure */
  275 +struct omap_system_dma_plat_info {
  276 + struct omap_dma_dev_attr *dma_attr;
  277 + u32 errata;
  278 + void (*disable_irq_lch)(int lch);
  279 + void (*show_dma_caps)(void);
  280 + void (*clear_lch_regs)(int lch);
  281 + void (*clear_dma)(int lch);
  282 + void (*dma_write)(u32 val, int reg, int lch);
  283 + u32 (*dma_read)(int reg, int lch);
  284 +};
  285 +
  286 +#ifdef CONFIG_ARCH_OMAP2PLUS
  287 +#define dma_omap2plus() 1
  288 +#else
  289 +#define dma_omap2plus() 0
  290 +#endif
  291 +#define dma_omap1() (!dma_omap2plus())
  292 +#define dma_omap15xx() ((dma_omap1() && (d->dev_caps & ENABLE_1510_MODE)))
  293 +#define dma_omap16xx() ((dma_omap1() && (d->dev_caps & ENABLE_16XX_MODE)))
  294 +
  295 +extern void omap_set_dma_priority(int lch, int dst_port, int priority);
  296 +extern int omap_request_dma(int dev_id, const char *dev_name,
  297 + void (*callback)(int lch, u16 ch_status, void *data),
  298 + void *data, int *dma_ch);
  299 +extern void omap_enable_dma_irq(int ch, u16 irq_bits);
  300 +extern void omap_disable_dma_irq(int ch, u16 irq_bits);
  301 +extern void omap_free_dma(int ch);
  302 +extern void omap_start_dma(int lch);
  303 +extern void omap_stop_dma(int lch);
  304 +extern void omap_set_dma_transfer_params(int lch, int data_type,
  305 + int elem_count, int frame_count,
  306 + int sync_mode,
  307 + int dma_trigger, int src_or_dst_synch);
  308 +extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode,
  309 + u32 color);
  310 +extern void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode);
  311 +extern void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode);
  312 +
  313 +extern void omap_set_dma_src_params(int lch, int src_port, int src_amode,
  314 + unsigned long src_start,
  315 + int src_ei, int src_fi);
  316 +extern void omap_set_dma_src_index(int lch, int eidx, int fidx);
  317 +extern void omap_set_dma_src_data_pack(int lch, int enable);
  318 +extern void omap_set_dma_src_burst_mode(int lch,
  319 + enum omap_dma_burst_mode burst_mode);
  320 +
  321 +extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode,
  322 + unsigned long dest_start,
  323 + int dst_ei, int dst_fi);
  324 +extern void omap_set_dma_dest_index(int lch, int eidx, int fidx);
  325 +extern void omap_set_dma_dest_data_pack(int lch, int enable);
  326 +extern void omap_set_dma_dest_burst_mode(int lch,
  327 + enum omap_dma_burst_mode burst_mode);
  328 +
  329 +extern void omap_set_dma_params(int lch,
  330 + struct omap_dma_channel_params *params);
  331 +
  332 +extern void omap_dma_link_lch(int lch_head, int lch_queue);
  333 +extern void omap_dma_unlink_lch(int lch_head, int lch_queue);
  334 +
  335 +extern int omap_set_dma_callback(int lch,
  336 + void (*callback)(int lch, u16 ch_status, void *data),
  337 + void *data);
  338 +extern dma_addr_t omap_get_dma_src_pos(int lch);
  339 +extern dma_addr_t omap_get_dma_dst_pos(int lch);
  340 +extern void omap_clear_dma(int lch);
  341 +extern int omap_get_dma_active_status(int lch);
  342 +extern int omap_dma_running(void);
  343 +extern void omap_dma_set_global_params(int arb_rate, int max_fifo_depth,
  344 + int tparams);
  345 +extern int omap_dma_set_prio_lch(int lch, unsigned char read_prio,
  346 + unsigned char write_prio);
  347 +extern void omap_set_dma_dst_endian_type(int lch, enum end_type etype);
  348 +extern void omap_set_dma_src_endian_type(int lch, enum end_type etype);
  349 +extern int omap_get_dma_index(int lch, int *ei, int *fi);
  350 +
  351 +void omap_dma_global_context_save(void);
  352 +void omap_dma_global_context_restore(void);
  353 +
  354 +extern void omap_dma_disable_irq(int lch);
  355 +
  356 +/* Chaining APIs */
  357 +#ifndef CONFIG_ARCH_OMAP1
  358 +extern int omap_request_dma_chain(int dev_id, const char *dev_name,
  359 + void (*callback) (int lch, u16 ch_status,
  360 + void *data),
  361 + int *chain_id, int no_of_chans,
  362 + int chain_mode,
  363 + struct omap_dma_channel_params params);
  364 +extern int omap_free_dma_chain(int chain_id);
  365 +extern int omap_dma_chain_a_transfer(int chain_id, int src_start,
  366 + int dest_start, int elem_count,
  367 + int frame_count, void *callbk_data);
  368 +extern int omap_start_dma_chain_transfers(int chain_id);
  369 +extern int omap_stop_dma_chain_transfers(int chain_id);
  370 +extern int omap_get_dma_chain_index(int chain_id, int *ei, int *fi);
  371 +extern int omap_get_dma_chain_dst_pos(int chain_id);
  372 +extern int omap_get_dma_chain_src_pos(int chain_id);
  373 +
  374 +extern int omap_modify_dma_chain_params(int chain_id,
  375 + struct omap_dma_channel_params params);
  376 +extern int omap_dma_chain_status(int chain_id);
  377 +#endif
  378 +
  379 +#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_FB_OMAP)
  380 +#include <mach/lcd_dma.h>
  381 +#else
  382 +static inline int omap_lcd_dma_running(void)
  383 +{
  384 + return 0;
  385 +}
  386 +#endif
  387 +
  388 +#endif /* __LINUX_OMAP_DMA_H */
sound/soc/omap/mcbsp.c
Diff comments   View file @ 48d224d
... ... @@ -28,8 +28,6 @@
28 28  
29 29 #include <linux/platform_data/asoc-ti-mcbsp.h>
30 30  
31   -#include <plat/cpu.h>
32   -
33 31 #include "mcbsp.h"
34 32  
35 33 static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
... ... @@ -612,7 +610,7 @@
612 610 * system will refuse to enter idle if the CLKS pin source is not reset
613 611 * back to internal source.
614 612 */
615   - if (!cpu_class_is_omap1())
  613 + if (!mcbsp_omap1())
616 614 omap2_mcbsp_set_clks_src(mcbsp, MCBSP_CLKS_PRCM_SRC);
617 615  
618 616 spin_lock(&mcbsp->lock);
sound/soc/omap/mcbsp.h
Diff comments   View file @ 48d224d
... ... @@ -26,6 +26,12 @@
26 26  
27 27 #include "omap-pcm.h"
28 28  
  29 +#ifdef CONFIG_ARCH_OMAP1
  30 +#define mcbsp_omap1() 1
  31 +#else
  32 +#define mcbsp_omap1() 0
  33 +#endif
  34 +
29 35 /* McBSP register numbers. Register address offset = num * reg_step */
30 36 enum {
31 37 /* Common registers */
sound/soc/omap/omap-mcbsp.c
Diff comments   View file @ 48d224d
... ... @@ -34,7 +34,6 @@
34 34 #include <sound/initval.h>
35 35 #include <sound/soc.h>
36 36  
37   -#include <plat/cpu.h>
38 37 #include <linux/platform_data/asoc-ti-mcbsp.h>
39 38 #include "mcbsp.h"
40 39 #include "omap-mcbsp.h"
... ... @@ -512,7 +511,7 @@
512 511 regs->srgr2 |= CLKSM;
513 512 break;
514 513 case OMAP_MCBSP_SYSCLK_CLKS_FCLK:
515   - if (cpu_class_is_omap1()) {
  514 + if (mcbsp_omap1()) {
516 515 err = -EINVAL;
517 516 break;
518 517 }
... ... @@ -520,7 +519,7 @@
520 519 MCBSP_CLKS_PRCM_SRC);
521 520 break;
522 521 case OMAP_MCBSP_SYSCLK_CLKS_EXT:
523   - if (cpu_class_is_omap1()) {
  522 + if (mcbsp_omap1()) {
524 523 err = 0;
525 524 break;
526 525 }