Commit 4a268e0879c4044523757b6ac94b56fc7955a116
Committed by
Chris Ball
Chris Ball
1 parent
4a92fe80be
Exists in
master
and in
6 other branches
mmc: msm_sdcc: Use MCI_INT_MASK0 for PIO interrupts
Not all targets have IRQ1 line routed from the SD controller to the processor. So we cannot rely on IRQ1 for PIO interrupts. This patch moves all PIO interrupts to IRQ0 and enables the PIO mode. Signed-off-by: Murali Palnati <palnatim@codeaurora.org> Signed-off-by: Sahitya Tummala <stummala@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Showing 2 changed files with 21 additions and 4 deletions Side-by-side Diff
drivers/mmc/host/msm_sdcc.c
| ... | ... | @@ -213,7 +213,8 @@ |
| 213 | 213 | msmsdcc_writel(host, host->cmd_timeout, MMCIDATATIMER); |
| 214 | 214 | msmsdcc_writel(host, (unsigned int)host->curr.xfer_size, |
| 215 | 215 | MMCIDATALENGTH); |
| 216 | - msmsdcc_writel(host, host->cmd_pio_irqmask, MMCIMASK1); | |
| 216 | + msmsdcc_writel(host, (msmsdcc_readl(host, MMCIMASK0) & | |
| 217 | + (~MCI_IRQ_PIO)) | host->cmd_pio_irqmask, MMCIMASK0); | |
| 217 | 218 | msmsdcc_writel(host, host->cmd_datactrl, MMCIDATACTRL); |
| 218 | 219 | |
| 219 | 220 | if (host->cmd_cmd) { |
| ... | ... | @@ -543,7 +544,9 @@ |
| 543 | 544 | |
| 544 | 545 | msmsdcc_writel(host, host->curr.xfer_size, MMCIDATALENGTH); |
| 545 | 546 | |
| 546 | - msmsdcc_writel(host, pio_irqmask, MMCIMASK1); | |
| 547 | + msmsdcc_writel(host, (msmsdcc_readl(host, MMCIMASK0) & | |
| 548 | + (~MCI_IRQ_PIO)) | pio_irqmask, MMCIMASK0); | |
| 549 | + | |
| 547 | 550 | msmsdcc_writel(host, datactrl, MMCIDATACTRL); |
| 548 | 551 | |
| 549 | 552 | if (cmd) { |
| 550 | 553 | |
| 551 | 554 | |
| ... | ... | @@ -659,9 +662,14 @@ |
| 659 | 662 | { |
| 660 | 663 | struct msmsdcc_host *host = dev_id; |
| 661 | 664 | uint32_t status; |
| 665 | + u32 mci_mask0; | |
| 662 | 666 | |
| 663 | 667 | status = msmsdcc_readl(host, MMCISTATUS); |
| 668 | + mci_mask0 = msmsdcc_readl(host, MMCIMASK0); | |
| 664 | 669 | |
| 670 | + if (((mci_mask0 & status) & MCI_IRQ_PIO) == 0) | |
| 671 | + return IRQ_NONE; | |
| 672 | + | |
| 665 | 673 | do { |
| 666 | 674 | unsigned long flags; |
| 667 | 675 | unsigned int remain, len; |
| 668 | 676 | |
| ... | ... | @@ -719,10 +727,12 @@ |
| 719 | 727 | } while (1); |
| 720 | 728 | |
| 721 | 729 | if (status & MCI_RXACTIVE && host->curr.xfer_remain < MCI_FIFOSIZE) |
| 722 | - msmsdcc_writel(host, MCI_RXDATAAVLBLMASK, MMCIMASK1); | |
| 730 | + msmsdcc_writel(host, (mci_mask0 & (~MCI_IRQ_PIO)) | | |
| 731 | + MCI_RXDATAAVLBLMASK, MMCIMASK0); | |
| 723 | 732 | |
| 724 | 733 | if (!host->curr.xfer_remain) |
| 725 | - msmsdcc_writel(host, 0, MMCIMASK1); | |
| 734 | + msmsdcc_writel(host, (mci_mask0 & (~MCI_IRQ_PIO)) | 0, | |
| 735 | + MMCIMASK0); | |
| 726 | 736 | |
| 727 | 737 | return IRQ_HANDLED; |
| 728 | 738 | } |
| ... | ... | @@ -854,6 +864,8 @@ |
| 854 | 864 | do { |
| 855 | 865 | status = msmsdcc_readl(host, MMCISTATUS); |
| 856 | 866 | status &= msmsdcc_readl(host, MMCIMASK0); |
| 867 | + if ((status & (~MCI_IRQ_PIO)) == 0) | |
| 868 | + break; | |
| 857 | 869 | msmsdcc_writel(host, status, MMCICLEAR); |
| 858 | 870 | |
| 859 | 871 | if (status & MCI_SDIOINTR) |
drivers/mmc/host/msm_sdcc.h
| ... | ... | @@ -140,6 +140,11 @@ |
| 140 | 140 | MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \ |
| 141 | 141 | MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_DATAENDMASK|MCI_PROGDONEMASK) |
| 142 | 142 | |
| 143 | +#define MCI_IRQ_PIO \ | |
| 144 | + (MCI_RXDATAAVLBLMASK | MCI_TXDATAAVLBLMASK | MCI_RXFIFOEMPTYMASK | \ | |
| 145 | + MCI_TXFIFOEMPTYMASK | MCI_RXFIFOFULLMASK | MCI_TXFIFOFULLMASK | \ | |
| 146 | + MCI_RXFIFOHALFFULLMASK | MCI_TXFIFOHALFEMPTYMASK | \ | |
| 147 | + MCI_RXACTIVEMASK | MCI_TXACTIVEMASK) | |
| 143 | 148 | /* |
| 144 | 149 | * The size of the FIFO in bytes. |
| 145 | 150 | */ |