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Commit 4b01fef89a10cedbae9857e76283616af3f177cd

Authored by Joe Perches
Committed by Ingo Molnar
1 parent cf840147d4
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

include/asm-x86/pgtable-3level.h: checkpatch cleanups - formatting only 

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

Showing 1 changed file with 28 additions and 20 deletions Side-by-side Diff

include/asm-x86/pgtable-3level.h
Diff comments   View file @ 4b01fef
... ... @@ -8,22 +8,26 @@
8 8 * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com>
9 9 */
10 10  
11   -#define pte_ERROR(e) \
12   - printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, &(e), (e).pte_high, (e).pte_low)
13   -#define pmd_ERROR(e) \
14   - printk("%s:%d: bad pmd %p(%016Lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
15   -#define pgd_ERROR(e) \
16   - printk("%s:%d: bad pgd %p(%016Lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
  11 +#define pte_ERROR(e) \
  12 + printk("%s:%d: bad pte %p(%08lx%08lx).\n", \
  13 + __FILE__, __LINE__, &(e), (e).pte_high, (e).pte_low)
  14 +#define pmd_ERROR(e) \
  15 + printk("%s:%d: bad pmd %p(%016Lx).\n", \
  16 + __FILE__, __LINE__, &(e), pmd_val(e))
  17 +#define pgd_ERROR(e) \
  18 + printk("%s:%d: bad pgd %p(%016Lx).\n", \
  19 + __FILE__, __LINE__, &(e), pgd_val(e))
17 20  
18   -
19 21 static inline int pud_none(pud_t pud)
20 22 {
21 23 return pud_val(pud) == 0;
22 24 }
  25 +
23 26 static inline int pud_bad(pud_t pud)
24 27 {
25 28 return (pud_val(pud) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER)) != 0;
26 29 }
  30 +
27 31 static inline int pud_present(pud_t pud)
28 32 {
29 33 return pud_val(pud) & _PAGE_PRESENT;
... ... @@ -48,7 +52,8 @@
48 52 * we are justified in merely clearing the PTE present bit, followed
49 53 * by a set. The ordering here is important.
50 54 */
51   -static inline void native_set_pte_present(struct mm_struct *mm, unsigned long addr,
  55 +static inline void native_set_pte_present(struct mm_struct *mm,
  56 + unsigned long addr,
52 57 pte_t *ptep, pte_t pte)
53 58 {
54 59 ptep->pte_low = 0;
55 60  
56 61  
57 62  
58 63  
... ... @@ -60,15 +65,17 @@
60 65  
61 66 static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
62 67 {
63   - set_64bit((unsigned long long *)(ptep),native_pte_val(pte));
  68 + set_64bit((unsigned long long *)(ptep), native_pte_val(pte));
64 69 }
  70 +
65 71 static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
66 72 {
67   - set_64bit((unsigned long long *)(pmdp),native_pmd_val(pmd));
  73 + set_64bit((unsigned long long *)(pmdp), native_pmd_val(pmd));
68 74 }
  75 +
69 76 static inline void native_set_pud(pud_t *pudp, pud_t pud)
70 77 {
71   - set_64bit((unsigned long long *)(pudp),native_pud_val(pud));
  78 + set_64bit((unsigned long long *)(pudp), native_pud_val(pud));
72 79 }
73 80  
74 81 /*
... ... @@ -76,7 +83,8 @@
76 83 * entry, so clear the bottom half first and enforce ordering with a compiler
77 84 * barrier.
78 85 */
79   -static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
  86 +static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr,
  87 + pte_t *ptep)
80 88 {
81 89 ptep->pte_low = 0;
82 90 smp_wmb();
83 91  
84 92  
85 93  
... ... @@ -107,20 +115,19 @@
107 115 * current pgd to avoid unnecessary TLB flushes.
108 116 */
109 117 pgd = read_cr3();
110   - if (__pa(pudp) >= pgd && __pa(pudp) < (pgd + sizeof(pgd_t)*PTRS_PER_PGD))
  118 + if (__pa(pudp) >= pgd && __pa(pudp) <
  119 + (pgd + sizeof(pgd_t)*PTRS_PER_PGD))
111 120 write_cr3(pgd);
112 121 }
113 122  
114   -#define pud_page(pud) \
115   -((struct page *) __va(pud_val(pud) & PAGE_MASK))
  123 +#define pud_page(pud) ((struct page *) __va(pud_val(pud) & PAGE_MASK))
116 124  
117   -#define pud_page_vaddr(pud) \
118   -((unsigned long) __va(pud_val(pud) & PAGE_MASK))
  125 +#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PAGE_MASK))
119 126  
120 127  
121 128 /* Find an entry in the second-level page table.. */
122   -#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \
123   - pmd_index(address))
  129 +#define pmd_offset(pud, address) ((pmd_t *)pud_page(*(pud)) + \
  130 + pmd_index(address))
124 131  
125 132 #ifdef CONFIG_SMP
126 133 static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
... ... @@ -161,7 +168,8 @@
161 168 * put the 32 bits of offset into the high part.
162 169 */
163 170 #define pte_to_pgoff(pte) ((pte).pte_high)
164   -#define pgoff_to_pte(off) ((pte_t) { { .pte_low = _PAGE_FILE, .pte_high = (off) } })
  171 +#define pgoff_to_pte(off) \
  172 + ((pte_t) { { .pte_low = _PAGE_FILE, .pte_high = (off) } })
165 173 #define PTE_FILE_MAX_BITS 32
166 174  
167 175 /* Encode and de-code a swap entry */