Commit 4d8edbfefb630559220939ad5a3bdd8a75190cc3
1 parent
9e71296303
Exists in
smarc-l5.0.0_1.0.0-ga
and in
5 other branches
metag: cachepart: take into account small cache bits
The CORE_CONFIG2 register has bits to indicate that the data or code cache is small, i.e. that the size described in the field should be divided by 64. Take this into account in get_icache_size() and get_dcache_size(). Signed-off-by: James Hogan <james.hogan@imgtec.com>
Showing 1 changed file with 10 additions and 4 deletions Side-by-side Diff
arch/metag/kernel/cachepart.c
... | ... | @@ -24,15 +24,21 @@ |
24 | 24 | unsigned int get_dcache_size(void) |
25 | 25 | { |
26 | 26 | unsigned int config2 = metag_in32(METAC_CORE_CONFIG2); |
27 | - return 0x1000 << ((config2 & METAC_CORECFG2_DCSZ_BITS) | |
28 | - >> METAC_CORECFG2_DCSZ_S); | |
27 | + unsigned int sz = 0x1000 << ((config2 & METAC_CORECFG2_DCSZ_BITS) | |
28 | + >> METAC_CORECFG2_DCSZ_S); | |
29 | + if (config2 & METAC_CORECFG2_DCSMALL_BIT) | |
30 | + sz >>= 6; | |
31 | + return sz; | |
29 | 32 | } |
30 | 33 | |
31 | 34 | unsigned int get_icache_size(void) |
32 | 35 | { |
33 | 36 | unsigned int config2 = metag_in32(METAC_CORE_CONFIG2); |
34 | - return 0x1000 << ((config2 & METAC_CORE_C2ICSZ_BITS) | |
35 | - >> METAC_CORE_C2ICSZ_S); | |
37 | + unsigned int sz = 0x1000 << ((config2 & METAC_CORE_C2ICSZ_BITS) | |
38 | + >> METAC_CORE_C2ICSZ_S); | |
39 | + if (config2 & METAC_CORECFG2_ICSMALL_BIT) | |
40 | + sz >>= 6; | |
41 | + return sz; | |
36 | 42 | } |
37 | 43 | |
38 | 44 | unsigned int get_global_dcache_size(void) |