powerpc/85xx/86xx: Add suspend/resume support

This patch adds suspend/resume support for MPC8540 and MPC8641D- compatible CPUs. To reach sleep state, we just write the SLP bit into the PM control and status register. So far we don't support Deep Sleep mode as found in newer MPC85xx CPUs (i.e. MPC8536). It can be relatively easy implemented though, and for it we reserve 'mem' suspend type. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

powerpc/85xx/86xx: Add suspend/resume support
This patch adds suspend/resume support for MPC8540 and MPC8641D- compatible CPUs. To reach sleep state, we just write the SLP bit into the PM control and status register. So far we don't support Deep Sleep mode as found in newer MPC85xx CPUs (i.e. MPC8536). It can be relatively easy implemented though, and for it we reserve 'mem' suspend type. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Anton Vorontsov · Kumar Gala
1 parent fdfde24e10
Showing 3 changed files with 99 additions and 1 deletions Side-by-side Diff
arch/powerpc/Kconfig
arch/powerpc/sysdev/Makefile
arch/powerpc/sysdev/fsl_pmc.c
@@ -215,7 +215,8 @@
  
 config ARCH_SUSPEND_POSSIBLE
 	def_bool y
-	depends on ADB_PMU || PPC_EFIKA || PPC_LITE5200 || PPC_83xx
+	depends on ADB_PMU || PPC_EFIKA || PPC_LITE5200 || PPC_83xx || \
+		   PPC_85xx || PPC_86xx
  
 config PPC_DCR_NATIVE
 	bool
@@ -663,6 +664,14 @@
  	bool
 	select PPC_INDIRECT_PCI
 	select PCI_QUIRKS
+
+config FSL_PMC
+	bool
+	default y
+	depends on SUSPEND && (PPC_85xx || PPC_86xx)
+	help
+	  Freescale MPC85xx/MPC86xx power management controller support
+	  (suspend/resume). For MPC83xx see platforms/83xx/suspend.c
  
 config 4xx_SOC
 	bool
@@ -16,6 +16,7 @@
 obj-$(CONFIG_MMIO_NVRAM)	+= mmio_nvram.o
 obj-$(CONFIG_FSL_SOC)		+= fsl_soc.o
 obj-$(CONFIG_FSL_PCI)		+= fsl_pci.o $(fsl-msi-obj-y)
+obj-$(CONFIG_FSL_PMC)		+= fsl_pmc.o
 obj-$(CONFIG_FSL_LBC)		+= fsl_lbc.o
 obj-$(CONFIG_FSL_GTM)		+= fsl_gtm.o
 obj-$(CONFIG_MPC8xxx_GPIO)	+= mpc8xxx_gpio.o
+/*
+ * Suspend/resume support
+ *
+ * Copyright 2009  MontaVista Software, Inc.
+ *
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/suspend.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/of_platform.h>
+
+struct pmc_regs {
+	__be32 devdisr;
+	__be32 devdisr2;
+	__be32 :32;
+	__be32 :32;
+	__be32 pmcsr;
+#define PMCSR_SLP	(1 << 17)
+};
+
+static struct device *pmc_dev;
+static struct pmc_regs __iomem *pmc_regs;
+
+static int pmc_suspend_enter(suspend_state_t state)
+{
+	int ret;
+
+	setbits32(&pmc_regs->pmcsr, PMCSR_SLP);
+	/* At this point, the CPU is asleep. */
+
+	/* Upon resume, wait for SLP bit to be clear. */
+	ret = spin_event_timeout((in_be32(&pmc_regs->pmcsr) & PMCSR_SLP) == 0,
+				 10000, 10) ? 0 : -ETIMEDOUT;
+	if (ret)
+		dev_err(pmc_dev, "tired waiting for SLP bit to clear\n");
+	return ret;
+}
+
+static int pmc_suspend_valid(suspend_state_t state)
+{
+	if (state != PM_SUSPEND_STANDBY)
+		return 0;
+	return 1;
+}
+
+static struct platform_suspend_ops pmc_suspend_ops = {
+	.valid = pmc_suspend_valid,
+	.enter = pmc_suspend_enter,
+};
+
+static int pmc_probe(struct of_device *ofdev, const struct of_device_id *id)
+{
+	pmc_regs = of_iomap(ofdev->node, 0);
+	if (!pmc_regs)
+		return -ENOMEM;
+
+	pmc_dev = &ofdev->dev;
+	suspend_set_ops(&pmc_suspend_ops);
+	return 0;
+}
+
+static const struct of_device_id pmc_ids[] = {
+	{ .compatible = "fsl,mpc8548-pmc", },
+	{ .compatible = "fsl,mpc8641d-pmc", },
+	{ },
+};
+
+static struct of_platform_driver pmc_driver = {
+	.driver.name = "fsl-pmc",
+	.match_table = pmc_ids,
+	.probe = pmc_probe,
+};
+
+static int __init pmc_init(void)
+{
+	return of_register_platform_driver(&pmc_driver);
+}
+device_initcall(pmc_init);
...	...	@@ -215,7 +215,8 @@
215	215
216	216	config ARCH_SUSPEND_POSSIBLE
217	217	def_bool y
218		- depends on ADB_PMU \|\| PPC_EFIKA \|\| PPC_LITE5200 \|\| PPC_83xx
	218	+ depends on ADB_PMU \|\| PPC_EFIKA \|\| PPC_LITE5200 \|\| PPC_83xx \|\| \
	219	+ PPC_85xx \|\| PPC_86xx
219	220
220	221	config PPC_DCR_NATIVE
221	222	bool
...	...	@@ -663,6 +664,14 @@
663	664	bool
664	665	select PPC_INDIRECT_PCI
665	666	select PCI_QUIRKS
	667	+
	668	+config FSL_PMC
	669	+ bool
	670	+ default y
	671	+ depends on SUSPEND && (PPC_85xx \|\| PPC_86xx)
	672	+ help
	673	+ Freescale MPC85xx/MPC86xx power management controller support
	674	+ (suspend/resume). For MPC83xx see platforms/83xx/suspend.c
666	675
667	676	config 4xx_SOC
668	677	bool
...	...	@@ -16,6 +16,7 @@
16	16	obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
17	17	obj-$(CONFIG_FSL_SOC) += fsl_soc.o
18	18	obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
	19	+obj-$(CONFIG_FSL_PMC) += fsl_pmc.o
19	20	obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
20	21	obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
21	22	obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o
	1	+/*
	2	+ * Suspend/resume support
	3	+ *
	4	+ * Copyright 2009 MontaVista Software, Inc.
	5	+ *
	6	+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
	7	+ *
	8	+ * This program is free software; you can redistribute it and/or modify
	9	+ * it under the terms of the GNU General Public License as published by
	10	+ * the Free Software Foundation; either version 2 of the License, or
	11	+ * (at your option) any later version.
	12	+ */
	13	+
	14	+#include <linux/init.h>
	15	+#include <linux/types.h>
	16	+#include <linux/errno.h>
	17	+#include <linux/suspend.h>
	18	+#include <linux/delay.h>
	19	+#include <linux/device.h>
	20	+#include <linux/of_platform.h>
	21	+
	22	+struct pmc_regs {
	23	+ __be32 devdisr;
	24	+ __be32 devdisr2;
	25	+ __be32 :32;
	26	+ __be32 :32;
	27	+ __be32 pmcsr;
	28	+#define PMCSR_SLP (1 << 17)
	29	+};
	30	+
	31	+static struct device *pmc_dev;
	32	+static struct pmc_regs __iomem *pmc_regs;
	33	+
	34	+static int pmc_suspend_enter(suspend_state_t state)
	35	+{
	36	+ int ret;
	37	+
	38	+ setbits32(&pmc_regs->pmcsr, PMCSR_SLP);
	39	+ /* At this point, the CPU is asleep. */
	40	+
	41	+ /* Upon resume, wait for SLP bit to be clear. */
	42	+ ret = spin_event_timeout((in_be32(&pmc_regs->pmcsr) & PMCSR_SLP) == 0,
	43	+ 10000, 10) ? 0 : -ETIMEDOUT;
	44	+ if (ret)
	45	+ dev_err(pmc_dev, "tired waiting for SLP bit to clear\n");
	46	+ return ret;
	47	+}
	48	+
	49	+static int pmc_suspend_valid(suspend_state_t state)
	50	+{
	51	+ if (state != PM_SUSPEND_STANDBY)
	52	+ return 0;
	53	+ return 1;
	54	+}
	55	+
	56	+static struct platform_suspend_ops pmc_suspend_ops = {
	57	+ .valid = pmc_suspend_valid,
	58	+ .enter = pmc_suspend_enter,
	59	+};
	60	+
	61	+static int pmc_probe(struct of_device ofdev, const struct of_device_id id)
	62	+{
	63	+ pmc_regs = of_iomap(ofdev->node, 0);
	64	+ if (!pmc_regs)
	65	+ return -ENOMEM;
	66	+
	67	+ pmc_dev = &ofdev->dev;
	68	+ suspend_set_ops(&pmc_suspend_ops);
	69	+ return 0;
	70	+}
	71	+
	72	+static const struct of_device_id pmc_ids[] = {
	73	+ { .compatible = "fsl,mpc8548-pmc", },
	74	+ { .compatible = "fsl,mpc8641d-pmc", },
	75	+ { },
	76	+};
	77	+
	78	+static struct of_platform_driver pmc_driver = {
	79	+ .driver.name = "fsl-pmc",
	80	+ .match_table = pmc_ids,
	81	+ .probe = pmc_probe,
	82	+};
	83	+
	84	+static int __init pmc_init(void)
	85	+{
	86	+ return of_register_platform_driver(&pmc_driver);
	87	+}
	88	+device_initcall(pmc_init);