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Commit 5006d1aae813727cc77cc56cca9e90ef748650ce

Authored by Benjamin Herrenschmidt
2 parents 22d660ffd0 4c3ed7d61b
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

Merge commit 'gcl/gcl-next'

Showing 5 changed files Side-by-side Diff

arch/powerpc/platforms/52xx/mpc52xx_common.c
Diff comments   View file @ 5006d1a
... ... @@ -90,7 +90,7 @@
90 90 of_node_put(np);
91 91 if (!xlb) {
92 92 printk(KERN_ERR __FILE__ ": "
93   - "Error mapping XLB in mpc52xx_setup_cpu(). "
  93 + "Error mapping XLB in mpc52xx_setup_cpu(). "
94 94 "Expect some abnormal behavior\n");
95 95 return;
96 96 }
... ... @@ -216,7 +216,8 @@
216 216 out_be32(&mpc52xx_wdt->count, 0x000000ff);
217 217 out_be32(&mpc52xx_wdt->mode, 0x00009004);
218 218 } else
219   - printk("mpc52xx_restart: Can't access wdt. "
  219 + printk(KERN_ERR __FILE__ ": "
  220 + "mpc52xx_restart: Can't access wdt. "
220 221 "Restart impossible, system halted.\n");
221 222  
222 223 while (1);
arch/powerpc/platforms/52xx/mpc52xx_pci.c
Diff comments   View file @ 5006d1a
... ... @@ -265,8 +265,11 @@
265 265 /* Memory windows */
266 266 res = &hose->mem_resources[0];
267 267 if (res->flags) {
268   - pr_debug("mem_resource[0] = {.start=%x, .end=%x, .flags=%lx}\n",
269   - res->start, res->end, res->flags);
  268 + pr_debug("mem_resource[0] = "
  269 + "{.start=%llx, .end=%llx, .flags=%llx}\n",
  270 + (unsigned long long)res->start,
  271 + (unsigned long long)res->end,
  272 + (unsigned long long)res->flags);
270 273 out_be32(&pci_regs->iw0btar,
271 274 MPC52xx_PCI_IWBTAR_TRANSLATION(res->start, res->start,
272 275 res->end - res->start + 1));
273 276  
... ... @@ -297,9 +300,11 @@
297 300 printk(KERN_ERR "%s: Didn't find IO resources\n", __FILE__);
298 301 return;
299 302 }
300   - pr_debug(".io_resource={.start=%x,.end=%x,.flags=%lx} "
  303 + pr_debug(".io_resource={.start=%llx,.end=%llx,.flags=%llx} "
301 304 ".io_base_phys=0x%p\n",
302   - res->start, res->end, res->flags, (void*)hose->io_base_phys);
  305 + (unsigned long long)res->start,
  306 + (unsigned long long)res->end,
  307 + (unsigned long long)res->flags, (void*)hose->io_base_phys);
303 308 out_be32(&pci_regs->iw2btar,
304 309 MPC52xx_PCI_IWBTAR_TRANSLATION(hose->io_base_phys,
305 310 res->start,
drivers/i2c/busses/i2c-mpc.c
Diff comments   View file @ 5006d1a
... ... @@ -312,7 +312,6 @@
312 312 .name = "MPC adapter",
313 313 .id = I2C_HW_MPC107,
314 314 .algo = &mpc_algo,
315   - .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
316 315 .timeout = 1,
317 316 };
318 317  
... ... @@ -410,7 +410,7 @@
410 410 char *modalias;
411 411 };
412 412 static struct of_modalias_table of_modalias_table[] = {
413   - /* Empty for now; add entries as needed */
  413 + { "fsl,mcu-mpc8349emitx", "mcu-mpc8349emitx" },
414 414 };
415 415  
416 416 /**
drivers/spi/mpc52xx_psc_spi.c
Diff comments   View file @ 5006d1a
... ... @@ -108,13 +108,13 @@
108 108 * Because psc->ccr is defined as 16bit register instead of 32bit
109 109 * just set the lower byte of BitClkDiv
110 110 */
111   - ccr = in_be16(&psc->ccr);
  111 + ccr = in_be16((u16 __iomem *)&psc->ccr);
112 112 ccr &= 0xFF00;
113 113 if (cs->speed_hz)
114 114 ccr |= (MCLK / cs->speed_hz - 1) & 0xFF;
115 115 else /* by default SPI Clk 1MHz */
116 116 ccr |= (MCLK / 1000000 - 1) & 0xFF;
117   - out_be16(&psc->ccr, ccr);
  117 + out_be16((u16 __iomem *)&psc->ccr, ccr);
118 118 mps->bits_per_word = cs->bits_per_word;
119 119  
120 120 if (mps->activate_cs)
... ... @@ -347,7 +347,7 @@
347 347 /* Configure 8bit codec mode as a SPI master and use EOF flags */
348 348 /* SICR_SIM_CODEC8|SICR_GENCLK|SICR_SPI|SICR_MSTR|SICR_USEEOF */
349 349 out_be32(&psc->sicr, 0x0180C800);
350   - out_be16(&psc->ccr, 0x070F); /* by default SPI Clk 1MHz */
  350 + out_be16((u16 __iomem *)&psc->ccr, 0x070F); /* default SPI Clk 1MHz */
351 351  
352 352 /* Set 2ms DTL delay */
353 353 out_8(&psc->ctur, 0x00);