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Commit 5285eb57c9a20d8df2569c770ff6048c3202cc91

Authored by Nicolas Pitre
Committed by Russell King
1 parent d07ad967e3
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

[ARM] 3135/1: harden SA11x0 and PXA2xx timer init code 

Patch from Nicolas Pitre

Make it completely deterministic and leave nothing to chance
(even if it had at worst 0.001% probability of failing).

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Showing 2 changed files with 10 additions and 6 deletions Side-by-side Diff

arch/arm/mach-pxa/time.c
Diff comments   View file @ 5285eb5
... ... @@ -132,11 +132,13 @@
132 132 tv.tv_sec = pxa_get_rtc_time();
133 133 do_settimeofday(&tv);
134 134  
135   - OSMR0 = 0; /* set initial match at 0 */
  135 + OIER = 0; /* disable any timer interrupts */
  136 + OSCR = LATCH*2; /* push OSCR out of the way */
  137 + OSMR0 = LATCH; /* set initial match */
136 138 OSSR = 0xf; /* clear status on all timers */
137 139 setup_irq(IRQ_OST0, &pxa_timer_irq);
138   - OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */
139   - OSCR = 0; /* initialize free-running timer, force first match */
  140 + OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */
  141 + OSCR = 0; /* initialize free-running timer */
140 142 }
141 143  
142 144 #ifdef CONFIG_NO_IDLE_HZ
arch/arm/mach-sa1100/time.c
Diff comments   View file @ 5285eb5
... ... @@ -124,11 +124,13 @@
124 124 tv.tv_sec = sa1100_get_rtc_time();
125 125 do_settimeofday(&tv);
126 126  
127   - OSMR0 = 0; /* set initial match at 0 */
  127 + OIER = 0; /* disable any timer interrupts */
  128 + OSCR = LATCH*2; /* push OSCR out of the way */
  129 + OSMR0 = LATCH; /* set initial match */
128 130 OSSR = 0xf; /* clear status on all timers */
129 131 setup_irq(IRQ_OST0, &sa1100_timer_irq);
130   - OIER |= OIER_E0; /* enable match on timer 0 to cause interrupts */
131   - OSCR = 0; /* initialize free-running timer, force first match */
  132 + OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */
  133 + OSCR = 0; /* initialize free-running timer */
132 134 }
133 135  
134 136 #ifdef CONFIG_NO_IDLE_HZ