Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/…

…git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: enable DMAR by default xen: disable interrupts early, as start_kernel expects gpu/drm, x86, PAT: io_mapping_create_wc and resource_size_t gpu/drm, x86, PAT: Handle io_mapping_create_wc() errors in a clean way x86, Voyager: fix compile by lifting the degeneracy of phys_cpu_present_map x86, doc: fix references to Documentation/x86/i386/boot.txt

Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/…
…git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: enable DMAR by default xen: disable interrupts early, as start_kernel expects gpu/drm, x86, PAT: io_mapping_create_wc and resource_size_t gpu/drm, x86, PAT: Handle io_mapping_create_wc() errors in a clean way x86, Voyager: fix compile by lifting the degeneracy of phys_cpu_present_map x86, doc: fix references to Documentation/x86/i386/boot.txt
Linus Torvalds
2 parents 6febf65b29 f6be37fdc6
Showing 8 changed files Side-by-side Diff
Documentation/kernel-parameters.txt
arch/x86/Kconfig
arch/x86/include/asm/iomap.h
arch/x86/mach-voyager/voyager_smp.c
arch/x86/mm/iomap_32.c
arch/x86/xen/enlighten.c
drivers/gpu/drm/i915/i915_dma.c
include/linux/io-mapping.h
@@ -114,7 +114,7 @@
 Parameters denoted with BOOT are actually interpreted by the boot
 loader, and have no meaning to the kernel directly.
 Do not modify the syntax of boot loader parameters without extreme
-need or coordination with <Documentation/x86/i386/boot.txt>.
+need or coordination with <Documentation/x86/boot.txt>.
  
 There are also arch-specific kernel-parameters not documented here.
 See for example <Documentation/x86/x86_64/boot-options.txt>.
@@ -2451,7 +2451,7 @@
 			See Documentation/fb/modedb.txt.
  
 	vga=		[BOOT,X86-32] Select a particular video mode
-			See Documentation/x86/i386/boot.txt and
+			See Documentation/x86/boot.txt and
 			Documentation/svga.txt.
 			Use vga=ask for menu.
 			This is actually a boot loader parameter; the value is
@@ -1803,7 +1803,7 @@
 	  remapping devices.
  
 config DMAR_DEFAULT_ON
-	def_bool n
+	def_bool y
 	prompt "Enable DMA Remapping Devices by default"
 	depends on DMAR
 	help
@@ -23,6 +23,9 @@
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
  
+int
+is_io_mapping_possible(resource_size_t base, unsigned long size);
+
 void *
 iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot);
  
@@ -65,7 +65,7 @@
  
 /* Bitmask of CPUs present in the system - exported by i386_syms.c, used
  * by scheduler but indexed physically */
-cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
+static cpumask_t voyager_phys_cpu_present_map = CPU_MASK_NONE;
  
 /* The internal functions */
 static void send_CPI(__u32 cpuset, __u8 cpi);
  
  
  
  
@@ -366,19 +366,19 @@
 	/* set up everything for just this CPU, we can alter
 	 * this as we start the other CPUs later */
 	/* now get the CPU disposition from the extended CMOS */
-	cpus_addr(phys_cpu_present_map)[0] =
+	cpus_addr(voyager_phys_cpu_present_map)[0] =
 	    voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK);
-	cpus_addr(phys_cpu_present_map)[0] |=
+	cpus_addr(voyager_phys_cpu_present_map)[0] |=
 	    voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8;
-	cpus_addr(phys_cpu_present_map)[0] |=
+	cpus_addr(voyager_phys_cpu_present_map)[0] |=
 	    voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
 				       2) << 16;
-	cpus_addr(phys_cpu_present_map)[0] |=
+	cpus_addr(voyager_phys_cpu_present_map)[0] |=
 	    voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
 				       3) << 24;
-	init_cpu_possible(&phys_cpu_present_map);
-	printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n",
-	       cpus_addr(phys_cpu_present_map)[0]);
+	init_cpu_possible(&voyager_phys_cpu_present_map);
+	printk("VOYAGER SMP: voyager_phys_cpu_present_map = 0x%lx\n",
+	       cpus_addr(voyager_phys_cpu_present_map)[0]);
 	/* Here we set up the VIC to enable SMP */
 	/* enable the CPIs by writing the base vector to their register */
 	outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER);
  
@@ -628,15 +628,15 @@
 		/* now that the cat has probed the Voyager System Bus, sanity
 		 * check the cpu map */
 		if (((voyager_quad_processors | voyager_extended_vic_processors)
-		     & cpus_addr(phys_cpu_present_map)[0]) !=
-		    cpus_addr(phys_cpu_present_map)[0]) {
+		     & cpus_addr(voyager_phys_cpu_present_map)[0]) !=
+		    cpus_addr(voyager_phys_cpu_present_map)[0]) {
 			/* should panic */
 			printk("\n\n***WARNING*** "
 			       "Sanity check of CPU present map FAILED\n");
 		}
 	} else if (voyager_level == 4)
 		voyager_extended_vic_processors =
-		    cpus_addr(phys_cpu_present_map)[0];
+		    cpus_addr(voyager_phys_cpu_present_map)[0];
  
 	/* this sets up the idle task to run on the current cpu */
 	voyager_extended_cpus = 1;
@@ -670,7 +670,7 @@
 	/* loop over all the extended VIC CPUs and boot them.  The
 	 * Quad CPUs must be bootstrapped by their extended VIC cpu */
 	for (i = 0; i < nr_cpu_ids; i++) {
-		if (i == boot_cpu_id || !cpu_isset(i, phys_cpu_present_map))
+		if (i == boot_cpu_id || !cpu_isset(i, voyager_phys_cpu_present_map))
 			continue;
 		do_boot_cpu(i);
 		/* This udelay seems to be needed for the Quad boots
@@ -20,6 +20,24 @@
 #include <asm/pat.h>
 #include <linux/module.h>
  
+#ifdef CONFIG_X86_PAE
+int
+is_io_mapping_possible(resource_size_t base, unsigned long size)
+{
+	return 1;
+}
+#else
+int
+is_io_mapping_possible(resource_size_t base, unsigned long size)
+{
+	/* There is no way to map greater than 1 << 32 address without PAE */
+	if (base + size > 0x100000000ULL)
+		return 0;
+
+	return 1;
+}
+#endif
+
 /* Map 'pfn' using fixed map 'type' and protections 'prot'
  */
 void *
@@ -1672,6 +1672,9 @@
 	   possible map and a non-dummy shared_info. */
 	per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
  
+	local_irq_disable();
+	early_boot_irqs_off();
+
 	xen_raw_console_write("mapping kernel into physical memory\n");
 	pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
  
@@ -1090,6 +1090,11 @@
         dev_priv->mm.gtt_mapping =
 		io_mapping_create_wc(dev->agp->base,
 				     dev->agp->agp_info.aper_size * 1024*1024);
+	if (dev_priv->mm.gtt_mapping == NULL) {
+		ret = -EIO;
+		goto out_rmmap;
+	}
+
 	/* Set up a WC MTRR for non-PAT systems.  This is more common than
 	 * one would think, because the kernel disables PAT on first
 	 * generation Core chips because WC PAT gets overridden by a UC
@@ -1122,7 +1127,7 @@
 	if (!I915_NEED_GFX_HWS(dev)) {
 		ret = i915_init_phys_hws(dev);
 		if (ret != 0)
-			goto out_rmmap;
+			goto out_iomapfree;
 	}
  
 	/* On the 945G/GM, the chipset reports the MSI capability on the
@@ -1161,6 +1166,8 @@
  
 	return 0;
  
+out_iomapfree:
+	io_mapping_free(dev_priv->mm.gtt_mapping);
 out_rmmap:
 	iounmap(dev_priv->regs);
 free_priv:
@@ -30,11 +30,14 @@
  * See Documentation/io_mapping.txt
  */
  
-/* this struct isn't actually defined anywhere */
-struct io_mapping;
-
 #ifdef CONFIG_HAVE_ATOMIC_IOMAP
  
+struct io_mapping {
+	resource_size_t base;
+	unsigned long size;
+	pgprot_t prot;
+};
+
 /*
  * For small address space machines, mapping large objects
  * into the kernel virtual space isn't practical. Where
  
  
  
@@ -43,23 +46,40 @@
  */
  
 static inline struct io_mapping *
-io_mapping_create_wc(unsigned long base, unsigned long size)
+io_mapping_create_wc(resource_size_t base, unsigned long size)
 {
-	return (struct io_mapping *) base;
+	struct io_mapping *iomap;
+
+	if (!is_io_mapping_possible(base, size))
+		return NULL;
+
+	iomap = kmalloc(sizeof(*iomap), GFP_KERNEL);
+	if (!iomap)
+		return NULL;
+
+	iomap->base = base;
+	iomap->size = size;
+	iomap->prot = pgprot_writecombine(__pgprot(__PAGE_KERNEL));
+	return iomap;
 }
  
 static inline void
 io_mapping_free(struct io_mapping *mapping)
 {
+	kfree(mapping);
 }
  
 /* Atomic map/unmap */
 static inline void *
 io_mapping_map_atomic_wc(struct io_mapping *mapping, unsigned long offset)
 {
-	offset += (unsigned long) mapping;
-	return iomap_atomic_prot_pfn(offset >> PAGE_SHIFT, KM_USER0,
-				     __pgprot(__PAGE_KERNEL_WC));
+	resource_size_t phys_addr;
+	unsigned long pfn;
+
+	BUG_ON(offset >= mapping->size);
+	phys_addr = mapping->base + offset;
+	pfn = (unsigned long) (phys_addr >> PAGE_SHIFT);
+	return iomap_atomic_prot_pfn(pfn, KM_USER0, mapping->prot);
 }
  
 static inline void
@@ -71,8 +91,9 @@
 static inline void *
 io_mapping_map_wc(struct io_mapping *mapping, unsigned long offset)
 {
-	offset += (unsigned long) mapping;
-	return ioremap_wc(offset, PAGE_SIZE);
+	BUG_ON(offset >= mapping->size);
+	resource_size_t phys_addr = mapping->base + offset;
+	return ioremap_wc(phys_addr, PAGE_SIZE);
 }
  
 static inline void
  
@@ -83,9 +104,12 @@
  
 #else
  
+/* this struct isn't actually defined anywhere */
+struct io_mapping;
+
 /* Create the io_mapping object*/
 static inline struct io_mapping *
-io_mapping_create_wc(unsigned long base, unsigned long size)
+io_mapping_create_wc(resource_size_t base, unsigned long size)
 {
 	return (struct io_mapping *) ioremap_wc(base, size);
 }
...	...	@@ -114,7 +114,7 @@
114	114	Parameters denoted with BOOT are actually interpreted by the boot
115	115	loader, and have no meaning to the kernel directly.
116	116	Do not modify the syntax of boot loader parameters without extreme
117		-need or coordination with <Documentation/x86/i386/boot.txt>.
	117	+need or coordination with <Documentation/x86/boot.txt>.
118	118
119	119	There are also arch-specific kernel-parameters not documented here.
120	120	See for example <Documentation/x86/x86_64/boot-options.txt>.
...	...	@@ -2451,7 +2451,7 @@
2451	2451	See Documentation/fb/modedb.txt.
2452	2452
2453	2453	vga= [BOOT,X86-32] Select a particular video mode
2454		- See Documentation/x86/i386/boot.txt and
	2454	+ See Documentation/x86/boot.txt and
2455	2455	Documentation/svga.txt.
2456	2456	Use vga=ask for menu.
2457	2457	This is actually a boot loader parameter; the value is
...	...	@@ -1803,7 +1803,7 @@
1803	1803	remapping devices.
1804	1804
1805	1805	config DMAR_DEFAULT_ON
1806		- def_bool n
	1806	+ def_bool y
1807	1807	prompt "Enable DMA Remapping Devices by default"
1808	1808	depends on DMAR
1809	1809	help
...	...	@@ -23,6 +23,9 @@
23	23	#include <asm/pgtable.h>
24	24	#include <asm/tlbflush.h>
25	25
	26	+int
	27	+is_io_mapping_possible(resource_size_t base, unsigned long size);
	28	+
26	29	void *
27	30	iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot);
28	31
...	...	@@ -65,7 +65,7 @@
65	65
66	66	/* Bitmask of CPUs present in the system - exported by i386_syms.c, used
67	67	* by scheduler but indexed physically */
68		-cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
	68	+static cpumask_t voyager_phys_cpu_present_map = CPU_MASK_NONE;
69	69
70	70	/* The internal functions */
71	71	static void send_CPI(__u32 cpuset, __u8 cpi);
72	72
73	73
74	74
75	75
...	...	@@ -366,19 +366,19 @@
366	366	/* set up everything for just this CPU, we can alter
367	367	* this as we start the other CPUs later */
368	368	/* now get the CPU disposition from the extended CMOS */
369		- cpus_addr(phys_cpu_present_map)[0] =
	369	+ cpus_addr(voyager_phys_cpu_present_map)[0] =
370	370	voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK);
371		- cpus_addr(phys_cpu_present_map)[0] \|=
	371	+ cpus_addr(voyager_phys_cpu_present_map)[0] \|=
372	372	voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8;
373		- cpus_addr(phys_cpu_present_map)[0] \|=
	373	+ cpus_addr(voyager_phys_cpu_present_map)[0] \|=
374	374	voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
375	375	2) << 16;
376		- cpus_addr(phys_cpu_present_map)[0] \|=
	376	+ cpus_addr(voyager_phys_cpu_present_map)[0] \|=
377	377	voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK +
378	378	3) << 24;
379		- init_cpu_possible(&phys_cpu_present_map);
380		- printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n",
381		- cpus_addr(phys_cpu_present_map)[0]);
	379	+ init_cpu_possible(&voyager_phys_cpu_present_map);
	380	+ printk("VOYAGER SMP: voyager_phys_cpu_present_map = 0x%lx\n",
	381	+ cpus_addr(voyager_phys_cpu_present_map)[0]);
382	382	/* Here we set up the VIC to enable SMP */
383	383	/* enable the CPIs by writing the base vector to their register */
384	384	outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER);
385	385
...	...	@@ -628,15 +628,15 @@
628	628	/* now that the cat has probed the Voyager System Bus, sanity
629	629	* check the cpu map */
630	630	if (((voyager_quad_processors \| voyager_extended_vic_processors)
631		- & cpus_addr(phys_cpu_present_map)[0]) !=
632		- cpus_addr(phys_cpu_present_map)[0]) {
	631	+ & cpus_addr(voyager_phys_cpu_present_map)[0]) !=
	632	+ cpus_addr(voyager_phys_cpu_present_map)[0]) {
633	633	/* should panic */
634	634	printk("\n\n*WARNING* "
635	635	"Sanity check of CPU present map FAILED\n");
636	636	}
637	637	} else if (voyager_level == 4)
638	638	voyager_extended_vic_processors =
639		- cpus_addr(phys_cpu_present_map)[0];
	639	+ cpus_addr(voyager_phys_cpu_present_map)[0];
640	640
641	641	/* this sets up the idle task to run on the current cpu */
642	642	voyager_extended_cpus = 1;
...	...	@@ -670,7 +670,7 @@
670	670	/* loop over all the extended VIC CPUs and boot them. The
671	671	* Quad CPUs must be bootstrapped by their extended VIC cpu */
672	672	for (i = 0; i < nr_cpu_ids; i++) {
673		- if (i == boot_cpu_id \|\| !cpu_isset(i, phys_cpu_present_map))
	673	+ if (i == boot_cpu_id \|\| !cpu_isset(i, voyager_phys_cpu_present_map))
674	674	continue;
675	675	do_boot_cpu(i);
676	676	/* This udelay seems to be needed for the Quad boots
...	...	@@ -20,6 +20,24 @@
20	20	#include <asm/pat.h>
21	21	#include <linux/module.h>
22	22
	23	+#ifdef CONFIG_X86_PAE
	24	+int
	25	+is_io_mapping_possible(resource_size_t base, unsigned long size)
	26	+{
	27	+ return 1;
	28	+}
	29	+#else
	30	+int
	31	+is_io_mapping_possible(resource_size_t base, unsigned long size)
	32	+{
	33	+ /* There is no way to map greater than 1 << 32 address without PAE */
	34	+ if (base + size > 0x100000000ULL)
	35	+ return 0;
	36	+
	37	+ return 1;
	38	+}
	39	+#endif
	40	+
23	41	/* Map 'pfn' using fixed map 'type' and protections 'prot'
24	42	*/
25	43	void *
...	...	@@ -1672,6 +1672,9 @@
1672	1672	possible map and a non-dummy shared_info. */
1673	1673	per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
1674	1674
	1675	+ local_irq_disable();
	1676	+ early_boot_irqs_off();
	1677	+
1675	1678	xen_raw_console_write("mapping kernel into physical memory\n");
1676	1679	pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
1677	1680
...	...	@@ -1090,6 +1090,11 @@
1090	1090	dev_priv->mm.gtt_mapping =
1091	1091	io_mapping_create_wc(dev->agp->base,
1092	1092	dev->agp->agp_info.aper_size * 1024*1024);
	1093	+ if (dev_priv->mm.gtt_mapping == NULL) {
	1094	+ ret = -EIO;
	1095	+ goto out_rmmap;
	1096	+ }
	1097	+
1093	1098	/* Set up a WC MTRR for non-PAT systems. This is more common than
1094	1099	* one would think, because the kernel disables PAT on first
1095	1100	* generation Core chips because WC PAT gets overridden by a UC
...	...	@@ -1122,7 +1127,7 @@
1122	1127	if (!I915_NEED_GFX_HWS(dev)) {
1123	1128	ret = i915_init_phys_hws(dev);
1124	1129	if (ret != 0)
1125		- goto out_rmmap;
	1130	+ goto out_iomapfree;
1126	1131	}
1127	1132
1128	1133	/* On the 945G/GM, the chipset reports the MSI capability on the
...	...	@@ -1161,6 +1166,8 @@
1161	1166
1162	1167	return 0;
1163	1168
	1169	+out_iomapfree:
	1170	+ io_mapping_free(dev_priv->mm.gtt_mapping);
1164	1171	out_rmmap:
1165	1172	iounmap(dev_priv->regs);
1166	1173	free_priv:
...	...	@@ -30,11 +30,14 @@
30	30	* See Documentation/io_mapping.txt
31	31	*/
32	32
33		-/* this struct isn't actually defined anywhere */
34		-struct io_mapping;
35		-
36	33	#ifdef CONFIG_HAVE_ATOMIC_IOMAP
37	34
	35	+struct io_mapping {
	36	+ resource_size_t base;
	37	+ unsigned long size;
	38	+ pgprot_t prot;
	39	+};
	40	+
38	41	/*
39	42	* For small address space machines, mapping large objects
40	43	* into the kernel virtual space isn't practical. Where
41	44
42	45
43	46
...	...	@@ -43,23 +46,40 @@
43	46	*/
44	47
45	48	static inline struct io_mapping *
46		-io_mapping_create_wc(unsigned long base, unsigned long size)
	49	+io_mapping_create_wc(resource_size_t base, unsigned long size)
47	50	{
48		- return (struct io_mapping *) base;
	51	+ struct io_mapping *iomap;
	52	+
	53	+ if (!is_io_mapping_possible(base, size))
	54	+ return NULL;
	55	+
	56	+ iomap = kmalloc(sizeof(*iomap), GFP_KERNEL);
	57	+ if (!iomap)
	58	+ return NULL;
	59	+
	60	+ iomap->base = base;
	61	+ iomap->size = size;
	62	+ iomap->prot = pgprot_writecombine(__pgprot(__PAGE_KERNEL));
	63	+ return iomap;
49	64	}
50	65
51	66	static inline void
52	67	io_mapping_free(struct io_mapping *mapping)
53	68	{
	69	+ kfree(mapping);
54	70	}
55	71
56	72	/* Atomic map/unmap */
57	73	static inline void *
58	74	io_mapping_map_atomic_wc(struct io_mapping *mapping, unsigned long offset)
59	75	{
60		- offset += (unsigned long) mapping;
61		- return iomap_atomic_prot_pfn(offset >> PAGE_SHIFT, KM_USER0,
62		- __pgprot(__PAGE_KERNEL_WC));
	76	+ resource_size_t phys_addr;
	77	+ unsigned long pfn;
	78	+
	79	+ BUG_ON(offset >= mapping->size);
	80	+ phys_addr = mapping->base + offset;
	81	+ pfn = (unsigned long) (phys_addr >> PAGE_SHIFT);
	82	+ return iomap_atomic_prot_pfn(pfn, KM_USER0, mapping->prot);
63	83	}
64	84
65	85	static inline void
...	...	@@ -71,8 +91,9 @@
71	91	static inline void *
72	92	io_mapping_map_wc(struct io_mapping *mapping, unsigned long offset)
73	93	{
74		- offset += (unsigned long) mapping;
75		- return ioremap_wc(offset, PAGE_SIZE);
	94	+ BUG_ON(offset >= mapping->size);
	95	+ resource_size_t phys_addr = mapping->base + offset;
	96	+ return ioremap_wc(phys_addr, PAGE_SIZE);
76	97	}
77	98
78	99	static inline void
79	100
...	...	@@ -83,9 +104,12 @@
83	104
84	105	#else
85	106
	107	+/* this struct isn't actually defined anywhere */
	108	+struct io_mapping;
	109	+
86	110	/* Create the io_mapping object*/
87	111	static inline struct io_mapping *
88		-io_mapping_create_wc(unsigned long base, unsigned long size)
	112	+io_mapping_create_wc(resource_size_t base, unsigned long size)
89	113	{
90	114	return (struct io_mapping *) ioremap_wc(base, size);
91	115	}