Commit 577cd7584cf5199f1ea22cca0ad1fa129a98effa
Committed by
Paul Mundt
1 parent
6339204ecc
Exists in
master
and in
7 other branches
sh: extend INTC with struct intc_hw_desc
This patch updates the INTC code by moving all vectors, groups and registers from struct intc_desc to struct intc_hw_desc. The idea is that INTC tables should go from using the macro(s) DECLARE_INTC_DESC..() only to using struct intc_desc with name and hw initialized using the macro INTC_HW_DESC(). This move makes it easy to initialize an extended struct intc_desc in the future. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Showing 2 changed files with 65 additions and 54 deletions Side-by-side Diff
drivers/sh/intc.c
... | ... | @@ -400,11 +400,11 @@ |
400 | 400 | static intc_enum __init intc_grp_id(struct intc_desc *desc, |
401 | 401 | intc_enum enum_id) |
402 | 402 | { |
403 | - struct intc_group *g = desc->groups; | |
403 | + struct intc_group *g = desc->hw.groups; | |
404 | 404 | unsigned int i, j; |
405 | 405 | |
406 | - for (i = 0; g && enum_id && i < desc->nr_groups; i++) { | |
407 | - g = desc->groups + i; | |
406 | + for (i = 0; g && enum_id && i < desc->hw.nr_groups; i++) { | |
407 | + g = desc->hw.groups + i; | |
408 | 408 | |
409 | 409 | for (j = 0; g->enum_ids[j]; j++) { |
410 | 410 | if (g->enum_ids[j] != enum_id) |
411 | 411 | |
... | ... | @@ -421,12 +421,12 @@ |
421 | 421 | struct intc_desc_int *d, |
422 | 422 | intc_enum enum_id, int do_grps) |
423 | 423 | { |
424 | - struct intc_mask_reg *mr = desc->mask_regs; | |
424 | + struct intc_mask_reg *mr = desc->hw.mask_regs; | |
425 | 425 | unsigned int i, j, fn, mode; |
426 | 426 | unsigned long reg_e, reg_d; |
427 | 427 | |
428 | - for (i = 0; mr && enum_id && i < desc->nr_mask_regs; i++) { | |
429 | - mr = desc->mask_regs + i; | |
428 | + for (i = 0; mr && enum_id && i < desc->hw.nr_mask_regs; i++) { | |
429 | + mr = desc->hw.mask_regs + i; | |
430 | 430 | |
431 | 431 | for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) { |
432 | 432 | if (mr->enum_ids[j] != enum_id) |
433 | 433 | |
... | ... | @@ -469,12 +469,12 @@ |
469 | 469 | struct intc_desc_int *d, |
470 | 470 | intc_enum enum_id, int do_grps) |
471 | 471 | { |
472 | - struct intc_prio_reg *pr = desc->prio_regs; | |
472 | + struct intc_prio_reg *pr = desc->hw.prio_regs; | |
473 | 473 | unsigned int i, j, fn, mode, bit; |
474 | 474 | unsigned long reg_e, reg_d; |
475 | 475 | |
476 | - for (i = 0; pr && enum_id && i < desc->nr_prio_regs; i++) { | |
477 | - pr = desc->prio_regs + i; | |
476 | + for (i = 0; pr && enum_id && i < desc->hw.nr_prio_regs; i++) { | |
477 | + pr = desc->hw.prio_regs + i; | |
478 | 478 | |
479 | 479 | for (j = 0; j < ARRAY_SIZE(pr->enum_ids); j++) { |
480 | 480 | if (pr->enum_ids[j] != enum_id) |
481 | 481 | |
... | ... | @@ -517,12 +517,12 @@ |
517 | 517 | struct intc_desc_int *d, |
518 | 518 | intc_enum enum_id) |
519 | 519 | { |
520 | - struct intc_mask_reg *mr = desc->ack_regs; | |
520 | + struct intc_mask_reg *mr = desc->hw.ack_regs; | |
521 | 521 | unsigned int i, j, fn, mode; |
522 | 522 | unsigned long reg_e, reg_d; |
523 | 523 | |
524 | - for (i = 0; mr && enum_id && i < desc->nr_ack_regs; i++) { | |
525 | - mr = desc->ack_regs + i; | |
524 | + for (i = 0; mr && enum_id && i < desc->hw.nr_ack_regs; i++) { | |
525 | + mr = desc->hw.ack_regs + i; | |
526 | 526 | |
527 | 527 | for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) { |
528 | 528 | if (mr->enum_ids[j] != enum_id) |
529 | 529 | |
... | ... | @@ -549,11 +549,11 @@ |
549 | 549 | struct intc_desc_int *d, |
550 | 550 | intc_enum enum_id) |
551 | 551 | { |
552 | - struct intc_sense_reg *sr = desc->sense_regs; | |
552 | + struct intc_sense_reg *sr = desc->hw.sense_regs; | |
553 | 553 | unsigned int i, j, fn, bit; |
554 | 554 | |
555 | - for (i = 0; sr && enum_id && i < desc->nr_sense_regs; i++) { | |
556 | - sr = desc->sense_regs + i; | |
555 | + for (i = 0; sr && enum_id && i < desc->hw.nr_sense_regs; i++) { | |
556 | + sr = desc->hw.sense_regs + i; | |
557 | 557 | |
558 | 558 | for (j = 0; j < ARRAY_SIZE(sr->enum_ids); j++) { |
559 | 559 | if (sr->enum_ids[j] != enum_id) |
... | ... | @@ -656,7 +656,7 @@ |
656 | 656 | /* irq should be disabled by default */ |
657 | 657 | d->chip.mask(irq); |
658 | 658 | |
659 | - if (desc->ack_regs) | |
659 | + if (desc->hw.ack_regs) | |
660 | 660 | ack_handle[irq] = intc_ack_data(desc, d, enum_id); |
661 | 661 | } |
662 | 662 | |
... | ... | @@ -684,6 +684,7 @@ |
684 | 684 | void __init register_intc_controller(struct intc_desc *desc) |
685 | 685 | { |
686 | 686 | unsigned int i, k, smp; |
687 | + struct intc_hw_desc *hw = &desc->hw; | |
687 | 688 | struct intc_desc_int *d; |
688 | 689 | |
689 | 690 | d = kzalloc(sizeof(*d), GFP_NOWAIT); |
... | ... | @@ -691,10 +692,10 @@ |
691 | 692 | INIT_LIST_HEAD(&d->list); |
692 | 693 | list_add(&d->list, &intc_list); |
693 | 694 | |
694 | - d->nr_reg = desc->mask_regs ? desc->nr_mask_regs * 2 : 0; | |
695 | - d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0; | |
696 | - d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0; | |
697 | - d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0; | |
695 | + d->nr_reg = hw->mask_regs ? hw->nr_mask_regs * 2 : 0; | |
696 | + d->nr_reg += hw->prio_regs ? hw->nr_prio_regs * 2 : 0; | |
697 | + d->nr_reg += hw->sense_regs ? hw->nr_sense_regs : 0; | |
698 | + d->nr_reg += hw->ack_regs ? hw->nr_ack_regs : 0; | |
698 | 699 | |
699 | 700 | d->reg = kzalloc(d->nr_reg * sizeof(*d->reg), GFP_NOWAIT); |
700 | 701 | #ifdef CONFIG_SMP |
701 | 702 | |
702 | 703 | |
703 | 704 | |
704 | 705 | |
... | ... | @@ -702,30 +703,31 @@ |
702 | 703 | #endif |
703 | 704 | k = 0; |
704 | 705 | |
705 | - if (desc->mask_regs) { | |
706 | - for (i = 0; i < desc->nr_mask_regs; i++) { | |
707 | - smp = IS_SMP(desc->mask_regs[i]); | |
708 | - k += save_reg(d, k, desc->mask_regs[i].set_reg, smp); | |
709 | - k += save_reg(d, k, desc->mask_regs[i].clr_reg, smp); | |
706 | + if (hw->mask_regs) { | |
707 | + for (i = 0; i < hw->nr_mask_regs; i++) { | |
708 | + smp = IS_SMP(hw->mask_regs[i]); | |
709 | + k += save_reg(d, k, hw->mask_regs[i].set_reg, smp); | |
710 | + k += save_reg(d, k, hw->mask_regs[i].clr_reg, smp); | |
710 | 711 | } |
711 | 712 | } |
712 | 713 | |
713 | - if (desc->prio_regs) { | |
714 | - d->prio = kzalloc(desc->nr_vectors * sizeof(*d->prio), GFP_NOWAIT); | |
714 | + if (hw->prio_regs) { | |
715 | + d->prio = kzalloc(hw->nr_vectors * sizeof(*d->prio), | |
716 | + GFP_NOWAIT); | |
715 | 717 | |
716 | - for (i = 0; i < desc->nr_prio_regs; i++) { | |
717 | - smp = IS_SMP(desc->prio_regs[i]); | |
718 | - k += save_reg(d, k, desc->prio_regs[i].set_reg, smp); | |
719 | - k += save_reg(d, k, desc->prio_regs[i].clr_reg, smp); | |
718 | + for (i = 0; i < hw->nr_prio_regs; i++) { | |
719 | + smp = IS_SMP(hw->prio_regs[i]); | |
720 | + k += save_reg(d, k, hw->prio_regs[i].set_reg, smp); | |
721 | + k += save_reg(d, k, hw->prio_regs[i].clr_reg, smp); | |
720 | 722 | } |
721 | 723 | } |
722 | 724 | |
723 | - if (desc->sense_regs) { | |
724 | - d->sense = kzalloc(desc->nr_vectors * sizeof(*d->sense), GFP_NOWAIT); | |
725 | + if (hw->sense_regs) { | |
726 | + d->sense = kzalloc(hw->nr_vectors * sizeof(*d->sense), | |
727 | + GFP_NOWAIT); | |
725 | 728 | |
726 | - for (i = 0; i < desc->nr_sense_regs; i++) { | |
727 | - k += save_reg(d, k, desc->sense_regs[i].reg, 0); | |
728 | - } | |
729 | + for (i = 0; i < hw->nr_sense_regs; i++) | |
730 | + k += save_reg(d, k, hw->sense_regs[i].reg, 0); | |
729 | 731 | } |
730 | 732 | |
731 | 733 | d->chip.name = desc->name; |
... | ... | @@ -738,9 +740,9 @@ |
738 | 740 | d->chip.set_type = intc_set_sense; |
739 | 741 | d->chip.set_wake = intc_set_wake; |
740 | 742 | |
741 | - if (desc->ack_regs) { | |
742 | - for (i = 0; i < desc->nr_ack_regs; i++) | |
743 | - k += save_reg(d, k, desc->ack_regs[i].set_reg, 0); | |
743 | + if (hw->ack_regs) { | |
744 | + for (i = 0; i < hw->nr_ack_regs; i++) | |
745 | + k += save_reg(d, k, hw->ack_regs[i].set_reg, 0); | |
744 | 746 | |
745 | 747 | d->chip.mask_ack = intc_mask_ack; |
746 | 748 | } |
... | ... | @@ -748,8 +750,8 @@ |
748 | 750 | BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */ |
749 | 751 | |
750 | 752 | /* register the vectors one by one */ |
751 | - for (i = 0; i < desc->nr_vectors; i++) { | |
752 | - struct intc_vect *vect = desc->vectors + i; | |
753 | + for (i = 0; i < hw->nr_vectors; i++) { | |
754 | + struct intc_vect *vect = hw->vectors + i; | |
753 | 755 | unsigned int irq = evt2irq(vect->vect); |
754 | 756 | struct irq_desc *irq_desc; |
755 | 757 | |
... | ... | @@ -764,8 +766,8 @@ |
764 | 766 | |
765 | 767 | intc_register_irq(desc, d, vect->enum_id, irq); |
766 | 768 | |
767 | - for (k = i + 1; k < desc->nr_vectors; k++) { | |
768 | - struct intc_vect *vect2 = desc->vectors + k; | |
769 | + for (k = i + 1; k < hw->nr_vectors; k++) { | |
770 | + struct intc_vect *vect2 = hw->vectors + k; | |
769 | 771 | unsigned int irq2 = evt2irq(vect2->vect); |
770 | 772 | |
771 | 773 | if (vect->enum_id != vect2->enum_id) |
include/linux/sh_intc.h
... | ... | @@ -45,7 +45,7 @@ |
45 | 45 | #define INTC_SMP(stride, nr) |
46 | 46 | #endif |
47 | 47 | |
48 | -struct intc_desc { | |
48 | +struct intc_hw_desc { | |
49 | 49 | struct intc_vect *vectors; |
50 | 50 | unsigned int nr_vectors; |
51 | 51 | struct intc_group *groups; |
52 | 52 | |
53 | 53 | |
54 | 54 | |
... | ... | @@ -56,29 +56,38 @@ |
56 | 56 | unsigned int nr_prio_regs; |
57 | 57 | struct intc_sense_reg *sense_regs; |
58 | 58 | unsigned int nr_sense_regs; |
59 | - char *name; | |
60 | 59 | struct intc_mask_reg *ack_regs; |
61 | 60 | unsigned int nr_ack_regs; |
62 | 61 | }; |
63 | 62 | |
64 | 63 | #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) |
64 | +#define INTC_HW_DESC(vectors, groups, mask_regs, \ | |
65 | + prio_regs, sense_regs, ack_regs) \ | |
66 | +{ \ | |
67 | + _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ | |
68 | + _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ | |
69 | + _INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs), \ | |
70 | +} | |
71 | + | |
72 | +struct intc_desc { | |
73 | + char *name; | |
74 | + struct intc_hw_desc hw; | |
75 | +}; | |
76 | + | |
65 | 77 | #define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \ |
66 | 78 | mask_regs, prio_regs, sense_regs) \ |
67 | 79 | struct intc_desc symbol __initdata = { \ |
68 | - _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ | |
69 | - _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ | |
70 | - _INTC_ARRAY(sense_regs), \ | |
71 | - chipname, \ | |
80 | + .name = chipname, \ | |
81 | + .hw = INTC_HW_DESC(vectors, groups, mask_regs, \ | |
82 | + prio_regs, sense_regs, NULL), \ | |
72 | 83 | } |
73 | 84 | |
74 | 85 | #define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \ |
75 | 86 | mask_regs, prio_regs, sense_regs, ack_regs) \ |
76 | 87 | struct intc_desc symbol __initdata = { \ |
77 | - _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ | |
78 | - _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ | |
79 | - _INTC_ARRAY(sense_regs), \ | |
80 | - chipname, \ | |
81 | - _INTC_ARRAY(ack_regs), \ | |
88 | + .name = chipname, \ | |
89 | + .hw = INTC_HW_DESC(vectors, groups, mask_regs, \ | |
90 | + prio_regs, sense_regs, ack_regs), \ | |
82 | 91 | } |
83 | 92 | |
84 | 93 | void __init register_intc_controller(struct intc_desc *desc); |