Commit 598ec971ddcf7dcb0c381230e69a39c75b7fac1a
1 parent
d6d88bae97
Exists in
smarc-l5.0.0_1.0.0-ga
and in
5 other branches
sparc: Consistently use 'wr' and 'rd' instructions for ASRs.
For consistency, don't use 'mov'. Signed-off-by: David S. Miller <davem@davemloft.net>
Showing 2 changed files with 5 additions and 5 deletions Side-by-side Diff
arch/sparc/include/asm/head_32.h
| ... | ... | @@ -55,15 +55,15 @@ |
| 55 | 55 | |
| 56 | 56 | /* The Get Condition Codes software trap for userland. */ |
| 57 | 57 | #define GETCC_TRAP \ |
| 58 | - b getcc_trap_handler; mov %psr, %l0; nop; nop; | |
| 58 | + b getcc_trap_handler; rd %psr, %l0; nop; nop; | |
| 59 | 59 | |
| 60 | 60 | /* The Set Condition Codes software trap for userland. */ |
| 61 | 61 | #define SETCC_TRAP \ |
| 62 | - b setcc_trap_handler; mov %psr, %l0; nop; nop; | |
| 62 | + b setcc_trap_handler; rd %psr, %l0; nop; nop; | |
| 63 | 63 | |
| 64 | 64 | /* The Get PSR software trap for userland. */ |
| 65 | 65 | #define GETPSR_TRAP \ |
| 66 | - mov %psr, %i0; jmp %l2; rett %l2 + 4; nop; | |
| 66 | + rd %psr, %i0; jmp %l2; rett %l2 + 4; nop; | |
| 67 | 67 | |
| 68 | 68 | /* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and |
| 69 | 69 | * gets handled with another macro. |
arch/sparc/kernel/leon_pmc.c
| ... | ... | @@ -48,7 +48,7 @@ |
| 48 | 48 | */ |
| 49 | 49 | register unsigned int address = (unsigned int)leon3_irqctrl_regs; |
| 50 | 50 | __asm__ __volatile__ ( |
| 51 | - "mov %%g0, %%asr19\n" | |
| 51 | + "wr %%g0, %%asr19\n" | |
| 52 | 52 | "lda [%0] %1, %%g0\n" |
| 53 | 53 | : |
| 54 | 54 | : "r"(address), "i"(ASI_LEON_BYPASS)); |
| ... | ... | @@ -61,7 +61,7 @@ |
| 61 | 61 | void pmc_leon_idle(void) |
| 62 | 62 | { |
| 63 | 63 | /* For systems without power-down, this will be no-op */ |
| 64 | - __asm__ __volatile__ ("mov %g0, %asr19\n\t"); | |
| 64 | + __asm__ __volatile__ ("wr %g0, %asr19\n\t"); | |
| 65 | 65 | } |
| 66 | 66 | |
| 67 | 67 | /* Install LEON Power Down function */ |