Commit 5b97c3f7ae0ad0eea1eb90d649420a1a180f2bdf
Committed by
Ralf Baechle
1 parent
de6d5b555c
Exists in
master
and in
7 other branches
MIPS: uasm: Add BBIT0 and BBIT1 instructions
These are OCTEON specific instructions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1496/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Showing 2 changed files with 25 additions and 1 deletions Side-by-side Diff
arch/mips/include/asm/uasm.h
... | ... | @@ -223,4 +223,8 @@ |
223 | 223 | void uasm_il_bnez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); |
224 | 224 | void uasm_il_bgezl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); |
225 | 225 | void uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); |
226 | +void uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg, | |
227 | + unsigned int bit, int lid); | |
228 | +void uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg, | |
229 | + unsigned int bit, int lid); |
arch/mips/mm/uasm.c
... | ... | @@ -68,7 +68,7 @@ |
68 | 68 | insn_pref, insn_rfe, insn_sc, insn_scd, insn_sd, insn_sll, |
69 | 69 | insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw, insn_tlbp, |
70 | 70 | insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, |
71 | - insn_dins, insn_syscall | |
71 | + insn_dins, insn_syscall, insn_bbit0, insn_bbit1 | |
72 | 72 | }; |
73 | 73 | |
74 | 74 | struct insn { |
... | ... | @@ -143,6 +143,8 @@ |
143 | 143 | { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, |
144 | 144 | { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE }, |
145 | 145 | { insn_syscall, M(spec_op, 0, 0, 0, 0, syscall_op), SCIMM}, |
146 | + { insn_bbit0, M(lwc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM }, | |
147 | + { insn_bbit1, M(swc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM }, | |
146 | 148 | { insn_invalid, 0, 0 } |
147 | 149 | }; |
148 | 150 | |
... | ... | @@ -411,6 +413,8 @@ |
411 | 413 | I_u2u1u3(_xori) |
412 | 414 | I_u2u1msbu3(_dins); |
413 | 415 | I_u1(_syscall); |
416 | +I_u1u2s3(_bbit0); | |
417 | +I_u1u2s3(_bbit1); | |
414 | 418 | |
415 | 419 | /* Handle labels. */ |
416 | 420 | void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid) |
... | ... | @@ -619,5 +623,21 @@ |
619 | 623 | { |
620 | 624 | uasm_r_mips_pc16(r, *p, lid); |
621 | 625 | uasm_i_bgez(p, reg, 0); |
626 | +} | |
627 | + | |
628 | +void __cpuinit | |
629 | +uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg, | |
630 | + unsigned int bit, int lid) | |
631 | +{ | |
632 | + uasm_r_mips_pc16(r, *p, lid); | |
633 | + uasm_i_bbit0(p, reg, bit, 0); | |
634 | +} | |
635 | + | |
636 | +void __cpuinit | |
637 | +uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg, | |
638 | + unsigned int bit, int lid) | |
639 | +{ | |
640 | + uasm_r_mips_pc16(r, *p, lid); | |
641 | + uasm_i_bbit1(p, reg, bit, 0); | |
622 | 642 | } |