Commit 5e46c3aefe60d1398488410a0c39b4cd87738614
1 parent
cbb306962e
Exists in
master
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[MIPS] C99-ify struct resource initialization.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Showing 18 changed files with 395 additions and 150 deletions Side-by-side Diff
- arch/mips/au1000/common/pci.c
- arch/mips/cobalt/setup.c
- arch/mips/ddb5xxx/ddb5476/setup.c
- arch/mips/ite-boards/generic/it8172_setup.c
- arch/mips/jmr3927/rbhma3100/setup.c
- arch/mips/kernel/i8259.c
- arch/mips/mips-boards/malta/malta_setup.c
- arch/mips/pci/ops-it8172.c
- arch/mips/pci/pci-ddb5074.c
- arch/mips/pci/pci-ddb5476.c
- arch/mips/pci/pci-ddb5477.c
- arch/mips/pci/pci-jmr3927.c
- arch/mips/pci/pci-ocelot.c
- arch/mips/pci/pci-yosemite.c
- arch/mips/philips/pnx8550/common/pci.c
- arch/mips/philips/pnx8550/common/setup.c
- arch/mips/sni/setup.c
- arch/mips/tx4938/toshiba_rbtx4938/setup.c
arch/mips/au1000/common/pci.c
... | ... | @@ -40,17 +40,17 @@ |
40 | 40 | |
41 | 41 | /* TBD */ |
42 | 42 | static struct resource pci_io_resource = { |
43 | - "pci IO space", | |
44 | - (u32)PCI_IO_START, | |
45 | - (u32)PCI_IO_END, | |
46 | - IORESOURCE_IO | |
43 | + .start = PCI_IO_START, | |
44 | + .end = PCI_IO_END, | |
45 | + .name = "PCI IO space", | |
46 | + .flags = IORESOURCE_IO | |
47 | 47 | }; |
48 | 48 | |
49 | 49 | static struct resource pci_mem_resource = { |
50 | - "pci memory space", | |
51 | - (u32)PCI_MEM_START, | |
52 | - (u32)PCI_MEM_END, | |
53 | - IORESOURCE_MEM | |
50 | + .start = PCI_MEM_START, | |
51 | + .end = PCI_MEM_END, | |
52 | + .name = "PCI memory space", | |
53 | + .flags = IORESOURCE_MEM | |
54 | 54 | }; |
55 | 55 | |
56 | 56 | extern struct pci_ops au1x_pci_ops; |
arch/mips/cobalt/setup.c
... | ... | @@ -68,19 +68,46 @@ |
68 | 68 | extern struct pci_ops gt64111_pci_ops; |
69 | 69 | |
70 | 70 | static struct resource cobalt_mem_resource = { |
71 | - "PCI memory", GT64111_MEM_BASE, GT64111_MEM_END, IORESOURCE_MEM | |
71 | + .start = GT64111_MEM_BASE, | |
72 | + .end = GT64111_MEM_END, | |
73 | + .name = "PCI memory", | |
74 | + .flags = IORESOURCE_MEM | |
72 | 75 | }; |
73 | 76 | |
74 | 77 | static struct resource cobalt_io_resource = { |
75 | - "PCI I/O", 0x1000, 0xffff, IORESOURCE_IO | |
78 | + .start = 0x1000, | |
79 | + .end = 0xffff, | |
80 | + .name = "PCI I/O", | |
81 | + .flags = IORESOURCE_IO | |
76 | 82 | }; |
77 | 83 | |
78 | 84 | static struct resource cobalt_io_resources[] = { |
79 | - { "dma1", 0x00, 0x1f, IORESOURCE_BUSY }, | |
80 | - { "timer", 0x40, 0x5f, IORESOURCE_BUSY }, | |
81 | - { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY }, | |
82 | - { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY }, | |
83 | - { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY }, | |
85 | + { | |
86 | + .start = 0x00, | |
87 | + .end = 0x1f, | |
88 | + .name = "dma1", | |
89 | + .flags = IORESOURCE_BUSY | |
90 | + }, { | |
91 | + .start = 0x40, | |
92 | + .end = 0x5f, | |
93 | + .name = "timer", | |
94 | + .flags = IORESOURCE_BUSY | |
95 | + }, { | |
96 | + .start = 0x60, | |
97 | + .end = 0x6f, | |
98 | + .name = "keyboard", | |
99 | + .flags = IORESOURCE_BUSY | |
100 | + }, { | |
101 | + .start = 0x80, | |
102 | + .end = 0x8f, | |
103 | + .name = "dma page reg", | |
104 | + .flags = IORESOURCE_BUSY | |
105 | + }, { | |
106 | + .start = 0xc0, | |
107 | + .end = 0xdf, | |
108 | + .name = "dma2", | |
109 | + .flags = IORESOURCE_BUSY | |
110 | + }, | |
84 | 111 | }; |
85 | 112 | |
86 | 113 | #define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource)) |
arch/mips/ddb5xxx/ddb5476/setup.c
... | ... | @@ -109,17 +109,42 @@ |
109 | 109 | struct resource dma2; |
110 | 110 | } ddb5476_ioport = { |
111 | 111 | { |
112 | - "dma1", 0x00, 0x1f, IORESOURCE_BUSY}, { | |
113 | - "timer", 0x40, 0x5f, IORESOURCE_BUSY}, { | |
114 | - "rtc", 0x70, 0x7f, IORESOURCE_BUSY}, { | |
115 | - "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY}, { | |
116 | - "dma2", 0xc0, 0xdf, IORESOURCE_BUSY} | |
112 | + .start = 0x00, | |
113 | + .end = 0x1f, | |
114 | + .name = "dma1", | |
115 | + .flags = IORESOURCE_BUSY | |
116 | + }, { | |
117 | + .start = 0x40, | |
118 | + .end = 0x5f, | |
119 | + .name = "timer", | |
120 | + .flags = IORESOURCE_BUSY | |
121 | + }, { | |
122 | + .start = 0x70, | |
123 | + .end = 0x7f, | |
124 | + .name = "rtc", | |
125 | + .flags = IORESOURCE_BUSY | |
126 | + }, { | |
127 | + .start = 0x80, | |
128 | + .end = 0x8f, | |
129 | + .name = "dma page reg", | |
130 | + .flags = IORESOURCE_BUSY | |
131 | + }, { | |
132 | + .start = 0xc0, | |
133 | + .end = 0xdf, | |
134 | + .name = "dma2", | |
135 | + .flags = IORESOURCE_BUSY | |
136 | + } | |
117 | 137 | }; |
118 | 138 | |
119 | 139 | static struct { |
120 | 140 | struct resource nile4; |
121 | 141 | } ddb5476_iomem = { |
122 | - { "Nile 4", DDB_BASE, DDB_BASE + DDB_SIZE - 1, IORESOURCE_BUSY} | |
142 | + { | |
143 | + .start = DDB_BASE, | |
144 | + .end = DDB_BASE + DDB_SIZE - 1, | |
145 | + .name = "Nile 4", | |
146 | + .flags = IORESOURCE_BUSY | |
147 | + } | |
123 | 148 | }; |
124 | 149 | |
125 | 150 |
arch/mips/ite-boards/generic/it8172_setup.c
... | ... | @@ -72,11 +72,29 @@ |
72 | 72 | struct resource flash; |
73 | 73 | struct resource boot; |
74 | 74 | } it8172_resources = { |
75 | - { "RAM", 0, 0, IORESOURCE_MEM }, /* to be initted */ | |
76 | - { "PCI Mem", 0x10000000, 0x13FFFFFF, IORESOURCE_MEM }, | |
77 | - { "PCI I/O", 0x14000000, 0x17FFFFFF }, | |
78 | - { "Flash", 0x08000000, 0x0CFFFFFF }, | |
79 | - { "Boot ROM", 0x1FC00000, 0x1FFFFFFF } | |
75 | + { | |
76 | + .start = 0, /* to be initted */ | |
77 | + .end = 0, | |
78 | + .name = "RAM", | |
79 | + .flags = IORESOURCE_MEM | |
80 | + }, { | |
81 | + .start = 0x10000000, | |
82 | + .end = 0x13FFFFFF, | |
83 | + .name = "PCI Mem", | |
84 | + .flags = IORESOURCE_MEM | |
85 | + }, { | |
86 | + .start = 0x14000000, | |
87 | + .end = 0x17FFFFFF | |
88 | + .name = "PCI I/O", | |
89 | + }, { | |
90 | + .start = 0x08000000, | |
91 | + .end = 0x0CFFFFFF | |
92 | + .name = "Flash", | |
93 | + }, { | |
94 | + .start = 0x1FC00000, | |
95 | + .end = 0x1FFFFFFF | |
96 | + .name = "Boot ROM", | |
97 | + } | |
80 | 98 | }; |
81 | 99 | #else |
82 | 100 | struct { |
... | ... | @@ -89,14 +107,44 @@ |
89 | 107 | struct resource flash; |
90 | 108 | struct resource boot; |
91 | 109 | } it8172_resources = { |
92 | - { "RAM", 0, 0, IORESOURCE_MEM }, /* to be initted */ | |
93 | - { "PCI Mem0", 0x0C000000, 0x0FFFFFFF, IORESOURCE_MEM }, | |
94 | - { "PCI Mem1", 0x10000000, 0x13FFFFFF, IORESOURCE_MEM }, | |
95 | - { "PCI I/O", 0x14000000, 0x17FFFFFF }, | |
96 | - { "PCI Mem2", 0x1A000000, 0x1BFFFFFF, IORESOURCE_MEM }, | |
97 | - { "PCI Mem3", 0x1C000000, 0x1FBFFFFF, IORESOURCE_MEM }, | |
98 | - { "Flash", 0x08000000, 0x0CFFFFFF }, | |
99 | - { "Boot ROM", 0x1FC00000, 0x1FFFFFFF } | |
110 | + { | |
111 | + .start = 0, /* to be initted */ | |
112 | + .end = 0, | |
113 | + .name = "RAM", | |
114 | + .flags = IORESOURCE_MEM | |
115 | + }, { | |
116 | + .start = 0x0C000000, | |
117 | + .end = 0x0FFFFFFF, | |
118 | + .name = "PCI Mem0", | |
119 | + .flags = IORESOURCE_MEM | |
120 | + }, { | |
121 | + .start = 0x10000000, | |
122 | + .end = 0x13FFFFFF, | |
123 | + .name = "PCI Mem1", | |
124 | + .flags = IORESOURCE_MEM | |
125 | + }, { | |
126 | + .start = 0x14000000, | |
127 | + .end = 0x17FFFFFF | |
128 | + .name = "PCI I/O", | |
129 | + }, { | |
130 | + .start = 0x1A000000, | |
131 | + .end = 0x1BFFFFFF, | |
132 | + .name = "PCI Mem2", | |
133 | + .flags = IORESOURCE_MEM | |
134 | + }, { | |
135 | + .start = 0x1C000000, | |
136 | + .end = 0x1FBFFFFF, | |
137 | + .name = "PCI Mem3", | |
138 | + .flags = IORESOURCE_MEM | |
139 | + }, { | |
140 | + .start = 0x08000000, | |
141 | + .end = 0x0CFFFFFF | |
142 | + .name = "Flash", | |
143 | + }, { | |
144 | + .start = 0x1FC00000, | |
145 | + .end = 0x1FFFFFFF | |
146 | + .name = "Boot ROM", | |
147 | + } | |
100 | 148 | }; |
101 | 149 | #endif |
102 | 150 |
arch/mips/jmr3927/rbhma3100/setup.c
... | ... | @@ -82,17 +82,54 @@ |
82 | 82 | struct resource sio0; |
83 | 83 | struct resource sio1; |
84 | 84 | } jmr3927_resources = { |
85 | - { "RAM0", 0, 0x01FFFFFF, IORESOURCE_MEM }, | |
86 | - { "RAM1", 0x02000000, 0x03FFFFFF, IORESOURCE_MEM }, | |
87 | - { "PCIMEM", 0x08000000, 0x07FFFFFF, IORESOURCE_MEM }, | |
88 | - { "IOB", 0x10000000, 0x13FFFFFF }, | |
89 | - { "IOC", 0x14000000, 0x14FFFFFF }, | |
90 | - { "PCIIO", 0x15000000, 0x15FFFFFF }, | |
91 | - { "JMY1394", 0x1D000000, 0x1D3FFFFF }, | |
92 | - { "ROM1", 0x1E000000, 0x1E3FFFFF }, | |
93 | - { "ROM0", 0x1FC00000, 0x1FFFFFFF }, | |
94 | - { "SIO0", 0xFFFEF300, 0xFFFEF3FF }, | |
95 | - { "SIO1", 0xFFFEF400, 0xFFFEF4FF }, | |
85 | + { | |
86 | + .start = 0, | |
87 | + .end = 0x01FFFFFF, | |
88 | + .name = "RAM0", | |
89 | + .flags = IORESOURCE_MEM | |
90 | + }, { | |
91 | + .start = 0x02000000, | |
92 | + .end = 0x03FFFFFF, | |
93 | + .name = "RAM1", | |
94 | + .flags = IORESOURCE_MEM | |
95 | + }, { | |
96 | + .start = 0x08000000, | |
97 | + .end = 0x07FFFFFF, | |
98 | + .name = "PCIMEM", | |
99 | + .flags = IORESOURCE_MEM | |
100 | + }, { | |
101 | + .start = 0x10000000, | |
102 | + .end = 0x13FFFFFF, | |
103 | + .name = "IOB" | |
104 | + }, { | |
105 | + .start = 0x14000000, | |
106 | + .end = 0x14FFFFFF, | |
107 | + .name = "IOC" | |
108 | + }, { | |
109 | + .start = 0x15000000, | |
110 | + .end = 0x15FFFFFF, | |
111 | + .name = "PCIIO" | |
112 | + }, { | |
113 | + .start = 0x1D000000, | |
114 | + .end = 0x1D3FFFFF, | |
115 | + .name = "JMY1394" | |
116 | + }, { | |
117 | + .start = 0x1E000000, | |
118 | + .end = 0x1E3FFFFF, | |
119 | + .name = "ROM1" | |
120 | + }, { | |
121 | + .start = 0x1FC00000, | |
122 | + .end = 0x1FFFFFFF, | |
123 | + .name = "ROM0" | |
124 | + }, { | |
125 | + .start = 0xFFFEF300, | |
126 | + .end = 0xFFFEF3FF, | |
127 | + .name = "SIO0" | |
128 | + }, { | |
129 | + .start = 0xFFFEF400, | |
130 | + .end = 0xFFFEF4FF, | |
131 | + .name = "SIO1" | |
132 | + }, | |
96 | 133 | }; |
97 | 134 | |
98 | 135 | /* don't enable - see errata */ |
arch/mips/kernel/i8259.c
... | ... | @@ -302,11 +302,11 @@ |
302 | 302 | }; |
303 | 303 | |
304 | 304 | static struct resource pic1_io_resource = { |
305 | - "pic1", 0x20, 0x3f, IORESOURCE_BUSY | |
305 | + .name = "pic1", .start = 0x20, .end = 0x3f, .flags = IORESOURCE_BUSY | |
306 | 306 | }; |
307 | 307 | |
308 | 308 | static struct resource pic2_io_resource = { |
309 | - "pic2", 0xa0, 0xbf, IORESOURCE_BUSY | |
309 | + .name = "pic2", .start = 0xa0, .end = 0xbf, .flags = IORESOURCE_BUSY | |
310 | 310 | }; |
311 | 311 | |
312 | 312 | /* |
arch/mips/mips-boards/malta/malta_setup.c
... | ... | @@ -53,11 +53,11 @@ |
53 | 53 | #endif |
54 | 54 | |
55 | 55 | struct resource standard_io_resources[] = { |
56 | - { "dma1", 0x00, 0x1f, IORESOURCE_BUSY }, | |
57 | - { "timer", 0x40, 0x5f, IORESOURCE_BUSY }, | |
58 | - { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY }, | |
59 | - { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY }, | |
60 | - { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY }, | |
56 | + { .name = "dma1", .start = 0x00, .end = 0x1f, .flags = IORESOURCE_BUSY }, | |
57 | + { .name = "timer", .start = 0x40, .end = 0x5f, .flags = IORESOURCE_BUSY }, | |
58 | + { .name = "keyboard", .start = 0x60, .end = 0x6f, .flags = IORESOURCE_BUSY }, | |
59 | + { .name = "dma page reg", .start = 0x80, .end = 0x8f, .flags = IORESOURCE_BUSY }, | |
60 | + { .name = "dma2", .start = 0xc0, .end = 0xdf, .flags = IORESOURCE_BUSY }, | |
61 | 61 | }; |
62 | 62 | |
63 | 63 | #ifdef CONFIG_MTD |
arch/mips/pci/ops-it8172.c
... | ... | @@ -50,30 +50,28 @@ |
50 | 50 | static struct resource pci_mem_resource_1; |
51 | 51 | |
52 | 52 | static struct resource pci_io_resource = { |
53 | - "io pci IO space", | |
54 | - 0x14018000, | |
55 | - 0x17FFFFFF, | |
56 | - IORESOURCE_IO | |
53 | + .start = 0x14018000, | |
54 | + .end = 0x17FFFFFF, | |
55 | + .name = "io pci IO space", | |
56 | + .flags = IORESOURCE_IO | |
57 | 57 | }; |
58 | 58 | |
59 | 59 | static struct resource pci_mem_resource_0 = { |
60 | - "ext pci memory space 0/1", | |
61 | - 0x10101000, | |
62 | - 0x13FFFFFF, | |
63 | - IORESOURCE_MEM, | |
64 | - &pci_mem_resource_0, | |
65 | - NULL, | |
66 | - &pci_mem_resource_1 | |
60 | + .start = 0x10101000, | |
61 | + .end = 0x13FFFFFF, | |
62 | + .name = "ext pci memory space 0/1", | |
63 | + .flags = IORESOURCE_MEM, | |
64 | + .parent = &pci_mem_resource_0, | |
65 | + .sibling = NULL, | |
66 | + .child = &pci_mem_resource_1 | |
67 | 67 | }; |
68 | 68 | |
69 | 69 | static struct resource pci_mem_resource_1 = { |
70 | - "ext pci memory space 2/3", | |
71 | - 0x1A000000, | |
72 | - 0x1FBFFFFF, | |
73 | - IORESOURCE_MEM, | |
74 | - &pci_mem_resource_0, | |
75 | - NULL, | |
76 | - NULL | |
70 | + .start = 0x1A000000, | |
71 | + .end = 0x1FBFFFFF, | |
72 | + .name = "ext pci memory space 2/3", | |
73 | + .flags = IORESOURCE_MEM, | |
74 | + .parent = &pci_mem_resource_0 | |
77 | 75 | }; |
78 | 76 | |
79 | 77 | extern struct pci_ops it8172_pci_ops; |
arch/mips/pci/pci-ddb5074.c
... | ... | @@ -8,17 +8,17 @@ |
8 | 8 | #include <asm/ddb5xxx/ddb5xxx.h> |
9 | 9 | |
10 | 10 | static struct resource extpci_io_resource = { |
11 | - "pci IO space", | |
12 | - 0x1000, /* leave some room for ISA bus */ | |
13 | - DDB_PCI_IO_SIZE - 1, | |
14 | - IORESOURCE_IO | |
11 | + .start = 0x1000, /* leave some room for ISA bus */ | |
12 | + .end = DDB_PCI_IO_SIZE - 1, | |
13 | + .name = "pci IO space", | |
14 | + .flags = IORESOURCE_IO | |
15 | 15 | }; |
16 | 16 | |
17 | 17 | static struct resource extpci_mem_resource = { |
18 | - "pci memory space", | |
19 | - DDB_PCI_MEM_BASE + 0x00100000, /* leave 1 MB for RTC */ | |
20 | - DDB_PCI_MEM_BASE + DDB_PCI_MEM_SIZE - 1, | |
21 | - IORESOURCE_MEM | |
18 | + .start = DDB_PCI_MEM_BASE + 0x00100000, /* leave 1 MB for RTC */ | |
19 | + .end = DDB_PCI_MEM_BASE + DDB_PCI_MEM_SIZE - 1, | |
20 | + .name = "pci memory space", | |
21 | + .flags = IORESOURCE_MEM | |
22 | 22 | }; |
23 | 23 | |
24 | 24 | extern struct pci_ops ddb5476_ext_pci_ops; |
arch/mips/pci/pci-ddb5476.c
... | ... | @@ -8,17 +8,17 @@ |
8 | 8 | #include <asm/ddb5xxx/ddb5xxx.h> |
9 | 9 | |
10 | 10 | static struct resource extpci_io_resource = { |
11 | - "pci IO space", | |
12 | - 0x1000, /* leave some room for ISA bus */ | |
13 | - DDB_PCI_IO_SIZE - 1, | |
14 | - IORESOURCE_IO | |
11 | + .start = 0x1000, /* leave some room for ISA bus */ | |
12 | + .end = DDB_PCI_IO_SIZE - 1, | |
13 | + .name = "pci IO space", | |
14 | + .flags = IORESOURCE_IO | |
15 | 15 | }; |
16 | 16 | |
17 | 17 | static struct resource extpci_mem_resource = { |
18 | - "pci memory space", | |
19 | - DDB_PCI_MEM_BASE + 0x00100000, /* leave 1 MB for RTC */ | |
20 | - DDB_PCI_MEM_BASE + DDB_PCI_MEM_SIZE - 1, | |
21 | - IORESOURCE_MEM | |
18 | + .start = DDB_PCI_MEM_BASE + 0x00100000, /* leave 1 MB for RTC */ | |
19 | + .end = DDB_PCI_MEM_BASE + DDB_PCI_MEM_SIZE - 1, | |
20 | + .name = "pci memory space", | |
21 | + .flags = IORESOURCE_MEM | |
22 | 22 | }; |
23 | 23 | |
24 | 24 | extern struct pci_ops ddb5476_ext_pci_ops; |
arch/mips/pci/pci-ddb5477.c
... | ... | @@ -22,31 +22,31 @@ |
22 | 22 | #include <asm/ddb5xxx/ddb5xxx.h> |
23 | 23 | |
24 | 24 | static struct resource extpci_io_resource = { |
25 | - "ext pci IO space", | |
26 | - DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + 0x4000, | |
27 | - DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI0_IO_SIZE - 1, | |
28 | - IORESOURCE_IO | |
25 | + .start = DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + 0x4000, | |
26 | + .end = DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI0_IO_SIZE - 1, | |
27 | + .name = "ext pci IO space", | |
28 | + .flags = IORESOURCE_IO | |
29 | 29 | }; |
30 | 30 | |
31 | 31 | static struct resource extpci_mem_resource = { |
32 | - "ext pci memory space", | |
33 | - DDB_PCI0_MEM_BASE + 0x100000, | |
34 | - DDB_PCI0_MEM_BASE + DDB_PCI0_MEM_SIZE - 1, | |
35 | - IORESOURCE_MEM | |
32 | + .start = DDB_PCI0_MEM_BASE + 0x100000, | |
33 | + .end = DDB_PCI0_MEM_BASE + DDB_PCI0_MEM_SIZE - 1, | |
34 | + .name = "ext pci memory space", | |
35 | + .flags = IORESOURCE_MEM | |
36 | 36 | }; |
37 | 37 | |
38 | 38 | static struct resource iopci_io_resource = { |
39 | - "io pci IO space", | |
40 | - DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE, | |
41 | - DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI1_IO_SIZE - 1, | |
42 | - IORESOURCE_IO | |
39 | + .start = DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE, | |
40 | + .end = DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI1_IO_SIZE - 1, | |
41 | + .name = "io pci IO space", | |
42 | + .flags = IORESOURCE_IO | |
43 | 43 | }; |
44 | 44 | |
45 | 45 | static struct resource iopci_mem_resource = { |
46 | - "ext pci memory space", | |
47 | - DDB_PCI1_MEM_BASE, | |
48 | - DDB_PCI1_MEM_BASE + DDB_PCI1_MEM_SIZE - 1, | |
49 | - IORESOURCE_MEM | |
46 | + .start = DDB_PCI1_MEM_BASE, | |
47 | + .end = DDB_PCI1_MEM_BASE + DDB_PCI1_MEM_SIZE - 1, | |
48 | + .name = "ext pci memory space", | |
49 | + .flags = IORESOURCE_MEM | |
50 | 50 | }; |
51 | 51 | |
52 | 52 | extern struct pci_ops ddb5477_ext_pci_ops; |
arch/mips/pci/pci-jmr3927.c
... | ... | @@ -35,17 +35,17 @@ |
35 | 35 | #include <asm/debug.h> |
36 | 36 | |
37 | 37 | struct resource pci_io_resource = { |
38 | - "IO MEM", | |
39 | - 0x1000, /* reserve regacy I/O space */ | |
40 | - 0x1000 + JMR3927_PCIIO_SIZE - 1, | |
41 | - IORESOURCE_IO | |
38 | + .name = "IO MEM", | |
39 | + .start = 0x1000, /* reserve regacy I/O space */ | |
40 | + .end = 0x1000 + JMR3927_PCIIO_SIZE - 1, | |
41 | + .flags = IORESOURCE_IO | |
42 | 42 | }; |
43 | 43 | |
44 | 44 | struct resource pci_mem_resource = { |
45 | - "PCI MEM", | |
46 | - JMR3927_PCIMEM, | |
47 | - JMR3927_PCIMEM + JMR3927_PCIMEM_SIZE - 1, | |
48 | - IORESOURCE_MEM | |
45 | + .name = "PCI MEM", | |
46 | + .start = JMR3927_PCIMEM, | |
47 | + .end = JMR3927_PCIMEM + JMR3927_PCIMEM_SIZE - 1, | |
48 | + .flags = IORESOURCE_MEM | |
49 | 49 | }; |
50 | 50 | |
51 | 51 | extern struct pci_ops jmr3927_pci_ops; |
arch/mips/pci/pci-ocelot.c
... | ... | @@ -71,13 +71,13 @@ |
71 | 71 | } |
72 | 72 | |
73 | 73 | static struct resource ocelot_mem_resource = { |
74 | - iomem_resource.start = GT_PCI_MEM_BASE; | |
75 | - iomem_resource.end = GT_PCI_MEM_BASE + GT_PCI_MEM_BASE - 1; | |
74 | + start = GT_PCI_MEM_BASE; | |
75 | + end = GT_PCI_MEM_BASE + GT_PCI_MEM_BASE - 1; | |
76 | 76 | }; |
77 | 77 | |
78 | 78 | static struct resource ocelot_io_resource = { |
79 | - ioport_resource.start = GT_PCI_IO_BASE; | |
80 | - ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1; | |
79 | + start = GT_PCI_IO_BASE; | |
80 | + end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1; | |
81 | 81 | }; |
82 | 82 | |
83 | 83 | static struct pci_controller ocelot_pci_controller = { |
arch/mips/pci/pci-yosemite.c
... | ... | @@ -14,7 +14,10 @@ |
14 | 14 | extern struct pci_ops titan_pci_ops; |
15 | 15 | |
16 | 16 | static struct resource py_mem_resource = { |
17 | - "Titan PCI MEM", 0xe0000000UL, 0xe3ffffffUL, IORESOURCE_MEM | |
17 | + .start = 0xe0000000UL, | |
18 | + .end = 0xe3ffffffUL, | |
19 | + .name = "Titan PCI MEM", | |
20 | + .flags = IORESOURCE_MEM | |
18 | 21 | }; |
19 | 22 | |
20 | 23 | /* |
... | ... | @@ -26,7 +29,10 @@ |
26 | 29 | #define TITAN_IO_BASE 0xe8000000UL |
27 | 30 | |
28 | 31 | static struct resource py_io_resource = { |
29 | - "Titan IO MEM", 0x00001000UL, TITAN_IO_SIZE - 1, IORESOURCE_IO, | |
32 | + .start = 0x00001000UL, | |
33 | + .end = TITAN_IO_SIZE - 1, | |
34 | + .name = "Titan IO MEM", | |
35 | + .flags = IORESOURCE_IO, | |
30 | 36 | }; |
31 | 37 | |
32 | 38 | static struct pci_controller py_controller = { |
arch/mips/philips/pnx8550/common/pci.c
... | ... | @@ -27,17 +27,17 @@ |
27 | 27 | #include <nand.h> |
28 | 28 | |
29 | 29 | static struct resource pci_io_resource = { |
30 | - "pci IO space", | |
31 | - (u32)(PNX8550_PCIIO + 0x1000), /* reserve regacy I/O space */ | |
32 | - (u32)(PNX8550_PCIIO + PNX8550_PCIIO_SIZE), | |
33 | - IORESOURCE_IO | |
30 | + .start = PNX8550_PCIIO + 0x1000, /* reserve regacy I/O space */ | |
31 | + .end = PNX8550_PCIIO + PNX8550_PCIIO_SIZE, | |
32 | + .name = "pci IO space", | |
33 | + .flags = IORESOURCE_IO | |
34 | 34 | }; |
35 | 35 | |
36 | 36 | static struct resource pci_mem_resource = { |
37 | - "pci memory space", | |
38 | - (u32)(PNX8550_PCIMEM), | |
39 | - (u32)(PNX8550_PCIMEM + PNX8550_PCIMEM_SIZE - 1), | |
40 | - IORESOURCE_MEM | |
37 | + .start = PNX8550_PCIMEM, | |
38 | + .end = PNX8550_PCIMEM + PNX8550_PCIMEM_SIZE - 1, | |
39 | + .name = "pci memory space", | |
40 | + .flags = IORESOURCE_MEM | |
41 | 41 | }; |
42 | 42 | |
43 | 43 | extern struct pci_ops pnx8550_pci_ops; |
arch/mips/philips/pnx8550/common/setup.c
... | ... | @@ -58,10 +58,27 @@ |
58 | 58 | extern char *prom_getcmdline(void); |
59 | 59 | |
60 | 60 | struct resource standard_io_resources[] = { |
61 | - {"dma1", 0x00, 0x1f, IORESOURCE_BUSY}, | |
62 | - {"timer", 0x40, 0x5f, IORESOURCE_BUSY}, | |
63 | - {"dma page reg", 0x80, 0x8f, IORESOURCE_BUSY}, | |
64 | - {"dma2", 0xc0, 0xdf, IORESOURCE_BUSY}, | |
61 | + { | |
62 | + .start = .0x00, | |
63 | + .end = 0x1f, | |
64 | + .name = "dma1", | |
65 | + .flags = IORESOURCE_BUSY | |
66 | + }, { | |
67 | + .start = 0x40, | |
68 | + .end = 0x5f, | |
69 | + .name = "timer", | |
70 | + .flags = IORESOURCE_BUSY | |
71 | + }, { | |
72 | + .start = 0x80, | |
73 | + .end = 0x8f, | |
74 | + .name = "dma page reg", | |
75 | + .flags = IORESOURCE_BUSY | |
76 | + }, { | |
77 | + .start = 0xc0, | |
78 | + .end = 0xdf, | |
79 | + .name = "dma2", | |
80 | + .flags = IORESOURCE_BUSY | |
81 | + }, | |
65 | 82 | }; |
66 | 83 | |
67 | 84 | #define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource)) |
arch/mips/sni/setup.c
... | ... | @@ -92,20 +92,51 @@ |
92 | 92 | } |
93 | 93 | |
94 | 94 | static struct resource sni_io_resource = { |
95 | - "PCIMT IO MEM", 0x00001000UL, 0x03bfffffUL, IORESOURCE_IO, | |
95 | + .start = 0x00001000UL, | |
96 | + .end = 0x03bfffffUL, | |
97 | + .name = "PCIMT IO MEM", | |
98 | + .flags = IORESOURCE_IO, | |
96 | 99 | }; |
97 | 100 | |
98 | 101 | static struct resource pcimt_io_resources[] = { |
99 | - { "dma1", 0x00, 0x1f, IORESOURCE_BUSY }, | |
100 | - { "timer", 0x40, 0x5f, IORESOURCE_BUSY }, | |
101 | - { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY }, | |
102 | - { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY }, | |
103 | - { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY }, | |
104 | - { "PCI config data", 0xcfc, 0xcff, IORESOURCE_BUSY } | |
102 | + { | |
103 | + .start = 0x00, | |
104 | + .end = 0x1f, | |
105 | + .name = "dma1", | |
106 | + .flags = IORESOURCE_BUSY | |
107 | + }, { | |
108 | + .start = 0x40, | |
109 | + .end = 0x5f, | |
110 | + .name = "timer", | |
111 | + .flags = IORESOURCE_BUSY | |
112 | + }, { | |
113 | + .start = 0x60, | |
114 | + .end = 0x6f, | |
115 | + .name = "keyboard", | |
116 | + .flags = IORESOURCE_BUSY | |
117 | + }, { | |
118 | + .start = 0x80, | |
119 | + .end = 0x8f, | |
120 | + .name = "dma page reg", | |
121 | + .flags = IORESOURCE_BUSY | |
122 | + }, { | |
123 | + .start = 0xc0, | |
124 | + .end = 0xdf, | |
125 | + .name = "dma2", | |
126 | + .flags = IORESOURCE_BUSY | |
127 | + }, { | |
128 | + .start = 0xcfc, | |
129 | + .end = 0xcff, | |
130 | + .name = "PCI config data", | |
131 | + .flags = IORESOURCE_BUSY | |
132 | + } | |
105 | 133 | }; |
106 | 134 | |
107 | 135 | static struct resource sni_mem_resource = { |
108 | - "PCIMT PCI MEM", 0x10000000UL, 0xffffffffUL, IORESOURCE_MEM | |
136 | + .start = 0x10000000UL, | |
137 | + .end = 0xffffffffUL, | |
138 | + .name = "PCIMT PCI MEM", | |
139 | + .flags = IORESOURCE_MEM | |
109 | 140 | }; |
110 | 141 | |
111 | 142 | /* |
... | ... | @@ -122,19 +153,72 @@ |
122 | 153 | * 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory |
123 | 154 | */ |
124 | 155 | static struct resource pcimt_mem_resources[] = { |
125 | - { "Video RAM area", 0x100a0000, 0x100bffff, IORESOURCE_BUSY }, | |
126 | - { "ISA Reserved", 0x100c0000, 0x100fffff, IORESOURCE_BUSY }, | |
127 | - { "PCI IO", 0x14000000, 0x17bfffff, IORESOURCE_BUSY }, | |
128 | - { "Cache Replacement Area", 0x17c00000, 0x17ffffff, IORESOURCE_BUSY}, | |
129 | - { "PCI INT Acknowledge", 0x1a000000, 0x1a000003, IORESOURCE_BUSY }, | |
130 | - { "Boot PROM", 0x1fc00000, 0x1fc7ffff, IORESOURCE_BUSY}, | |
131 | - { "Diag PROM", 0x1fc80000, 0x1fcfffff, IORESOURCE_BUSY}, | |
132 | - { "X-Bus", 0x1fd00000, 0x1fdfffff, IORESOURCE_BUSY}, | |
133 | - { "BIOS map", 0x1fe00000, 0x1fefffff, IORESOURCE_BUSY}, | |
134 | - { "NVRAM / EEPROM", 0x1ff00000, 0x1ff7ffff, IORESOURCE_BUSY}, | |
135 | - { "ASIC PCI", 0x1fff0000, 0x1fffefff, IORESOURCE_BUSY}, | |
136 | - { "MP Agent", 0x1ffff000, 0x1fffffff, IORESOURCE_BUSY}, | |
137 | - { "Main Memory", 0x20000000, 0x9fffffff, IORESOURCE_BUSY} | |
156 | + { | |
157 | + .start = 0x100a0000, | |
158 | + .end = 0x100bffff, | |
159 | + .name = "Video RAM area", | |
160 | + .flags = IORESOURCE_BUSY | |
161 | + }, { | |
162 | + .start = 0x100c0000, | |
163 | + .end = 0x100fffff, | |
164 | + .name = "ISA Reserved", | |
165 | + .flags = IORESOURCE_BUSY | |
166 | + }, { | |
167 | + .start = 0x14000000, | |
168 | + .end = 0x17bfffff, | |
169 | + .name = "PCI IO", | |
170 | + .flags = IORESOURCE_BUSY | |
171 | + }, { | |
172 | + .start = 0x17c00000, | |
173 | + .end = 0x17ffffff, | |
174 | + .name = "Cache Replacement Area", | |
175 | + .flags = IORESOURCE_BUSY | |
176 | + }, { | |
177 | + .start = 0x1a000000, | |
178 | + .end = 0x1a000003, | |
179 | + .name = "PCI INT Acknowledge", | |
180 | + .flags = IORESOURCE_BUSY | |
181 | + }, { | |
182 | + .start = 0x1fc00000, | |
183 | + .end = 0x1fc7ffff, | |
184 | + .name = "Boot PROM", | |
185 | + .flags = IORESOURCE_BUSY | |
186 | + }, { | |
187 | + .start = 0x1fc80000, | |
188 | + .end = 0x1fcfffff, | |
189 | + .name = "Diag PROM", | |
190 | + .flags = IORESOURCE_BUSY | |
191 | + }, { | |
192 | + .start = 0x1fd00000, | |
193 | + .end = 0x1fdfffff, | |
194 | + .name = "X-Bus", | |
195 | + .flags = IORESOURCE_BUSY | |
196 | + }, { | |
197 | + .start = 0x1fe00000, | |
198 | + .end = 0x1fefffff, | |
199 | + .name = "BIOS map", | |
200 | + .flags = IORESOURCE_BUSY | |
201 | + }, { | |
202 | + .start = 0x1ff00000, | |
203 | + .end = 0x1ff7ffff, | |
204 | + .name = "NVRAM / EEPROM", | |
205 | + .flags = IORESOURCE_BUSY | |
206 | + }, { | |
207 | + .start = 0x1fff0000, | |
208 | + .end = 0x1fffefff, | |
209 | + .name = "ASIC PCI", | |
210 | + .flags = IORESOURCE_BUSY | |
211 | + }, { | |
212 | + .start = 0x1ffff000, | |
213 | + .end = 0x1fffffff, | |
214 | + .name = "MP Agent", | |
215 | + .flags = IORESOURCE_BUSY | |
216 | + }, { | |
217 | + .start = 0x20000000, | |
218 | + .end = 0x9fffffff, | |
219 | + .name = "Main Memory", | |
220 | + .flags = IORESOURCE_BUSY | |
221 | + } | |
138 | 222 | }; |
139 | 223 | |
140 | 224 | static void __init sni_resource_init(void) |
arch/mips/tx4938/toshiba_rbtx4938/setup.c
... | ... | @@ -664,7 +664,10 @@ |
664 | 664 | |
665 | 665 | static char pcode_str[8]; |
666 | 666 | static struct resource tx4938_reg_resource = { |
667 | - pcode_str, TX4938_REG_BASE, TX4938_REG_BASE+TX4938_REG_SIZE, IORESOURCE_MEM | |
667 | + .start = TX4938_REG_BASE, | |
668 | + .end = TX4938_REG_BASE + TX4938_REG_SIZE, | |
669 | + .name = pcode_str, | |
670 | + .flags = IORESOURCE_MEM | |
668 | 671 | }; |
669 | 672 | |
670 | 673 | void __init tx4938_board_setup(void) |