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Commit 5f007db68cc01e068f3e12b30151f3b68418cd79

Authored by Linus Walleij
2 parents b4d4b1f087 c12a819e3a
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

Merge branch 'at91' into devel

Showing 32 changed files Side-by-side Diff

Documentation/devicetree/bindings/arm/atmel-at91.txt
Diff comments   View file @ 5f007db
... ... @@ -7,6 +7,12 @@
7 7 - interrupts: Should contain interrupt for the PIT which is the IRQ line
8 8 shared across all System Controller members.
9 9  
  10 +System Timer (ST) required properties:
  11 +- compatible: Should be "atmel,at91rm9200-st"
  12 +- reg: Should contain registers location and length
  13 +- interrupts: Should contain interrupt for the ST which is the IRQ line
  14 + shared across all System Controller members.
  15 +
10 16 TC/TCLIB Timer required properties:
11 17 - compatible: Should be "atmel,<chip>-tcb".
12 18 <chip> can be "at91rm9200" or "at91sam9x5"
Documentation/devicetree/bindings/pinctrl/atmel,at91-pinctrl.txt
Diff comments   View file @ 5f007db
... ... @@ -84,8 +84,13 @@
84 84 The PERIPH 0 means gpio.
85 85  
86 86 Bits used for CONFIG:
87   -PULL_UP(1 << 0): indicate this pin need a pull up.
88   -MULTIDRIVE(1 << 1): indicate this pin need to be configured as multidrive.
  87 +PULL_UP (1 << 0): indicate this pin need a pull up.
  88 +MULTIDRIVE (1 << 1): indicate this pin need to be configured as multidrive.
  89 +DEGLITCH (1 << 2): indicate this pin need deglitch.
  90 +PULL_DOWN (1 << 3): indicate this pin need a pull down.
  91 +DIS_SCHMIT (1 << 4): indicate this pin need to disable schmit trigger.
  92 +DEBOUNCE (1 << 16): indicate this pin need debounce.
  93 +DEBOUNCE_VAL (0x3fff << 17): debounce val.
89 94  
90 95 NOTE:
91 96 Some requirements for using atmel,at91rm9200-pinctrl binding:
arch/arm/boot/dts/Makefile
Diff comments   View file @ 5f007db
1 1 ifeq ($(CONFIG_OF),y)
2 2  
3 3 # Keep at91 dtb files sorted alphabetically for each SoC
  4 +# rm9200
  5 +dtb-$(CONFIG_ARCH_AT91) += at91rm9200ek.dtb
4 6 # sam9260
  7 +dtb-$(CONFIG_ARCH_AT91) += animeo_ip.dtb
5 8 dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb
6 9 dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb
7 10 dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb
... ... @@ -19,6 +22,7 @@
19 22 dtb-$(CONFIG_ARCH_AT91) += usb_a9g20.dtb
20 23 # sam9g45
21 24 dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb
  25 +dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb
22 26 # sam9n12
23 27 dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
24 28 # sam9x5
arch/arm/boot/dts/animeo_ip.dts
Diff comments   View file @ 5f007db
  1 +/*
  2 + * animeo_ip.dts - Device Tree file for Somfy Animeo IP Boards
  3 + *
  4 + * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  5 + *
  6 + * Licensed under GPLv2 only.
  7 + */
  8 +
  9 +/dts-v1/;
  10 +/include/ "at91sam9260.dtsi"
  11 +
  12 +/ {
  13 + model = "Somfy Animeo IP";
  14 + compatible = "somfy,animeo-ip", "atmel,at91sam9260", "atmel,at91sam9";
  15 +
  16 + aliases {
  17 + serial0 = &usart1;
  18 + serial1 = &usart2;
  19 + serial2 = &usart0;
  20 + serial3 = &dbgu;
  21 + serial4 = &usart3;
  22 + serial5 = &uart0;
  23 + serial6 = &uart1;
  24 + };
  25 +
  26 + chosen {
  27 + linux,stdout-path = &usart2;
  28 + };
  29 +
  30 + memory {
  31 + reg = <0x20000000 0x4000000>;
  32 + };
  33 +
  34 + clocks {
  35 + #address-cells = <1>;
  36 + #size-cells = <1>;
  37 + ranges;
  38 +
  39 + main_clock: clock@0 {
  40 + compatible = "atmel,osc", "fixed-clock";
  41 + clock-frequency = <18432000>;
  42 + };
  43 + };
  44 +
  45 + ahb {
  46 + apb {
  47 + usart0: serial@fffb0000 {
  48 + pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts>;
  49 + linux,rs485-enabled-at-boot-time;
  50 + status = "okay";
  51 + };
  52 +
  53 + usart1: serial@fffb4000 {
  54 + pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts>;
  55 + linux,rs485-enabled-at-boot-time;
  56 + status = "okay";
  57 + };
  58 +
  59 + usart2: serial@fffb8000 {
  60 + pinctrl-0 = <&pinctrl_usart2>;
  61 + status = "okay";
  62 + };
  63 +
  64 + macb0: ethernet@fffc4000 {
  65 + pinctrl-0 = <&pinctrl_macb_rmii &pinctrl_macb_rmii_mii>;
  66 + phy-mode = "mii";
  67 + status = "okay";
  68 + };
  69 +
  70 + mmc0: mmc@fffa8000 {
  71 + pinctrl-0 = <&pinctrl_mmc0_clk
  72 + &pinctrl_mmc0_slot1_cmd_dat0
  73 + &pinctrl_mmc0_slot1_dat1_3>;
  74 + status = "okay";
  75 +
  76 + slot@1 {
  77 + reg = <1>;
  78 + bus-width = <4>;
  79 + };
  80 + };
  81 + };
  82 +
  83 + nand0: nand@40000000 {
  84 + nand-bus-width = <8>;
  85 + nand-ecc-mode = "soft";
  86 + nand-on-flash-bbt;
  87 + status = "okay";
  88 +
  89 + at91bootstrap@0 {
  90 + label = "at91bootstrap";
  91 + reg = <0x0 0x8000>;
  92 + };
  93 +
  94 + barebox@8000 {
  95 + label = "barebox";
  96 + reg = <0x8000 0x40000>;
  97 + };
  98 +
  99 + bareboxenv@48000 {
  100 + label = "bareboxenv";
  101 + reg = <0x48000 0x8000>;
  102 + };
  103 +
  104 + user_block@0x50000 {
  105 + label = "user_block";
  106 + reg = <0x50000 0xb0000>;
  107 + };
  108 +
  109 + kernel@100000 {
  110 + label = "kernel";
  111 + reg = <0x100000 0x1b0000>;
  112 + };
  113 +
  114 + root@2b0000 {
  115 + label = "root";
  116 + reg = <0x2b0000 0x1D50000>;
  117 + };
  118 + };
  119 +
  120 + usb0: ohci@00500000 {
  121 + num-ports = <2>;
  122 + atmel,vbus-gpio = <&pioB 15 1>;
  123 + status = "okay";
  124 + };
  125 + };
  126 +
  127 + leds {
  128 + compatible = "gpio-leds";
  129 +
  130 + power_green {
  131 + label = "power_green";
  132 + gpios = <&pioC 17 0>;
  133 + linux,default-trigger = "heartbeat";
  134 + };
  135 +
  136 + power_red {
  137 + label = "power_red";
  138 + gpios = <&pioA 2 0>;
  139 + };
  140 +
  141 + tx_green {
  142 + label = "tx_green";
  143 + gpios = <&pioC 19 0>;
  144 + };
  145 +
  146 + tx_red {
  147 + label = "tx_red";
  148 + gpios = <&pioC 18 0>;
  149 + };
  150 + };
  151 +
  152 + gpio_keys {
  153 + compatible = "gpio-keys";
  154 + #address-cells = <1>;
  155 + #size-cells = <0>;
  156 +
  157 + keyswitch_in {
  158 + label = "keyswitch_in";
  159 + gpios = <&pioB 1 0>;
  160 + linux,code = <28>;
  161 + gpio-key,wakeup;
  162 + };
  163 +
  164 + error_in {
  165 + label = "error_in";
  166 + gpios = <&pioB 2 0>;
  167 + linux,code = <29>;
  168 + gpio-key,wakeup;
  169 + };
  170 +
  171 + btn {
  172 + label = "btn";
  173 + gpios = <&pioC 23 0>;
  174 + linux,code = <31>;
  175 + gpio-key,wakeup;
  176 + };
  177 + };
  178 +};
arch/arm/boot/dts/at91rm9200.dtsi
Diff comments   View file @ 5f007db
  1 +/*
  2 + * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
  3 + *
  4 + * Copyright (C) 2011 Atmel,
  5 + * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
  6 + * 2012 Joachim Eastwood <manabian@gmail.com>
  7 + *
  8 + * Based on at91sam9260.dtsi
  9 + *
  10 + * Licensed under GPLv2 or later.
  11 + */
  12 +
  13 +/include/ "skeleton.dtsi"
  14 +
  15 +/ {
  16 + model = "Atmel AT91RM9200 family SoC";
  17 + compatible = "atmel,at91rm9200";
  18 + interrupt-parent = <&aic>;
  19 +
  20 + aliases {
  21 + serial0 = &dbgu;
  22 + serial1 = &usart0;
  23 + serial2 = &usart1;
  24 + serial3 = &usart2;
  25 + serial4 = &usart3;
  26 + gpio0 = &pioA;
  27 + gpio1 = &pioB;
  28 + gpio2 = &pioC;
  29 + gpio3 = &pioD;
  30 + tcb0 = &tcb0;
  31 + tcb1 = &tcb1;
  32 + };
  33 + cpus {
  34 + cpu@0 {
  35 + compatible = "arm,arm920t";
  36 + };
  37 + };
  38 +
  39 + memory {
  40 + reg = <0x20000000 0x04000000>;
  41 + };
  42 +
  43 + ahb {
  44 + compatible = "simple-bus";
  45 + #address-cells = <1>;
  46 + #size-cells = <1>;
  47 + ranges;
  48 +
  49 + apb {
  50 + compatible = "simple-bus";
  51 + #address-cells = <1>;
  52 + #size-cells = <1>;
  53 + ranges;
  54 +
  55 + aic: interrupt-controller@fffff000 {
  56 + #interrupt-cells = <3>;
  57 + compatible = "atmel,at91rm9200-aic";
  58 + interrupt-controller;
  59 + reg = <0xfffff000 0x200>;
  60 + atmel,external-irqs = <25 26 27 28 29 30 31>;
  61 + };
  62 +
  63 + ramc0: ramc@ffffff00 {
  64 + compatible = "atmel,at91rm9200-sdramc";
  65 + reg = <0xffffff00 0x100>;
  66 + };
  67 +
  68 + pmc: pmc@fffffc00 {
  69 + compatible = "atmel,at91rm9200-pmc";
  70 + reg = <0xfffffc00 0x100>;
  71 + };
  72 +
  73 + st: timer@fffffd00 {
  74 + compatible = "atmel,at91rm9200-st";
  75 + reg = <0xfffffd00 0x100>;
  76 + interrupts = <1 4 7>;
  77 + };
  78 +
  79 + tcb0: timer@fffa0000 {
  80 + compatible = "atmel,at91rm9200-tcb";
  81 + reg = <0xfffa0000 0x100>;
  82 + interrupts = <17 4 0 18 4 0 19 4 0>;
  83 + };
  84 +
  85 + tcb1: timer@fffa4000 {
  86 + compatible = "atmel,at91rm9200-tcb";
  87 + reg = <0xfffa4000 0x100>;
  88 + interrupts = <20 4 0 21 4 0 22 4 0>;
  89 + };
  90 +
  91 + pinctrl@fffff400 {
  92 + #address-cells = <1>;
  93 + #size-cells = <1>;
  94 + compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
  95 + ranges = <0xfffff400 0xfffff400 0x800>;
  96 +
  97 + atmel,mux-mask = <
  98 + /* A B */
  99 + 0xffffffff 0xffffffff /* pioA */
  100 + 0xffffffff 0x083fffff /* pioB */
  101 + 0xffff3fff 0x00000000 /* pioC */
  102 + 0x03ff87ff 0x0fffff80 /* pioD */
  103 + >;
  104 +
  105 + /* shared pinctrl settings */
  106 + dbgu {
  107 + pinctrl_dbgu: dbgu-0 {
  108 + atmel,pins =
  109 + <0 30 0x1 0x0 /* PA30 periph A */
  110 + 0 31 0x1 0x1>; /* PA31 periph with pullup */
  111 + };
  112 + };
  113 +
  114 + uart0 {
  115 + pinctrl_uart0: uart0-0 {
  116 + atmel,pins =
  117 + <0 17 0x1 0x0 /* PA17 periph A */
  118 + 0 18 0x1 0x0>; /* PA18 periph A */
  119 + };
  120 +
  121 + pinctrl_uart0_rts: uart0_rts-0 {
  122 + atmel,pins =
  123 + <0 20 0x1 0x0>; /* PA20 periph A */
  124 + };
  125 +
  126 + pinctrl_uart0_cts: uart0_cts-0 {
  127 + atmel,pins =
  128 + <0 21 0x1 0x0>; /* PA21 periph A */
  129 + };
  130 + };
  131 +
  132 + uart1 {
  133 + pinctrl_uart1: uart1-0 {
  134 + atmel,pins =
  135 + <1 20 0x1 0x1 /* PB20 periph A with pullup */
  136 + 1 21 0x1 0x0>; /* PB21 periph A */
  137 + };
  138 +
  139 + pinctrl_uart1_rts: uart1_rts-0 {
  140 + atmel,pins =
  141 + <1 24 0x1 0x0>; /* PB24 periph A */
  142 + };
  143 +
  144 + pinctrl_uart1_cts: uart1_cts-0 {
  145 + atmel,pins =
  146 + <1 26 0x1 0x0>; /* PB26 periph A */
  147 + };
  148 +
  149 + pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
  150 + atmel,pins =
  151 + <1 19 0x1 0x0 /* PB19 periph A */
  152 + 1 25 0x1 0x0>; /* PB25 periph A */
  153 + };
  154 +
  155 + pinctrl_uart1_dcd: uart1_dcd-0 {
  156 + atmel,pins =
  157 + <1 23 0x1 0x0>; /* PB23 periph A */
  158 + };
  159 +
  160 + pinctrl_uart1_ri: uart1_ri-0 {
  161 + atmel,pins =
  162 + <1 18 0x1 0x0>; /* PB18 periph A */
  163 + };
  164 + };
  165 +
  166 + uart2 {
  167 + pinctrl_uart2: uart2-0 {
  168 + atmel,pins =
  169 + <0 22 0x1 0x0 /* PA22 periph A */
  170 + 0 23 0x1 0x1>; /* PA23 periph A with pullup */
  171 + };
  172 +
  173 + pinctrl_uart2_rts: uart2_rts-0 {
  174 + atmel,pins =
  175 + <0 30 0x2 0x0>; /* PA30 periph B */
  176 + };
  177 +
  178 + pinctrl_uart2_cts: uart2_cts-0 {
  179 + atmel,pins =
  180 + <0 31 0x2 0x0>; /* PA31 periph B */
  181 + };
  182 + };
  183 +
  184 + uart3 {
  185 + pinctrl_uart3: uart3-0 {
  186 + atmel,pins =
  187 + <0 5 0x2 0x1 /* PA5 periph B with pullup */
  188 + 0 6 0x2 0x0>; /* PA6 periph B */
  189 + };
  190 +
  191 + pinctrl_uart3_rts: uart3_rts-0 {
  192 + atmel,pins =
  193 + <1 0 0x2 0x0>; /* PB0 periph B */
  194 + };
  195 +
  196 + pinctrl_uart3_cts: uart3_cts-0 {
  197 + atmel,pins =
  198 + <1 1 0x2 0x0>; /* PB1 periph B */
  199 + };
  200 + };
  201 +
  202 + nand {
  203 + pinctrl_nand: nand-0 {
  204 + atmel,pins =
  205 + <2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */
  206 + 1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */
  207 + };
  208 + };
  209 +
  210 + pioA: gpio@fffff400 {
  211 + compatible = "atmel,at91rm9200-gpio";
  212 + reg = <0xfffff400 0x200>;
  213 + interrupts = <2 4 1>;
  214 + #gpio-cells = <2>;
  215 + gpio-controller;
  216 + interrupt-controller;
  217 + #interrupt-cells = <2>;
  218 + };
  219 +
  220 + pioB: gpio@fffff600 {
  221 + compatible = "atmel,at91rm9200-gpio";
  222 + reg = <0xfffff600 0x200>;
  223 + interrupts = <3 4 1>;
  224 + #gpio-cells = <2>;
  225 + gpio-controller;
  226 + interrupt-controller;
  227 + #interrupt-cells = <2>;
  228 + };
  229 +
  230 + pioC: gpio@fffff800 {
  231 + compatible = "atmel,at91rm9200-gpio";
  232 + reg = <0xfffff800 0x200>;
  233 + interrupts = <4 4 1>;
  234 + #gpio-cells = <2>;
  235 + gpio-controller;
  236 + interrupt-controller;
  237 + #interrupt-cells = <2>;
  238 + };
  239 +
  240 + pioD: gpio@fffffa00 {
  241 + compatible = "atmel,at91rm9200-gpio";
  242 + reg = <0xfffffa00 0x200>;
  243 + interrupts = <5 4 1>;
  244 + #gpio-cells = <2>;
  245 + gpio-controller;
  246 + interrupt-controller;
  247 + #interrupt-cells = <2>;
  248 + };
  249 + };
  250 +
  251 + dbgu: serial@fffff200 {
  252 + compatible = "atmel,at91rm9200-usart";
  253 + reg = <0xfffff200 0x200>;
  254 + interrupts = <1 4 7>;
  255 + pinctrl-names = "default";
  256 + pinctrl-0 = <&pinctrl_dbgu>;
  257 + status = "disabled";
  258 + };
  259 +
  260 + usart0: serial@fffc0000 {
  261 + compatible = "atmel,at91rm9200-usart";
  262 + reg = <0xfffc0000 0x200>;
  263 + interrupts = <6 4 5>;
  264 + atmel,use-dma-rx;
  265 + atmel,use-dma-tx;
  266 + pinctrl-names = "default";
  267 + pinctrl-0 = <&pinctrl_uart0>;
  268 + status = "disabled";
  269 + };
  270 +
  271 + usart1: serial@fffc4000 {
  272 + compatible = "atmel,at91rm9200-usart";
  273 + reg = <0xfffc4000 0x200>;
  274 + interrupts = <7 4 5>;
  275 + atmel,use-dma-rx;
  276 + atmel,use-dma-tx;
  277 + pinctrl-names = "default";
  278 + pinctrl-0 = <&pinctrl_uart1>;
  279 + status = "disabled";
  280 + };
  281 +
  282 + usart2: serial@fffc8000 {
  283 + compatible = "atmel,at91rm9200-usart";
  284 + reg = <0xfffc8000 0x200>;
  285 + interrupts = <8 4 5>;
  286 + atmel,use-dma-rx;
  287 + atmel,use-dma-tx;
  288 + pinctrl-names = "default";
  289 + pinctrl-0 = <&pinctrl_uart2>;
  290 + status = "disabled";
  291 + };
  292 +
  293 + usart3: serial@fffcc000 {
  294 + compatible = "atmel,at91rm9200-usart";
  295 + reg = <0xfffcc000 0x200>;
  296 + interrupts = <23 4 5>;
  297 + atmel,use-dma-rx;
  298 + atmel,use-dma-tx;
  299 + pinctrl-names = "default";
  300 + pinctrl-0 = <&pinctrl_uart3>;
  301 + status = "disabled";
  302 + };
  303 +
  304 + usb1: gadget@fffb0000 {
  305 + compatible = "atmel,at91rm9200-udc";
  306 + reg = <0xfffb0000 0x4000>;
  307 + interrupts = <11 4 2>;
  308 + status = "disabled";
  309 + };
  310 + };
  311 +
  312 + nand0: nand@40000000 {
  313 + compatible = "atmel,at91rm9200-nand";
  314 + #address-cells = <1>;
  315 + #size-cells = <1>;
  316 + reg = <0x40000000 0x10000000>;
  317 + atmel,nand-addr-offset = <21>;
  318 + atmel,nand-cmd-offset = <22>;
  319 + pinctrl-names = "default";
  320 + pinctrl-0 = <&pinctrl_nand>;
  321 + nand-ecc-mode = "soft";
  322 + gpios = <&pioC 2 0
  323 + 0
  324 + &pioB 1 0
  325 + >;
  326 + status = "disabled";
  327 + };
  328 +
  329 + usb0: ohci@00300000 {
  330 + compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  331 + reg = <0x00300000 0x100000>;
  332 + interrupts = <23 4 2>;
  333 + status = "disabled";
  334 + };
  335 + };
  336 +
  337 + i2c@0 {
  338 + compatible = "i2c-gpio";
  339 + gpios = <&pioA 23 0 /* sda */
  340 + &pioA 24 0 /* scl */
  341 + >;
  342 + i2c-gpio,sda-open-drain;
  343 + i2c-gpio,scl-open-drain;
  344 + i2c-gpio,delay-us = <2>; /* ~100 kHz */
  345 + #address-cells = <1>;
  346 + #size-cells = <0>;
  347 + status = "disabled";
  348 + };
  349 +};
arch/arm/boot/dts/at91rm9200ek.dts
Diff comments   View file @ 5f007db
  1 +/*
  2 + * at91rm9200ek.dts - Device Tree file for Atmel AT91RM9200 evaluation kit
  3 + *
  4 + * Copyright (C) 2012 Joachim Eastwood <manabian@gmail.com>
  5 + *
  6 + * Licensed under GPLv2 only
  7 + */
  8 +/dts-v1/;
  9 +/include/ "at91rm9200.dtsi"
  10 +
  11 +/ {
  12 + model = "Atmel AT91RM9200 evaluation kit";
  13 + compatible = "atmel,at91rm9200ek", "atmel,at91rm9200";
  14 +
  15 + memory {
  16 + reg = <0x20000000 0x4000000>;
  17 + };
  18 +
  19 + clocks {
  20 + #address-cells = <1>;
  21 + #size-cells = <1>;
  22 + ranges;
  23 +
  24 + main_clock: clock@0 {
  25 + compatible = "atmel,osc", "fixed-clock";
  26 + clock-frequency = <18432000>;
  27 + };
  28 + };
  29 +
  30 + ahb {
  31 + apb {
  32 + dbgu: serial@fffff200 {
  33 + status = "okay";
  34 + };
  35 +
  36 + usart1: serial@fffc4000 {
  37 + pinctrl-0 =
  38 + <&pinctrl_uart1
  39 + &pinctrl_uart1_rts
  40 + &pinctrl_uart1_cts
  41 + &pinctrl_uart1_dtr_dsr
  42 + &pinctrl_uart1_dcd
  43 + &pinctrl_uart1_ri>;
  44 + status = "okay";
  45 + };
  46 +
  47 + usb1: gadget@fffb0000 {
  48 + atmel,vbus-gpio = <&pioD 4 0>;
  49 + status = "okay";
  50 + };
  51 + };
  52 +
  53 + usb0: ohci@00300000 {
  54 + num-ports = <2>;
  55 + status = "okay";
  56 + };
  57 + };
  58 +
  59 + leds {
  60 + compatible = "gpio-leds";
  61 +
  62 + ds2 {
  63 + label = "green";
  64 + gpios = <&pioB 0 0x1>;
  65 + linux,default-trigger = "mmc0";
  66 + };
  67 +
  68 + ds4 {
  69 + label = "yellow";
  70 + gpios = <&pioB 1 0x1>;
  71 + linux,default-trigger = "heartbeat";
  72 + };
  73 +
  74 + ds6 {
  75 + label = "red";
  76 + gpios = <&pioB 2 0x1>;
  77 + };
  78 + };
  79 +};
arch/arm/boot/dts/at91sam9260.dtsi
Diff comments   View file @ 5f007db
... ... @@ -21,8 +21,8 @@
21 21 serial2 = &usart1;
22 22 serial3 = &usart2;
23 23 serial4 = &usart3;
24   - serial5 = &usart4;
25   - serial6 = &usart5;
  24 + serial5 = &uart0;
  25 + serial6 = &uart1;
26 26 gpio0 = &pioA;
27 27 gpio1 = &pioB;
28 28 gpio2 = &pioC;
29 29  
30 30  
31 31  
32 32  
33 33  
34 34  
35 35  
36 36  
37 37  
38 38  
39 39  
40 40  
41 41  
42 42  
43 43  
44 44  
45 45  
46 46  
47 47  
48 48  
... ... @@ -120,88 +120,104 @@
120 120 };
121 121 };
122 122  
123   - uart0 {
124   - pinctrl_uart0: uart0-0 {
  123 + usart0 {
  124 + pinctrl_usart0: usart0-0 {
125 125 atmel,pins =
126 126 <1 4 0x1 0x0 /* PB4 periph A */
127 127 1 5 0x1 0x0>; /* PB5 periph A */
128 128 };
129 129  
130   - pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
  130 + pinctrl_usart0_rts: usart0_rts-0 {
131 131 atmel,pins =
132   - <1 26 0x1 0x0 /* PB26 periph A */
133   - 1 27 0x1 0x0>; /* PB27 periph A */
  132 + <1 26 0x1 0x0>; /* PB26 periph A */
134 133 };
135 134  
136   - pinctrl_uart0_dtr_dsr: uart0_dtr_dsr-0 {
  135 + pinctrl_usart0_cts: usart0_cts-0 {
137 136 atmel,pins =
  137 + <1 27 0x1 0x0>; /* PB27 periph A */
  138 + };
  139 +
  140 + pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
  141 + atmel,pins =
138 142 <1 24 0x1 0x0 /* PB24 periph A */
139 143 1 22 0x1 0x0>; /* PB22 periph A */
140 144 };
141 145  
142   - pinctrl_uart0_dcd: uart0_dcd-0 {
  146 + pinctrl_usart0_dcd: usart0_dcd-0 {
143 147 atmel,pins =
144 148 <1 23 0x1 0x0>; /* PB23 periph A */
145 149 };
146 150  
147   - pinctrl_uart0_ri: uart0_ri-0 {
  151 + pinctrl_usart0_ri: usart0_ri-0 {
148 152 atmel,pins =
149 153 <1 25 0x1 0x0>; /* PB25 periph A */
150 154 };
151 155 };
152 156  
153   - uart1 {
154   - pinctrl_uart1: uart1-0 {
  157 + usart1 {
  158 + pinctrl_usart1: usart1-0 {
155 159 atmel,pins =
156 160 <2 6 0x1 0x1 /* PB6 periph A with pullup */
157 161 2 7 0x1 0x0>; /* PB7 periph A */
158 162 };
159 163  
160   - pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
  164 + pinctrl_usart1_rts: usart1_rts-0 {
161 165 atmel,pins =
162   - <1 28 0x1 0x0 /* PB28 periph A */
163   - 1 29 0x1 0x0>; /* PB29 periph A */
  166 + <1 28 0x1 0x0>; /* PB28 periph A */
164 167 };
  168 +
  169 + pinctrl_usart1_cts: usart1_cts-0 {
  170 + atmel,pins =
  171 + <1 29 0x1 0x0>; /* PB29 periph A */
  172 + };
165 173 };
166 174  
167   - uart2 {
168   - pinctrl_uart2: uart2-0 {
  175 + usart2 {
  176 + pinctrl_usart2: usart2-0 {
169 177 atmel,pins =
170 178 <1 8 0x1 0x1 /* PB8 periph A with pullup */
171 179 1 9 0x1 0x0>; /* PB9 periph A */
172 180 };
173 181  
174   - pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
  182 + pinctrl_usart2_rts: usart2_rts-0 {
175 183 atmel,pins =
176   - <0 4 0x1 0x0 /* PA4 periph A */
177   - 0 5 0x1 0x0>; /* PA5 periph A */
  184 + <0 4 0x1 0x0>; /* PA4 periph A */
178 185 };
  186 +
  187 + pinctrl_usart2_cts: usart2_cts-0 {
  188 + atmel,pins =
  189 + <0 5 0x1 0x0>; /* PA5 periph A */
  190 + };
179 191 };
180 192  
181   - uart3 {
182   - pinctrl_uart3: uart3-0 {
  193 + usart3 {
  194 + pinctrl_usart3: usart3-0 {
183 195 atmel,pins =
184 196 <2 10 0x1 0x1 /* PB10 periph A with pullup */
185 197 2 11 0x1 0x0>; /* PB11 periph A */
186 198 };
187 199  
188   - pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
  200 + pinctrl_usart3_rts: usart3_rts-0 {
189 201 atmel,pins =
190   - <3 8 0x2 0x0 /* PB8 periph B */
191   - 3 10 0x2 0x0>; /* PB10 periph B */
  202 + <3 8 0x2 0x0>; /* PB8 periph B */
192 203 };
  204 +
  205 + pinctrl_usart3_cts: usart3_cts-0 {
  206 + atmel,pins =
  207 + <3 10 0x2 0x0>; /* PB10 periph B */
  208 + };
193 209 };
194 210  
195   - uart4 {
196   - pinctrl_uart4: uart4-0 {
  211 + uart0 {
  212 + pinctrl_uart0: uart0-0 {
197 213 atmel,pins =
198 214 <0 31 0x2 0x1 /* PA31 periph B with pullup */
199 215 0 30 0x2 0x0>; /* PA30 periph B */
200 216 };
201 217 };
202 218  
203   - uart5 {
204   - pinctrl_uart5: uart5-0 {
  219 + uart1 {
  220 + pinctrl_uart1: uart1-0 {
205 221 atmel,pins =
206 222 <2 12 0x1 0x1 /* PB12 periph A with pullup */
207 223 2 13 0x1 0x0>; /* PB13 periph A */
... ... @@ -216,6 +232,79 @@
216 232 };
217 233 };
218 234  
  235 + macb {
  236 + pinctrl_macb_rmii: macb_rmii-0 {
  237 + atmel,pins =
  238 + <0 12 0x1 0x0 /* PA12 periph A */
  239 + 0 13 0x1 0x0 /* PA13 periph A */
  240 + 0 14 0x1 0x0 /* PA14 periph A */
  241 + 0 15 0x1 0x0 /* PA15 periph A */
  242 + 0 16 0x1 0x0 /* PA16 periph A */
  243 + 0 17 0x1 0x0 /* PA17 periph A */
  244 + 0 18 0x1 0x0 /* PA18 periph A */
  245 + 0 19 0x1 0x0 /* PA19 periph A */
  246 + 0 20 0x1 0x0 /* PA20 periph A */
  247 + 0 21 0x1 0x0>; /* PA21 periph A */
  248 + };
  249 +
  250 + pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
  251 + atmel,pins =
  252 + <0 22 0x2 0x0 /* PA22 periph B */
  253 + 0 23 0x2 0x0 /* PA23 periph B */
  254 + 0 24 0x2 0x0 /* PA24 periph B */
  255 + 0 25 0x2 0x0 /* PA25 periph B */
  256 + 0 26 0x2 0x0 /* PA26 periph B */
  257 + 0 27 0x2 0x0 /* PA27 periph B */
  258 + 0 28 0x2 0x0 /* PA28 periph B */
  259 + 0 29 0x2 0x0>; /* PA29 periph B */
  260 + };
  261 +
  262 + pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
  263 + atmel,pins =
  264 + <0 10 0x2 0x0 /* PA10 periph B */
  265 + 0 11 0x2 0x0 /* PA11 periph B */
  266 + 0 24 0x2 0x0 /* PA24 periph B */
  267 + 0 25 0x2 0x0 /* PA25 periph B */
  268 + 0 26 0x2 0x0 /* PA26 periph B */
  269 + 0 27 0x2 0x0 /* PA27 periph B */
  270 + 0 28 0x2 0x0 /* PA28 periph B */
  271 + 0 29 0x2 0x0>; /* PA29 periph B */
  272 + };
  273 + };
  274 +
  275 + mmc0 {
  276 + pinctrl_mmc0_clk: mmc0_clk-0 {
  277 + atmel,pins =
  278 + <0 8 0x1 0x0>; /* PA8 periph A */
  279 + };
  280 +
  281 + pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
  282 + atmel,pins =
  283 + <0 7 0x1 0x1 /* PA7 periph A with pullup */
  284 + 0 6 0x1 0x1>; /* PA6 periph A with pullup */
  285 + };
  286 +
  287 + pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
  288 + atmel,pins =
  289 + <0 9 0x1 0x1 /* PA9 periph A with pullup */
  290 + 0 10 0x1 0x1 /* PA10 periph A with pullup */
  291 + 0 11 0x1 0x1>; /* PA11 periph A with pullup */
  292 + };
  293 +
  294 + pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
  295 + atmel,pins =
  296 + <0 1 0x2 0x1 /* PA1 periph B with pullup */
  297 + 0 0 0x2 0x1>; /* PA0 periph B with pullup */
  298 + };
  299 +
  300 + pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
  301 + atmel,pins =
  302 + <0 5 0x2 0x1 /* PA5 periph B with pullup */
  303 + 0 4 0x2 0x1 /* PA4 periph B with pullup */
  304 + 0 3 0x2 0x1>; /* PA3 periph B with pullup */
  305 + };
  306 + };
  307 +
219 308 pioA: gpio@fffff400 {
220 309 compatible = "atmel,at91rm9200-gpio";
221 310 reg = <0xfffff400 0x200>;
... ... @@ -263,7 +352,7 @@
263 352 atmel,use-dma-rx;
264 353 atmel,use-dma-tx;
265 354 pinctrl-names = "default";
266   - pinctrl-0 = <&pinctrl_uart0>;
  355 + pinctrl-0 = <&pinctrl_usart0>;
267 356 status = "disabled";
268 357 };
269 358  
... ... @@ -274,7 +363,7 @@
274 363 atmel,use-dma-rx;
275 364 atmel,use-dma-tx;
276 365 pinctrl-names = "default";
277   - pinctrl-0 = <&pinctrl_uart1>;
  366 + pinctrl-0 = <&pinctrl_usart1>;
278 367 status = "disabled";
279 368 };
280 369  
... ... @@ -285,7 +374,7 @@
285 374 atmel,use-dma-rx;
286 375 atmel,use-dma-tx;
287 376 pinctrl-names = "default";
288   - pinctrl-0 = <&pinctrl_uart2>;
  377 + pinctrl-0 = <&pinctrl_usart2>;
289 378 status = "disabled";
290 379 };
291 380  
292 381  
293 382  
294 383  
295 384  
... ... @@ -296,29 +385,29 @@
296 385 atmel,use-dma-rx;
297 386 atmel,use-dma-tx;
298 387 pinctrl-names = "default";
299   - pinctrl-0 = <&pinctrl_uart3>;
  388 + pinctrl-0 = <&pinctrl_usart3>;
300 389 status = "disabled";
301 390 };
302 391  
303   - usart4: serial@fffd4000 {
  392 + uart0: serial@fffd4000 {
304 393 compatible = "atmel,at91sam9260-usart";
305 394 reg = <0xfffd4000 0x200>;
306 395 interrupts = <24 4 5>;
307 396 atmel,use-dma-rx;
308 397 atmel,use-dma-tx;
309 398 pinctrl-names = "default";
310   - pinctrl-0 = <&pinctrl_uart4>;
  399 + pinctrl-0 = <&pinctrl_uart0>;
311 400 status = "disabled";
312 401 };
313 402  
314   - usart5: serial@fffd8000 {
  403 + uart1: serial@fffd8000 {
315 404 compatible = "atmel,at91sam9260-usart";
316 405 reg = <0xfffd8000 0x200>;
317 406 interrupts = <25 4 5>;
318 407 atmel,use-dma-rx;
319 408 atmel,use-dma-tx;
320 409 pinctrl-names = "default";
321   - pinctrl-0 = <&pinctrl_uart5>;
  410 + pinctrl-0 = <&pinctrl_uart1>;
322 411 status = "disabled";
323 412 };
324 413  
... ... @@ -326,6 +415,8 @@
326 415 compatible = "cdns,at32ap7000-macb", "cdns,macb";
327 416 reg = <0xfffc4000 0x100>;
328 417 interrupts = <21 4 3>;
  418 + pinctrl-names = "default";
  419 + pinctrl-0 = <&pinctrl_macb_rmii>;
329 420 status = "disabled";
330 421 };
331 422  
... ... @@ -340,6 +431,15 @@
340 431 compatible = "atmel,at91sam9260-i2c";
341 432 reg = <0xfffac000 0x100>;
342 433 interrupts = <11 4 6>;
  434 + #address-cells = <1>;
  435 + #size-cells = <0>;
  436 + status = "disabled";
  437 + };
  438 +
  439 + mmc0: mmc@fffa8000 {
  440 + compatible = "atmel,hsmci";
  441 + reg = <0xfffa8000 0x600>;
  442 + interrupts = <9 4 0>;
343 443 #address-cells = <1>;
344 444 #size-cells = <0>;
345 445 status = "disabled";
arch/arm/boot/dts/at91sam9263.dtsi
Diff comments   View file @ 5f007db
... ... @@ -113,46 +113,58 @@
113 113 };
114 114 };
115 115  
116   - uart0 {
117   - pinctrl_uart0: uart0-0 {
  116 + usart0 {
  117 + pinctrl_usart0: usart0-0 {
118 118 atmel,pins =
119 119 <0 26 0x1 0x1 /* PA26 periph A with pullup */
120 120 0 27 0x1 0x0>; /* PA27 periph A */
121 121 };
122 122  
123   - pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
  123 + pinctrl_usart0_rts: usart0_rts-0 {
124 124 atmel,pins =
125   - <0 28 0x1 0x0 /* PA28 periph A */
126   - 0 29 0x1 0x0>; /* PA29 periph A */
  125 + <0 28 0x1 0x0>; /* PA28 periph A */
127 126 };
  127 +
  128 + pinctrl_usart0_cts: usart0_cts-0 {
  129 + atmel,pins =
  130 + <0 29 0x1 0x0>; /* PA29 periph A */
  131 + };
128 132 };
129 133  
130   - uart1 {
131   - pinctrl_uart1: uart1-0 {
  134 + usart1 {
  135 + pinctrl_usart1: usart1-0 {
132 136 atmel,pins =
133 137 <3 0 0x1 0x1 /* PD0 periph A with pullup */
134 138 3 1 0x1 0x0>; /* PD1 periph A */
135 139 };
136 140  
137   - pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
  141 + pinctrl_usart1_rts: usart1_rts-0 {
138 142 atmel,pins =
139   - <3 7 0x2 0x0 /* PD7 periph B */
140   - 3 8 0x2 0x0>; /* PD8 periph B */
  143 + <3 7 0x2 0x0>; /* PD7 periph B */
141 144 };
  145 +
  146 + pinctrl_usart1_cts: usart1_cts-0 {
  147 + atmel,pins =
  148 + <3 8 0x2 0x0>; /* PD8 periph B */
  149 + };
142 150 };
143 151  
144   - uart2 {
145   - pinctrl_uart2: uart2-0 {
  152 + usart2 {
  153 + pinctrl_usart2: usart2-0 {
146 154 atmel,pins =
147 155 <3 2 0x1 0x1 /* PD2 periph A with pullup */
148 156 3 3 0x1 0x0>; /* PD3 periph A */
149 157 };
150 158  
151   - pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
  159 + pinctrl_usart2_rts: usart2_rts-0 {
152 160 atmel,pins =
153   - <3 5 0x2 0x0 /* PD5 periph B */
154   - 4 6 0x2 0x0>; /* PD6 periph B */
  161 + <3 5 0x2 0x0>; /* PD5 periph B */
155 162 };
  163 +
  164 + pinctrl_usart2_cts: usart2_cts-0 {
  165 + atmel,pins =
  166 + <4 6 0x2 0x0>; /* PD6 periph B */
  167 + };
156 168 };
157 169  
158 170 nand {
... ... @@ -163,6 +175,100 @@
163 175 };
164 176 };
165 177  
  178 + macb {
  179 + pinctrl_macb_rmii: macb_rmii-0 {
  180 + atmel,pins =
  181 + <2 25 0x2 0x0 /* PC25 periph B */
  182 + 4 21 0x1 0x0 /* PE21 periph A */
  183 + 4 23 0x1 0x0 /* PE23 periph A */
  184 + 4 24 0x1 0x0 /* PE24 periph A */
  185 + 4 25 0x1 0x0 /* PE25 periph A */
  186 + 4 26 0x1 0x0 /* PE26 periph A */
  187 + 4 27 0x1 0x0 /* PE27 periph A */
  188 + 4 28 0x1 0x0 /* PE28 periph A */
  189 + 4 29 0x1 0x0 /* PE29 periph A */
  190 + 4 30 0x1 0x0>; /* PE30 periph A */
  191 + };
  192 +
  193 + pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
  194 + atmel,pins =
  195 + <2 20 0x2 0x0 /* PC20 periph B */
  196 + 2 21 0x2 0x0 /* PC21 periph B */
  197 + 2 22 0x2 0x0 /* PC22 periph B */
  198 + 2 23 0x2 0x0 /* PC23 periph B */
  199 + 2 24 0x2 0x0 /* PC24 periph B */
  200 + 2 25 0x2 0x0 /* PC25 periph B */
  201 + 2 27 0x2 0x0 /* PC27 periph B */
  202 + 4 22 0x2 0x0>; /* PE22 periph B */
  203 + };
  204 + };
  205 +
  206 + mmc0 {
  207 + pinctrl_mmc0_clk: mmc0_clk-0 {
  208 + atmel,pins =
  209 + <0 12 0x1 0x0>; /* PA12 periph A */
  210 + };
  211 +
  212 + pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
  213 + atmel,pins =
  214 + <0 1 0x1 0x1 /* PA1 periph A with pullup */
  215 + 0 0 0x1 0x1>; /* PA0 periph A with pullup */
  216 + };
  217 +
  218 + pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
  219 + atmel,pins =
  220 + <0 3 0x1 0x1 /* PA3 periph A with pullup */
  221 + 0 4 0x1 0x1 /* PA4 periph A with pullup */
  222 + 0 5 0x1 0x1>; /* PA5 periph A with pullup */
  223 + };
  224 +
  225 + pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
  226 + atmel,pins =
  227 + <0 16 0x1 0x1 /* PA16 periph A with pullup */
  228 + 0 17 0x1 0x1>; /* PA17 periph A with pullup */
  229 + };
  230 +
  231 + pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
  232 + atmel,pins =
  233 + <0 18 0x1 0x1 /* PA18 periph A with pullup */
  234 + 0 19 0x1 0x1 /* PA19 periph A with pullup */
  235 + 0 20 0x1 0x1>; /* PA20 periph A with pullup */
  236 + };
  237 + };
  238 +
  239 + mmc1 {
  240 + pinctrl_mmc1_clk: mmc1_clk-0 {
  241 + atmel,pins =
  242 + <0 6 0x1 0x0>; /* PA6 periph A */
  243 + };
  244 +
  245 + pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
  246 + atmel,pins =
  247 + <0 7 0x1 0x1 /* PA7 periph A with pullup */
  248 + 0 8 0x1 0x1>; /* PA8 periph A with pullup */
  249 + };
  250 +
  251 + pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
  252 + atmel,pins =
  253 + <0 9 0x1 0x1 /* PA9 periph A with pullup */
  254 + 0 10 0x1 0x1 /* PA10 periph A with pullup */
  255 + 0 11 0x1 0x1>; /* PA11 periph A with pullup */
  256 + };
  257 +
  258 + pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
  259 + atmel,pins =
  260 + <0 21 0x1 0x1 /* PA21 periph A with pullup */
  261 + 0 22 0x1 0x1>; /* PA22 periph A with pullup */
  262 + };
  263 +
  264 + pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
  265 + atmel,pins =
  266 + <0 23 0x1 0x1 /* PA23 periph A with pullup */
  267 + 0 24 0x1 0x1 /* PA24 periph A with pullup */
  268 + 0 25 0x1 0x1>; /* PA25 periph A with pullup */
  269 + };
  270 + };
  271 +
166 272 pioA: gpio@fffff200 {
167 273 compatible = "atmel,at91rm9200-gpio";
168 274 reg = <0xfffff200 0x200>;
... ... @@ -230,7 +336,7 @@
230 336 atmel,use-dma-rx;
231 337 atmel,use-dma-tx;
232 338 pinctrl-names = "default";
233   - pinctrl-0 = <&pinctrl_uart0>;
  339 + pinctrl-0 = <&pinctrl_usart0>;
234 340 status = "disabled";
235 341 };
236 342  
... ... @@ -241,7 +347,7 @@
241 347 atmel,use-dma-rx;
242 348 atmel,use-dma-tx;
243 349 pinctrl-names = "default";
244   - pinctrl-0 = <&pinctrl_uart1>;
  350 + pinctrl-0 = <&pinctrl_usart1>;
245 351 status = "disabled";
246 352 };
247 353  
... ... @@ -252,7 +358,7 @@
252 358 atmel,use-dma-rx;
253 359 atmel,use-dma-tx;
254 360 pinctrl-names = "default";
255   - pinctrl-0 = <&pinctrl_uart2>;
  361 + pinctrl-0 = <&pinctrl_usart2>;
256 362 status = "disabled";
257 363 };
258 364  
... ... @@ -260,6 +366,8 @@
260 366 compatible = "cdns,at32ap7000-macb", "cdns,macb";
261 367 reg = <0xfffbc000 0x100>;
262 368 interrupts = <21 4 3>;
  369 + pinctrl-names = "default";
  370 + pinctrl-0 = <&pinctrl_macb_rmii>;
263 371 status = "disabled";
264 372 };
265 373  
... ... @@ -274,6 +382,24 @@
274 382 compatible = "atmel,at91sam9263-i2c";
275 383 reg = <0xfff88000 0x100>;
276 384 interrupts = <13 4 6>;
  385 + #address-cells = <1>;
  386 + #size-cells = <0>;
  387 + status = "disabled";
  388 + };
  389 +
  390 + mmc0: mmc@fff80000 {
  391 + compatible = "atmel,hsmci";
  392 + reg = <0xfff80000 0x600>;
  393 + interrupts = <10 4 0>;
  394 + #address-cells = <1>;
  395 + #size-cells = <0>;
  396 + status = "disabled";
  397 + };
  398 +
  399 + mmc1: mmc@fff84000 {
  400 + compatible = "atmel,hsmci";
  401 + reg = <0xfff84000 0x600>;
  402 + interrupts = <11 4 0>;
277 403 #address-cells = <1>;
278 404 #size-cells = <0>;
279 405 status = "disabled";
arch/arm/boot/dts/at91sam9263ek.dts
Diff comments   View file @ 5f007db
... ... @@ -38,7 +38,10 @@
38 38 };
39 39  
40 40 usart0: serial@fff8c000 {
41   - pinctrl-0 = <&pinctrl_uart0 &pinctrl_uart0_rts_cts>;
  41 + pinctrl-0 = <
  42 + &pinctrl_usart0
  43 + &pinctrl_usart0_rts
  44 + &pinctrl_usart0_cts>;
42 45 status = "okay";
43 46 };
44 47  
... ... @@ -50,6 +53,31 @@
50 53 usb1: gadget@fff78000 {
51 54 atmel,vbus-gpio = <&pioA 25 0>;
52 55 status = "okay";
  56 + };
  57 +
  58 + mmc0: mmc@fff80000 {
  59 + pinctrl-0 = <
  60 + &pinctrl_board_mmc0
  61 + &pinctrl_mmc0_clk
  62 + &pinctrl_mmc0_slot0_cmd_dat0
  63 + &pinctrl_mmc0_slot0_dat1_3>;
  64 + status = "okay";
  65 + slot@0 {
  66 + reg = <0>;
  67 + bus-width = <4>;
  68 + cd-gpios = <&pioE 18 0>;
  69 + wp-gpios = <&pioE 19 0>;
  70 + };
  71 + };
  72 +
  73 + pinctrl@fffff200 {
  74 + mmc0 {
  75 + pinctrl_board_mmc0: mmc0-board {
  76 + atmel,pins =
  77 + <5 18 0x0 0x5 /* PE18 gpio CD pin pull up and deglitch */
  78 + 5 19 0x0 0x1>; /* PE19 gpio WP pin pull up */
  79 + };
  80 + };
53 81 };
54 82 };
55 83  
arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
Diff comments   View file @ 5f007db
... ... @@ -12,6 +12,32 @@
12 12 model = "Atmel at91sam9g20ek 2 mmc";
13 13 compatible = "atmel,at91sam9g20ek_2mmc", "atmel,at91sam9g20", "atmel,at91sam9";
14 14  
  15 + ahb {
  16 + apb{
  17 + mmc0: mmc@fffa8000 {
  18 + /* clk already mux wuth slot0 */
  19 + pinctrl-0 = <
  20 + &pinctrl_board_mmc0_slot0
  21 + &pinctrl_mmc0_slot0_cmd_dat0
  22 + &pinctrl_mmc0_slot0_dat1_3>;
  23 + slot@0 {
  24 + reg = <0>;
  25 + bus-width = <4>;
  26 + cd-gpios = <&pioC 2 0>;
  27 + };
  28 + };
  29 +
  30 + pinctrl@fffff400 {
  31 + mmc0_slot0 {
  32 + pinctrl_board_mmc0_slot0: mmc0_slot0-board {
  33 + atmel,pins =
  34 + <2 2 0x0 0x5>; /* PC2 gpio CD pin pull up and deglitch */
  35 + };
  36 + };
  37 + };
  38 + };
  39 + };
  40 +
15 41 leds {
16 42 compatible = "gpio-leds";
17 43  
arch/arm/boot/dts/at91sam9g20ek_common.dtsi
Diff comments   View file @ 5f007db
... ... @@ -36,11 +36,12 @@
36 36  
37 37 usart0: serial@fffb0000 {
38 38 pinctrl-0 =
39   - <&pinctrl_uart0
40   - &pinctrl_uart0_rts_cts
41   - &pinctrl_uart0_dtr_dsr
42   - &pinctrl_uart0_dcd
43   - &pinctrl_uart0_ri>;
  39 + <&pinctrl_usart0
  40 + &pinctrl_usart0_rts
  41 + &pinctrl_usart0_cts
  42 + &pinctrl_usart0_dtr_dsr
  43 + &pinctrl_usart0_dcd
  44 + &pinctrl_usart0_ri>;
44 45 status = "okay";
45 46 };
46 47  
... ... @@ -56,6 +57,29 @@
56 57 usb1: gadget@fffa4000 {
57 58 atmel,vbus-gpio = <&pioC 5 0>;
58 59 status = "okay";
  60 + };
  61 +
  62 + mmc0: mmc@fffa8000 {
  63 + pinctrl-0 = <
  64 + &pinctrl_board_mmc0_slot1
  65 + &pinctrl_mmc0_clk
  66 + &pinctrl_mmc0_slot1_cmd_dat0
  67 + &pinctrl_mmc0_slot1_dat1_3>;
  68 + status = "okay";
  69 + slot@1 {
  70 + reg = <1>;
  71 + bus-width = <4>;
  72 + cd-gpios = <&pioC 9 0>;
  73 + };
  74 + };
  75 +
  76 + pinctrl@fffff400 {
  77 + mmc0_slot1 {
  78 + pinctrl_board_mmc0_slot1: mmc0_slot1-board {
  79 + atmel,pins =
  80 + <2 9 0x0 0x5>; /* PC9 gpio CD pin pull up and deglitch */
  81 + };
  82 + };
59 83 };
60 84 };
61 85  
arch/arm/boot/dts/at91sam9g45.dtsi
Diff comments   View file @ 5f007db
... ... @@ -132,60 +132,76 @@
132 132 };
133 133 };
134 134  
135   - uart0 {
136   - pinctrl_uart0: uart0-0 {
  135 + usart0 {
  136 + pinctrl_usart0: usart0-0 {
137 137 atmel,pins =
138 138 <1 19 0x1 0x1 /* PB19 periph A with pullup */
139 139 1 18 0x1 0x0>; /* PB18 periph A */
140 140 };
141 141  
142   - pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
  142 + pinctrl_usart0_rts: usart0_rts-0 {
143 143 atmel,pins =
144   - <1 17 0x2 0x0 /* PB17 periph B */
145   - 1 15 0x2 0x0>; /* PB15 periph B */
  144 + <1 17 0x2 0x0>; /* PB17 periph B */
146 145 };
  146 +
  147 + pinctrl_usart0_cts: usart0_cts-0 {
  148 + atmel,pins =
  149 + <1 15 0x2 0x0>; /* PB15 periph B */
  150 + };
147 151 };
148 152  
149 153 uart1 {
150   - pinctrl_uart1: uart1-0 {
  154 + pinctrl_usart1: usart1-0 {
151 155 atmel,pins =
152 156 <1 4 0x1 0x1 /* PB4 periph A with pullup */
153 157 1 5 0x1 0x0>; /* PB5 periph A */
154 158 };
155 159  
156   - pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
  160 + pinctrl_usart1_rts: usart1_rts-0 {
157 161 atmel,pins =
158   - <3 16 0x1 0x0 /* PD16 periph A */
159   - 3 17 0x1 0x0>; /* PD17 periph A */
  162 + <3 16 0x1 0x0>; /* PD16 periph A */
160 163 };
  164 +
  165 + pinctrl_usart1_cts: usart1_cts-0 {
  166 + atmel,pins =
  167 + <3 17 0x1 0x0>; /* PD17 periph A */
  168 + };
161 169 };
162 170  
163   - uart2 {
164   - pinctrl_uart2: uart2-0 {
  171 + usart2 {
  172 + pinctrl_usart2: usart2-0 {
165 173 atmel,pins =
166 174 <1 6 0x1 0x1 /* PB6 periph A with pullup */
167 175 1 7 0x1 0x0>; /* PB7 periph A */
168 176 };
169 177  
170   - pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
  178 + pinctrl_usart2_rts: usart2_rts-0 {
171 179 atmel,pins =
172   - <2 9 0x2 0x0 /* PC9 periph B */
173   - 2 11 0x2 0x0>; /* PC11 periph B */
  180 + <2 9 0x2 0x0>; /* PC9 periph B */
174 181 };
  182 +
  183 + pinctrl_usart2_cts: usart2_cts-0 {
  184 + atmel,pins =
  185 + <2 11 0x2 0x0>; /* PC11 periph B */
  186 + };
175 187 };
176 188  
177   - uart3 {
178   - pinctrl_uart3: uart3-0 {
  189 + usart3 {
  190 + pinctrl_usart3: usart3-0 {
179 191 atmel,pins =
180 192 <1 8 0x1 0x1 /* PB9 periph A with pullup */
181 193 1 9 0x1 0x0>; /* PB8 periph A */
182 194 };
183 195  
184   - pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
  196 + pinctrl_usart3_rts: usart3_rts-0 {
185 197 atmel,pins =
186   - <0 23 0x2 0x0 /* PA23 periph B */
187   - 0 24 0x2 0x0>; /* PA24 periph B */
  198 + <0 23 0x2 0x0>; /* PA23 periph B */
188 199 };
  200 +
  201 + pinctrl_usart3_cts: usart3_cts-0 {
  202 + atmel,pins =
  203 + <0 24 0x2 0x0>; /* PA24 periph B */
  204 + };
189 205 };
190 206  
191 207 nand {
... ... @@ -196,6 +212,82 @@
196 212 };
197 213 };
198 214  
  215 + macb {
  216 + pinctrl_macb_rmii: macb_rmii-0 {
  217 + atmel,pins =
  218 + <0 10 0x1 0x0 /* PA10 periph A */
  219 + 0 11 0x1 0x0 /* PA11 periph A */
  220 + 0 12 0x1 0x0 /* PA12 periph A */
  221 + 0 13 0x1 0x0 /* PA13 periph A */
  222 + 0 14 0x1 0x0 /* PA14 periph A */
  223 + 0 15 0x1 0x0 /* PA15 periph A */
  224 + 0 16 0x1 0x0 /* PA16 periph A */
  225 + 0 17 0x1 0x0 /* PA17 periph A */
  226 + 0 18 0x1 0x0 /* PA18 periph A */
  227 + 0 19 0x1 0x0>; /* PA19 periph A */
  228 + };
  229 +
  230 + pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
  231 + atmel,pins =
  232 + <0 6 0x2 0x0 /* PA6 periph B */
  233 + 0 7 0x2 0x0 /* PA7 periph B */
  234 + 0 8 0x2 0x0 /* PA8 periph B */
  235 + 0 9 0x2 0x0 /* PA9 periph B */
  236 + 0 27 0x2 0x0 /* PA27 periph B */
  237 + 0 28 0x2 0x0 /* PA28 periph B */
  238 + 0 29 0x2 0x0 /* PA29 periph B */
  239 + 0 30 0x2 0x0>; /* PA30 periph B */
  240 + };
  241 + };
  242 +
  243 + mmc0 {
  244 + pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
  245 + atmel,pins =
  246 + <0 0 0x1 0x0 /* PA0 periph A */
  247 + 0 1 0x1 0x1 /* PA1 periph A with pullup */
  248 + 0 2 0x1 0x1>; /* PA2 periph A with pullup */
  249 + };
  250 +
  251 + pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
  252 + atmel,pins =
  253 + <0 3 0x1 0x1 /* PA3 periph A with pullup */
  254 + 0 4 0x1 0x1 /* PA4 periph A with pullup */
  255 + 0 5 0x1 0x1>; /* PA5 periph A with pullup */
  256 + };
  257 +
  258 + pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
  259 + atmel,pins =
  260 + <0 6 0x1 0x1 /* PA6 periph A with pullup */
  261 + 0 7 0x1 0x1 /* PA7 periph A with pullup */
  262 + 0 8 0x1 0x1 /* PA8 periph A with pullup */
  263 + 0 9 0x1 0x1>; /* PA9 periph A with pullup */
  264 + };
  265 + };
  266 +
  267 + mmc1 {
  268 + pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
  269 + atmel,pins =
  270 + <0 31 0x1 0x0 /* PA31 periph A */
  271 + 0 22 0x1 0x1 /* PA22 periph A with pullup */
  272 + 0 23 0x1 0x1>; /* PA23 periph A with pullup */
  273 + };
  274 +
  275 + pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
  276 + atmel,pins =
  277 + <0 24 0x1 0x1 /* PA24 periph A with pullup */
  278 + 0 25 0x1 0x1 /* PA25 periph A with pullup */
  279 + 0 26 0x1 0x1>; /* PA26 periph A with pullup */
  280 + };
  281 +
  282 + pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
  283 + atmel,pins =
  284 + <0 27 0x1 0x1 /* PA27 periph A with pullup */
  285 + 0 28 0x1 0x1 /* PA28 periph A with pullup */
  286 + 0 29 0x1 0x1 /* PA29 periph A with pullup */
  287 + 0 20 0x1 0x1>; /* PA30 periph A with pullup */
  288 + };
  289 + };
  290 +
199 291 pioA: gpio@fffff200 {
200 292 compatible = "atmel,at91rm9200-gpio";
201 293 reg = <0xfffff200 0x200>;
... ... @@ -263,7 +355,7 @@
263 355 atmel,use-dma-rx;
264 356 atmel,use-dma-tx;
265 357 pinctrl-names = "default";
266   - pinctrl-0 = <&pinctrl_uart0>;
  358 + pinctrl-0 = <&pinctrl_usart0>;
267 359 status = "disabled";
268 360 };
269 361  
... ... @@ -274,7 +366,7 @@
274 366 atmel,use-dma-rx;
275 367 atmel,use-dma-tx;
276 368 pinctrl-names = "default";
277   - pinctrl-0 = <&pinctrl_uart1>;
  369 + pinctrl-0 = <&pinctrl_usart1>;
278 370 status = "disabled";
279 371 };
280 372  
... ... @@ -285,7 +377,7 @@
285 377 atmel,use-dma-rx;
286 378 atmel,use-dma-tx;
287 379 pinctrl-names = "default";
288   - pinctrl-0 = <&pinctrl_uart2>;
  380 + pinctrl-0 = <&pinctrl_usart2>;
289 381 status = "disabled";
290 382 };
291 383  
... ... @@ -296,7 +388,7 @@
296 388 atmel,use-dma-rx;
297 389 atmel,use-dma-tx;
298 390 pinctrl-names = "default";
299   - pinctrl-0 = <&pinctrl_uart3>;
  391 + pinctrl-0 = <&pinctrl_usart3>;
300 392 status = "disabled";
301 393 };
302 394  
... ... @@ -304,6 +396,8 @@
304 396 compatible = "cdns,at32ap7000-macb", "cdns,macb";
305 397 reg = <0xfffbc000 0x100>;
306 398 interrupts = <25 4 3>;
  399 + pinctrl-names = "default";
  400 + pinctrl-0 = <&pinctrl_macb_rmii>;
307 401 status = "disabled";
308 402 };
309 403  
... ... @@ -360,6 +454,24 @@
360 454 trigger-name = "continuous";
361 455 trigger-value = <0x6>;
362 456 };
  457 + };
  458 +
  459 + mmc0: mmc@fff80000 {
  460 + compatible = "atmel,hsmci";
  461 + reg = <0xfff80000 0x600>;
  462 + interrupts = <11 4 0>;
  463 + #address-cells = <1>;
  464 + #size-cells = <0>;
  465 + status = "disabled";
  466 + };
  467 +
  468 + mmc1: mmc@fffd0000 {
  469 + compatible = "atmel,hsmci";
  470 + reg = <0xfffd0000 0x600>;
  471 + interrupts = <29 4 0>;
  472 + #address-cells = <1>;
  473 + #size-cells = <0>;
  474 + status = "disabled";
363 475 };
364 476 };
365 477  
arch/arm/boot/dts/at91sam9m10g45ek.dts
Diff comments   View file @ 5f007db
... ... @@ -39,7 +39,10 @@
39 39 };
40 40  
41 41 usart1: serial@fff90000 {
42   - pinctrl-0 = <&pinctrl_uart0 &pinctrl_uart1_rts_cts>;
  42 + pinctrl-0 =
  43 + <&pinctrl_usart1
  44 + &pinctrl_usart1_rts
  45 + &pinctrl_usart1_cts>;
43 46 status = "okay";
44 47 };
45 48  
... ... @@ -54,6 +57,50 @@
54 57  
55 58 i2c1: i2c@fff88000 {
56 59 status = "okay";
  60 + };
  61 +
  62 + mmc0: mmc@fff80000 {
  63 + pinctrl-0 = <
  64 + &pinctrl_board_mmc0
  65 + &pinctrl_mmc0_slot0_clk_cmd_dat0
  66 + &pinctrl_mmc0_slot0_dat1_3>;
  67 + status = "okay";
  68 + slot@0 {
  69 + reg = <0>;
  70 + bus-width = <4>;
  71 + cd-gpios = <&pioD 10 0>;
  72 + };
  73 + };
  74 +
  75 + mmc1: mmc@fffd0000 {
  76 + pinctrl-0 = <
  77 + &pinctrl_board_mmc1
  78 + &pinctrl_mmc1_slot0_clk_cmd_dat0
  79 + &pinctrl_mmc1_slot0_dat1_3>;
  80 + status = "okay";
  81 + slot@0 {
  82 + reg = <0>;
  83 + bus-width = <4>;
  84 + cd-gpios = <&pioD 11 0>;
  85 + wp-gpios = <&pioD 29 0>;
  86 + };
  87 + };
  88 +
  89 + pinctrl@fffff200 {
  90 + mmc0 {
  91 + pinctrl_board_mmc0: mmc0-board {
  92 + atmel,pins =
  93 + <3 10 0x0 0x5>; /* PD10 gpio CD pin pull up and deglitch */
  94 + };
  95 + };
  96 +
  97 + mmc1 {
  98 + pinctrl_board_mmc1: mmc1-board {
  99 + atmel,pins =
  100 + <3 11 0x0 0x5 /* PD11 gpio CD pin pull up and deglitch */
  101 + 3 29 0x0 0x1>; /* PD29 gpio WP pin pull up */
  102 + };
  103 + };
57 104 };
58 105 };
59 106  
arch/arm/boot/dts/at91sam9n12.dtsi
Diff comments   View file @ 5f007db
... ... @@ -84,6 +84,15 @@
84 84 reg = <0xfffffe10 0x10>;
85 85 };
86 86  
  87 + mmc0: mmc@f0008000 {
  88 + compatible = "atmel,hsmci";
  89 + reg = <0xf0008000 0x600>;
  90 + interrupts = <12 4 0>;
  91 + #address-cells = <1>;
  92 + #size-cells = <0>;
  93 + status = "disabled";
  94 + };
  95 +
87 96 tcb0: timer@f8008000 {
88 97 compatible = "atmel,at91sam9x5-tcb";
89 98 reg = <0xf8008000 0x100>;
90 99  
91 100  
92 101  
93 102  
94 103  
95 104  
96 105  
97 106  
98 107  
99 108  
100 109  
101 110  
102 111  
103 112  
... ... @@ -125,66 +134,78 @@
125 134 };
126 135 };
127 136  
128   - uart0 {
129   - pinctrl_uart0: uart0-0 {
  137 + usart0 {
  138 + pinctrl_usart0: usart0-0 {
130 139 atmel,pins =
131 140 <0 1 0x1 0x1 /* PA1 periph A with pullup */
132 141 0 0 0x1 0x0>; /* PA0 periph A */
133 142 };
134 143  
135   - pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
  144 + pinctrl_usart0_rts: usart0_rts-0 {
136 145 atmel,pins =
137   - <0 2 0x1 0x0 /* PA2 periph A */
138   - 0 3 0x1 0x0>; /* PA3 periph A */
  146 + <0 2 0x1 0x0>; /* PA2 periph A */
139 147 };
  148 +
  149 + pinctrl_usart0_cts: usart0_cts-0 {
  150 + atmel,pins =
  151 + <0 3 0x1 0x0>; /* PA3 periph A */
  152 + };
140 153 };
141 154  
142   - uart1 {
143   - pinctrl_uart1: uart1-0 {
  155 + usart1 {
  156 + pinctrl_usart1: usart1-0 {
144 157 atmel,pins =
145 158 <0 6 0x1 0x1 /* PA6 periph A with pullup */
146 159 0 5 0x1 0x0>; /* PA5 periph A */
147 160 };
148 161 };
149 162  
150   - uart2 {
151   - pinctrl_uart2: uart2-0 {
  163 + usart2 {
  164 + pinctrl_usart2: usart2-0 {
152 165 atmel,pins =
153 166 <0 8 0x1 0x1 /* PA8 periph A with pullup */
154 167 0 7 0x1 0x0>; /* PA7 periph A */
155 168 };
156 169  
157   - pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
  170 + pinctrl_usart2_rts: usart2_rts-0 {
158 171 atmel,pins =
159   - <1 0 0x2 0x0 /* PB0 periph B */
160   - 1 1 0x2 0x0>; /* PB1 periph B */
  172 + <1 0 0x2 0x0>; /* PB0 periph B */
161 173 };
  174 +
  175 + pinctrl_usart2_cts: usart2_cts-0 {
  176 + atmel,pins =
  177 + <1 1 0x2 0x0>; /* PB1 periph B */
  178 + };
162 179 };
163 180  
164   - uart3 {
165   - pinctrl_uart3: uart3-0 {
  181 + usart3 {
  182 + pinctrl_usart3: usart3-0 {
166 183 atmel,pins =
167 184 <2 23 0x2 0x1 /* PC23 periph B with pullup */
168 185 2 22 0x2 0x0>; /* PC22 periph B */
169 186 };
170 187  
171   - pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
  188 + pinctrl_usart3_rts: usart3_rts-0 {
172 189 atmel,pins =
173   - <2 24 0x2 0x0 /* PC24 periph B */
174   - 2 25 0x2 0x0>; /* PC25 periph B */
  190 + <2 24 0x2 0x0>; /* PC24 periph B */
175 191 };
  192 +
  193 + pinctrl_usart3_cts: usart3_cts-0 {
  194 + atmel,pins =
  195 + <2 25 0x2 0x0>; /* PC25 periph B */
  196 + };
176 197 };
177 198  
178   - usart0 {
179   - pinctrl_usart0: usart0-0 {
  199 + uart0 {
  200 + pinctrl_uart0: uart0-0 {
180 201 atmel,pins =
181 202 <2 9 0x3 0x1 /* PC9 periph C with pullup */
182 203 2 8 0x3 0x0>; /* PC8 periph C */
183 204 };
184 205 };
185 206  
186   - usart1 {
187   - pinctrl_usart1: usart1-0 {
  207 + uart1 {
  208 + pinctrl_uart1: uart1-0 {
188 209 atmel,pins =
189 210 <2 16 0x3 0x1 /* PC17 periph C with pullup */
190 211 2 17 0x3 0x0>; /* PC16 periph C */
... ... @@ -199,6 +220,30 @@
199 220 };
200 221 };
201 222  
  223 + mmc0 {
  224 + pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
  225 + atmel,pins =
  226 + <0 17 0x1 0x0 /* PA17 periph A */
  227 + 0 16 0x1 0x1 /* PA16 periph A with pullup */
  228 + 0 15 0x1 0x1>; /* PA15 periph A with pullup */
  229 + };
  230 +
  231 + pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
  232 + atmel,pins =
  233 + <0 18 0x1 0x1 /* PA18 periph A with pullup */
  234 + 0 19 0x1 0x1 /* PA19 periph A with pullup */
  235 + 0 20 0x1 0x1>; /* PA20 periph A with pullup */
  236 + };
  237 +
  238 + pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
  239 + atmel,pins =
  240 + <0 11 0x2 0x1 /* PA11 periph B with pullup */
  241 + 0 12 0x2 0x1 /* PA12 periph B with pullup */
  242 + 0 13 0x2 0x1 /* PA13 periph B with pullup */
  243 + 0 14 0x2 0x1>; /* PA14 periph B with pullup */
  244 + };
  245 + };
  246 +
202 247 pioA: gpio@fffff400 {
203 248 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
204 249 reg = <0xfffff400 0x200>;
... ... @@ -256,7 +301,7 @@
256 301 atmel,use-dma-rx;
257 302 atmel,use-dma-tx;
258 303 pinctrl-names = "default";
259   - pinctrl-0 = <&pinctrl_uart0>;
  304 + pinctrl-0 = <&pinctrl_usart0>;
260 305 status = "disabled";
261 306 };
262 307  
... ... @@ -267,7 +312,7 @@
267 312 atmel,use-dma-rx;
268 313 atmel,use-dma-tx;
269 314 pinctrl-names = "default";
270   - pinctrl-0 = <&pinctrl_uart1>;
  315 + pinctrl-0 = <&pinctrl_usart1>;
271 316 status = "disabled";
272 317 };
273 318  
... ... @@ -278,7 +323,7 @@
278 323 atmel,use-dma-rx;
279 324 atmel,use-dma-tx;
280 325 pinctrl-names = "default";
281   - pinctrl-0 = <&pinctrl_uart2>;
  326 + pinctrl-0 = <&pinctrl_usart2>;
282 327 status = "disabled";
283 328 };
284 329  
... ... @@ -289,7 +334,7 @@
289 334 atmel,use-dma-rx;
290 335 atmel,use-dma-tx;
291 336 pinctrl-names = "default";
292   - pinctrl-0 = <&pinctrl_uart3>;
  337 + pinctrl-0 = <&pinctrl_usart3>;
293 338 status = "disabled";
294 339 };
295 340  
arch/arm/boot/dts/at91sam9n12ek.dts
Diff comments   View file @ 5f007db
... ... @@ -45,6 +45,28 @@
45 45 i2c1: i2c@f8014000 {
46 46 status = "okay";
47 47 };
  48 +
  49 + mmc0: mmc@f0008000 {
  50 + pinctrl-0 = <
  51 + &pinctrl_board_mmc0
  52 + &pinctrl_mmc0_slot0_clk_cmd_dat0
  53 + &pinctrl_mmc0_slot0_dat1_3>;
  54 + status = "okay";
  55 + slot@0 {
  56 + reg = <0>;
  57 + bus-width = <4>;
  58 + cd-gpios = <&pioA 7 0>;
  59 + };
  60 + };
  61 +
  62 + pinctrl@fffff400 {
  63 + mmc0 {
  64 + pinctrl_board_mmc0: mmc0-board {
  65 + atmel,pins =
  66 + <0 7 0x0 0x5>; /* PA7 gpio CD pin pull up and deglitch */
  67 + };
  68 + };
  69 + };
48 70 };
49 71  
50 72 nand0: nand@40000000 {
arch/arm/boot/dts/at91sam9x25.dtsi
Diff comments   View file @ 5f007db
... ... @@ -22,6 +22,27 @@
22 22 0x80000000 0xfffd0000 0xb83fffff /* pioC */
23 23 0x003fffff 0x003f8000 0x00000000 /* pioD */
24 24 >;
  25 +
  26 + macb1 {
  27 + pinctrl_macb1_rmii: macb1_rmii-0 {
  28 + atmel,pins =
  29 + <2 16 0x2 0x0 /* PC16 periph B */
  30 + 2 18 0x2 0x0 /* PC18 periph B */
  31 + 2 19 0x2 0x0 /* PC19 periph B */
  32 + 2 20 0x2 0x0 /* PC20 periph B */
  33 + 2 21 0x2 0x0 /* PC21 periph B */
  34 + 2 27 0x2 0x0 /* PC27 periph B */
  35 + 2 28 0x2 0x0 /* PC28 periph B */
  36 + 2 29 0x2 0x0 /* PC29 periph B */
  37 + 2 30 0x2 0x0 /* PC30 periph B */
  38 + 2 31 0x2 0x0>; /* PC31 periph B */
  39 + };
  40 + };
  41 + };
  42 +
  43 + macb1: ethernet@f8030000 {
  44 + pinctrl-names = "default";
  45 + pinctrl-0 = <&pinctrl_macb1_rmii>;
25 46 };
26 47 };
27 48 };
arch/arm/boot/dts/at91sam9x5.dtsi
Diff comments   View file @ 5f007db
... ... @@ -126,72 +126,88 @@
126 126 };
127 127 };
128 128  
129   - uart0 {
130   - pinctrl_uart0: uart0-0 {
  129 + usart0 {
  130 + pinctrl_usart0: usart0-0 {
131 131 atmel,pins =
132 132 <0 0 0x1 0x1 /* PA0 periph A with pullup */
133 133 0 1 0x1 0x0>; /* PA1 periph A */
134 134 };
135 135  
136   - pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
  136 + pinctrl_usart0_rts: usart0_rts-0 {
137 137 atmel,pins =
138   - <0 2 0x1 0x0 /* PA2 periph A */
139   - 0 3 0x1 0x0>; /* PA3 periph A */
  138 + <0 2 0x1 0x0>; /* PA2 periph A */
140 139 };
  140 +
  141 + pinctrl_usart0_cts: usart0_cts-0 {
  142 + atmel,pins =
  143 + <0 3 0x1 0x0>; /* PA3 periph A */
  144 + };
141 145 };
142 146  
143   - uart1 {
144   - pinctrl_uart1: uart1-0 {
  147 + usart1 {
  148 + pinctrl_usart1: usart1-0 {
145 149 atmel,pins =
146 150 <0 5 0x1 0x1 /* PA5 periph A with pullup */
147 151 0 6 0x1 0x0>; /* PA6 periph A */
148 152 };
149 153  
150   - pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
  154 + pinctrl_usart1_rts: usart1_rts-0 {
151 155 atmel,pins =
152   - <3 27 0x3 0x0 /* PC27 periph C */
153   - 3 28 0x3 0x0>; /* PC28 periph C */
  156 + <3 27 0x3 0x0>; /* PC27 periph C */
154 157 };
  158 +
  159 + pinctrl_usart1_cts: usart1_cts-0 {
  160 + atmel,pins =
  161 + <3 28 0x3 0x0>; /* PC28 periph C */
  162 + };
155 163 };
156 164  
157   - uart2 {
158   - pinctrl_uart2: uart2-0 {
  165 + usart2 {
  166 + pinctrl_usart2: usart2-0 {
159 167 atmel,pins =
160 168 <0 7 0x1 0x1 /* PA7 periph A with pullup */
161 169 0 8 0x1 0x0>; /* PA8 periph A */
162 170 };
163 171  
164   - pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
  172 + pinctrl_uart2_rts: uart2_rts-0 {
165 173 atmel,pins =
166   - <0 0 0x2 0x0 /* PB0 periph B */
167   - 0 1 0x2 0x0>; /* PB1 periph B */
  174 + <0 0 0x2 0x0>; /* PB0 periph B */
168 175 };
  176 +
  177 + pinctrl_uart2_cts: uart2_cts-0 {
  178 + atmel,pins =
  179 + <0 1 0x2 0x0>; /* PB1 periph B */
  180 + };
169 181 };
170 182  
171   - uart3 {
172   - pinctrl_uart3: uart3-0 {
  183 + usart3 {
  184 + pinctrl_uart3: usart3-0 {
173 185 atmel,pins =
174 186 <3 23 0x2 0x1 /* PC22 periph B with pullup */
175 187 3 23 0x2 0x0>; /* PC23 periph B */
176 188 };
177 189  
178   - pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
  190 + pinctrl_usart3_rts: usart3_rts-0 {
179 191 atmel,pins =
180   - <3 24 0x2 0x0 /* PC24 periph B */
181   - 3 25 0x2 0x0>; /* PC25 periph B */
  192 + <3 24 0x2 0x0>; /* PC24 periph B */
182 193 };
  194 +
  195 + pinctrl_usart3_cts: usart3_cts-0 {
  196 + atmel,pins =
  197 + <3 25 0x2 0x0>; /* PC25 periph B */
  198 + };
183 199 };
184 200  
185   - usart0 {
186   - pinctrl_usart0: usart0-0 {
  201 + uart0 {
  202 + pinctrl_uart0: uart0-0 {
187 203 atmel,pins =
188 204 <3 8 0x3 0x0 /* PC8 periph C */
189 205 3 9 0x3 0x1>; /* PC9 periph C with pullup */
190 206 };
191 207 };
192 208  
193   - usart1 {
194   - pinctrl_usart1: usart1-0 {
  209 + uart1 {
  210 + pinctrl_uart1: uart1-0 {
195 211 atmel,pins =
196 212 <3 16 0x3 0x0 /* PC16 periph C */
197 213 3 17 0x3 0x1>; /* PC17 periph C with pullup */
... ... @@ -206,6 +222,66 @@
206 222 };
207 223 };
208 224  
  225 + macb0 {
  226 + pinctrl_macb0_rmii: macb0_rmii-0 {
  227 + atmel,pins =
  228 + <1 0 0x1 0x0 /* PB0 periph A */
  229 + 1 1 0x1 0x0 /* PB1 periph A */
  230 + 1 2 0x1 0x0 /* PB2 periph A */
  231 + 1 3 0x1 0x0 /* PB3 periph A */
  232 + 1 4 0x1 0x0 /* PB4 periph A */
  233 + 1 5 0x1 0x0 /* PB5 periph A */
  234 + 1 6 0x1 0x0 /* PB6 periph A */
  235 + 1 7 0x1 0x0 /* PB7 periph A */
  236 + 1 9 0x1 0x0 /* PB9 periph A */
  237 + 1 10 0x1 0x0>; /* PB10 periph A */
  238 + };
  239 +
  240 + pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
  241 + atmel,pins =
  242 + <1 8 0x1 0x0 /* PA8 periph A */
  243 + 1 11 0x1 0x0 /* PA11 periph A */
  244 + 1 12 0x1 0x0 /* PA12 periph A */
  245 + 1 13 0x1 0x0 /* PA13 periph A */
  246 + 1 14 0x1 0x0 /* PA14 periph A */
  247 + 1 15 0x1 0x0 /* PA15 periph A */
  248 + 1 16 0x1 0x0 /* PA16 periph A */
  249 + 1 17 0x1 0x0>; /* PA17 periph A */
  250 + };
  251 + };
  252 +
  253 + mmc0 {
  254 + pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
  255 + atmel,pins =
  256 + <0 17 0x1 0x0 /* PA17 periph A */
  257 + 0 16 0x1 0x1 /* PA16 periph A with pullup */
  258 + 0 15 0x1 0x1>; /* PA15 periph A with pullup */
  259 + };
  260 +
  261 + pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
  262 + atmel,pins =
  263 + <0 18 0x1 0x1 /* PA18 periph A with pullup */
  264 + 0 19 0x1 0x1 /* PA19 periph A with pullup */
  265 + 0 20 0x1 0x1>; /* PA20 periph A with pullup */
  266 + };
  267 + };
  268 +
  269 + mmc1 {
  270 + pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
  271 + atmel,pins =
  272 + <0 13 0x2 0x0 /* PA13 periph B */
  273 + 0 12 0x2 0x1 /* PA12 periph B with pullup */
  274 + 0 11 0x2 0x1>; /* PA11 periph B with pullup */
  275 + };
  276 +
  277 + pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
  278 + atmel,pins =
  279 + <0 2 0x2 0x1 /* PA2 periph B with pullup */
  280 + 0 3 0x2 0x1 /* PA3 periph B with pullup */
  281 + 0 4 0x2 0x1>; /* PA4 periph B with pullup */
  282 + };
  283 + };
  284 +
209 285 pioA: gpio@fffff400 {
210 286 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
211 287 reg = <0xfffff400 0x200>;
... ... @@ -249,6 +325,24 @@
249 325 };
250 326 };
251 327  
  328 + mmc0: mmc@f0008000 {
  329 + compatible = "atmel,hsmci";
  330 + reg = <0xf0008000 0x600>;
  331 + interrupts = <12 4 0>;
  332 + #address-cells = <1>;
  333 + #size-cells = <0>;
  334 + status = "disabled";
  335 + };
  336 +
  337 + mmc1: mmc@f000c000 {
  338 + compatible = "atmel,hsmci";
  339 + reg = <0xf000c000 0x600>;
  340 + interrupts = <26 4 0>;
  341 + #address-cells = <1>;
  342 + #size-cells = <0>;
  343 + status = "disabled";
  344 + };
  345 +
252 346 dbgu: serial@fffff200 {
253 347 compatible = "atmel,at91sam9260-usart";
254 348 reg = <0xfffff200 0x200>;
... ... @@ -265,7 +359,7 @@
265 359 atmel,use-dma-rx;
266 360 atmel,use-dma-tx;
267 361 pinctrl-names = "default";
268   - pinctrl-0 = <&pinctrl_uart0>;
  362 + pinctrl-0 = <&pinctrl_usart0>;
269 363 status = "disabled";
270 364 };
271 365  
... ... @@ -276,7 +370,7 @@
276 370 atmel,use-dma-rx;
277 371 atmel,use-dma-tx;
278 372 pinctrl-names = "default";
279   - pinctrl-0 = <&pinctrl_uart1>;
  373 + pinctrl-0 = <&pinctrl_usart1>;
280 374 status = "disabled";
281 375 };
282 376  
... ... @@ -287,7 +381,7 @@
287 381 atmel,use-dma-rx;
288 382 atmel,use-dma-tx;
289 383 pinctrl-names = "default";
290   - pinctrl-0 = <&pinctrl_uart2>;
  384 + pinctrl-0 = <&pinctrl_usart2>;
291 385 status = "disabled";
292 386 };
293 387  
... ... @@ -295,6 +389,8 @@
295 389 compatible = "cdns,at32ap7000-macb", "cdns,macb";
296 390 reg = <0xf802c000 0x100>;
297 391 interrupts = <24 4 3>;
  392 + pinctrl-names = "default";
  393 + pinctrl-0 = <&pinctrl_macb0_rmii>;
298 394 status = "disabled";
299 395 };
300 396  
arch/arm/boot/dts/at91sam9x5ek.dtsi
Diff comments   View file @ 5f007db
... ... @@ -18,6 +18,32 @@
18 18  
19 19 ahb {
20 20 apb {
  21 + mmc0: mmc@f0008000 {
  22 + pinctrl-0 = <
  23 + &pinctrl_board_mmc0
  24 + &pinctrl_mmc0_slot0_clk_cmd_dat0
  25 + &pinctrl_mmc0_slot0_dat1_3>;
  26 + status = "okay";
  27 + slot@0 {
  28 + reg = <0>;
  29 + bus-width = <4>;
  30 + cd-gpios = <&pioD 15 0>;
  31 + };
  32 + };
  33 +
  34 + mmc1: mmc@f000c000 {
  35 + pinctrl-0 = <
  36 + &pinctrl_board_mmc1
  37 + &pinctrl_mmc1_slot0_clk_cmd_dat0
  38 + &pinctrl_mmc1_slot0_dat1_3>;
  39 + status = "okay";
  40 + slot@0 {
  41 + reg = <0>;
  42 + bus-width = <4>;
  43 + cd-gpios = <&pioD 14 0>;
  44 + };
  45 + };
  46 +
21 47 dbgu: serial@fffff200 {
22 48 status = "okay";
23 49 };
... ... @@ -41,6 +67,22 @@
41 67  
42 68 i2c2: i2c@f8018000 {
43 69 status = "okay";
  70 + };
  71 +
  72 + pinctrl@fffff400 {
  73 + mmc0 {
  74 + pinctrl_board_mmc0: mmc0-board {
  75 + atmel,pins =
  76 + <3 15 0x0 0x5>; /* PD15 gpio CD pin pull up and deglitch */
  77 + };
  78 + };
  79 +
  80 + mmc1 {
  81 + pinctrl_board_mmc1: mmc1-board {
  82 + atmel,pins =
  83 + <3 14 0x0 0x5>; /* PD14 gpio CD pin pull up and deglitch */
  84 + };
  85 + };
44 86 };
45 87 };
46 88  
arch/arm/boot/dts/pm9g45.dts
Diff comments   View file @ 5f007db
  1 +/*
  2 + * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
  3 + *
  4 + * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  5 + *
  6 + * Licensed under GPLv2.
  7 + */
  8 +/dts-v1/;
  9 +/include/ "at91sam9g45.dtsi"
  10 +
  11 +/ {
  12 + model = "Ronetix pm9g45";
  13 + compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
  14 +
  15 + chosen {
  16 + bootargs = "console=ttyS0,115200";
  17 + };
  18 +
  19 + memory {
  20 + reg = <0x70000000 0x8000000>;
  21 + };
  22 +
  23 + clocks {
  24 + #address-cells = <1>;
  25 + #size-cells = <1>;
  26 + ranges;
  27 +
  28 + main_clock: clock@0 {
  29 + compatible = "atmel,osc", "fixed-clock";
  30 + clock-frequency = <12000000>;
  31 + };
  32 + };
  33 +
  34 + ahb {
  35 + apb {
  36 + dbgu: serial@ffffee00 {
  37 + status = "okay";
  38 + };
  39 +
  40 + pinctrl@fffff200 {
  41 +
  42 + board {
  43 + pinctrl_board_nand: nand0-board {
  44 + atmel,pins =
  45 + <3 3 0x0 0x1 /* PD3 gpio RDY pin pull_up*/
  46 + 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
  47 + };
  48 + };
  49 +
  50 + mmc {
  51 + pinctrl_board_mmc: mmc0-board {
  52 + atmel,pins =
  53 + <3 6 0x0 0x5>; /* PD6 gpio CD pin pull_up and deglitch */
  54 + };
  55 + };
  56 + };
  57 +
  58 + mmc0: mmc@fff80000 {
  59 + pinctrl-0 = <
  60 + &pinctrl_board_mmc
  61 + &pinctrl_mmc0_slot0_clk_cmd_dat0
  62 + &pinctrl_mmc0_slot0_dat1_3>;
  63 + status = "okay";
  64 + slot@0 {
  65 + reg = <0>;
  66 + bus-width = <4>;
  67 + cd-gpios = <&pioD 6 0>;
  68 + };
  69 + };
  70 +
  71 + macb0: ethernet@fffbc000 {
  72 + phy-mode = "rmii";
  73 + status = "okay";
  74 + };
  75 +
  76 + };
  77 +
  78 + nand0: nand@40000000 {
  79 + nand-bus-width = <8>;
  80 + nand-ecc-mode = "soft";
  81 + nand-on-flash-bbt;
  82 + pinctrl-0 = <&pinctrl_board_nand>;
  83 +
  84 + gpios = <&pioD 3 0
  85 + &pioC 14 0
  86 + 0
  87 + >;
  88 +
  89 + status = "okay";
  90 +
  91 + at91bootstrap@0 {
  92 + label = "at91bootstrap";
  93 + reg = <0x0 0x20000>;
  94 + };
  95 +
  96 + barebox@20000 {
  97 + label = "barebox";
  98 + reg = <0x20000 0x40000>;
  99 + };
  100 +
  101 + bareboxenv@60000 {
  102 + label = "bareboxenv";
  103 + reg = <0x60000 0x1A0000>;
  104 + };
  105 +
  106 + kernel@200000 {
  107 + label = "bareboxenv2";
  108 + reg = <0x200000 0x300000>;
  109 + };
  110 +
  111 + kernel@500000 {
  112 + label = "root";
  113 + reg = <0x500000 0x400000>;
  114 + };
  115 +
  116 + data@900000 {
  117 + label = "data";
  118 + reg = <0x900000 0x8340000>;
  119 + };
  120 + };
  121 +
  122 + usb0: ohci@00700000 {
  123 + status = "okay";
  124 + num-ports = <2>;
  125 + };
  126 +
  127 + usb1: ehci@00800000 {
  128 + status = "okay";
  129 + };
  130 + };
  131 +
  132 + leds {
  133 + compatible = "gpio-leds";
  134 +
  135 + led0 {
  136 + label = "led0";
  137 + gpios = <&pioD 0 1>;
  138 + linux,default-trigger = "nand-disk";
  139 + };
  140 +
  141 + led1 {
  142 + label = "led1";
  143 + gpios = <&pioD 31 0>;
  144 + linux,default-trigger = "heartbeat";
  145 + };
  146 + };
  147 +
  148 + gpio_keys {
  149 + compatible = "gpio-keys";
  150 + #address-cells = <1>;
  151 + #size-cells = <0>;
  152 +
  153 + right {
  154 + label = "SW4";
  155 + gpios = <&pioE 7 1>;
  156 + linux,code = <106>;
  157 + };
  158 +
  159 + up {
  160 + label = "SW3";
  161 + gpios = <&pioE 8 1>;
  162 + linux,code = <103>;
  163 + };
  164 + };
  165 +};
arch/arm/mach-at91/Kconfig
Diff comments   View file @ 5f007db
... ... @@ -494,8 +494,17 @@
494 494  
495 495 comment "Generic Board Type"
496 496  
  497 +config MACH_AT91RM9200_DT
  498 + bool "Atmel AT91RM9200 Evaluation Kits with device-tree support"
  499 + depends on SOC_AT91RM9200
  500 + select USE_OF
  501 + help
  502 + Select this if you want to experiment device-tree with
  503 + an Atmel RM9200 Evaluation Kit.
  504 +
497 505 config MACH_AT91SAM_DT
498 506 bool "Atmel AT91SAM Evaluation Kits with device-tree support"
  507 + depends on SOC_AT91SAM9
499 508 select USE_OF
500 509 help
501 510 Select this if you want to experiment device-tree with
arch/arm/mach-at91/Makefile
Diff comments   View file @ 5f007db
... ... @@ -88,6 +88,7 @@
88 88 obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
89 89  
90 90 # AT91SAM board with device-tree
  91 +obj-$(CONFIG_MACH_AT91RM9200_DT) += board-rm9200-dt.o
91 92 obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o
92 93  
93 94 # AT91X40 board-specific support
arch/arm/mach-at91/at91rm9200.c
Diff comments   View file @ 5f007db
... ... @@ -194,6 +194,24 @@
194 194 CLKDEV_CON_ID("pioB", &pioB_clk),
195 195 CLKDEV_CON_ID("pioC", &pioC_clk),
196 196 CLKDEV_CON_ID("pioD", &pioD_clk),
  197 + /* usart lookup table for DT entries */
  198 + CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
  199 + CLKDEV_CON_DEV_ID("usart", "fffc0000.serial", &usart0_clk),
  200 + CLKDEV_CON_DEV_ID("usart", "fffc4000.serial", &usart1_clk),
  201 + CLKDEV_CON_DEV_ID("usart", "fffc8000.serial", &usart2_clk),
  202 + CLKDEV_CON_DEV_ID("usart", "fffcc000.serial", &usart3_clk),
  203 + /* tc lookup table for DT entries */
  204 + CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
  205 + CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
  206 + CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
  207 + CLKDEV_CON_DEV_ID("t0_clk", "fffa4000.timer", &tc3_clk),
  208 + CLKDEV_CON_DEV_ID("t1_clk", "fffa4000.timer", &tc4_clk),
  209 + CLKDEV_CON_DEV_ID("t2_clk", "fffa4000.timer", &tc5_clk),
  210 + CLKDEV_CON_DEV_ID("hclk", "300000.ohci", &ohci_clk),
  211 + CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
  212 + CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
  213 + CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
  214 + CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
197 215 };
198 216  
199 217 static struct clk_lookup usart_clocks_lookups[] = {
arch/arm/mach-at91/at91rm9200_time.c
Diff comments   View file @ 5f007db
... ... @@ -24,6 +24,9 @@
24 24 #include <linux/irq.h>
25 25 #include <linux/clockchips.h>
26 26 #include <linux/export.h>
  27 +#include <linux/of.h>
  28 +#include <linux/of_address.h>
  29 +#include <linux/of_irq.h>
27 30  
28 31 #include <asm/mach/time.h>
29 32  
... ... @@ -91,7 +94,8 @@
91 94 static struct irqaction at91rm9200_timer_irq = {
92 95 .name = "at91_tick",
93 96 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
94   - .handler = at91rm9200_timer_interrupt
  97 + .handler = at91rm9200_timer_interrupt,
  98 + .irq = NR_IRQS_LEGACY + AT91_ID_SYS,
95 99 };
96 100  
97 101 static cycle_t read_clk32k(struct clocksource *cs)
98 102  
... ... @@ -179,8 +183,60 @@
179 183 void __iomem *at91_st_base;
180 184 EXPORT_SYMBOL_GPL(at91_st_base);
181 185  
  186 +#ifdef CONFIG_OF
  187 +static struct of_device_id at91rm9200_st_timer_ids[] = {
  188 + { .compatible = "atmel,at91rm9200-st" },
  189 + { /* sentinel */ }
  190 +};
  191 +
  192 +static int __init of_at91rm9200_st_init(void)
  193 +{
  194 + struct device_node *np;
  195 + int ret;
  196 +
  197 + np = of_find_matching_node(NULL, at91rm9200_st_timer_ids);
  198 + if (!np)
  199 + goto err;
  200 +
  201 + at91_st_base = of_iomap(np, 0);
  202 + if (!at91_st_base)
  203 + goto node_err;
  204 +
  205 + /* Get the interrupts property */
  206 + ret = irq_of_parse_and_map(np, 0);
  207 + if (!ret)
  208 + goto ioremap_err;
  209 + at91rm9200_timer_irq.irq = ret;
  210 +
  211 + of_node_put(np);
  212 +
  213 + return 0;
  214 +
  215 +ioremap_err:
  216 + iounmap(at91_st_base);
  217 +node_err:
  218 + of_node_put(np);
  219 +err:
  220 + return -EINVAL;
  221 +}
  222 +#else
  223 +static int __init of_at91rm9200_st_init(void)
  224 +{
  225 + return -EINVAL;
  226 +}
  227 +#endif
  228 +
182 229 void __init at91rm9200_ioremap_st(u32 addr)
183 230 {
  231 +#ifdef CONFIG_OF
  232 + struct device_node *np;
  233 +
  234 + np = of_find_matching_node(NULL, at91rm9200_st_timer_ids);
  235 + if (np) {
  236 + of_node_put(np);
  237 + return;
  238 + }
  239 +#endif
184 240 at91_st_base = ioremap(addr, 256);
185 241 if (!at91_st_base)
186 242 panic("Impossible to ioremap ST\n");
187 243  
... ... @@ -191,13 +247,16 @@
191 247 */
192 248 void __init at91rm9200_timer_init(void)
193 249 {
  250 + /* For device tree enabled device: initialize here */
  251 + of_at91rm9200_st_init();
  252 +
194 253 /* Disable all timer interrupts, and clear any pending ones */
195 254 at91_st_write(AT91_ST_IDR,
196 255 AT91_ST_PITS | AT91_ST_WDOVF | AT91_ST_RTTINC | AT91_ST_ALMS);
197 256 at91_st_read(AT91_ST_SR);
198 257  
199 258 /* Make IRQs happen for the system timer */
200   - setup_irq(NR_IRQS_LEGACY + AT91_ID_SYS, &at91rm9200_timer_irq);
  259 + setup_irq(at91rm9200_timer_irq.irq, &at91rm9200_timer_irq);
201 260  
202 261 /* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
203 262 * directly for the clocksource and all clockevents, after adjusting
arch/arm/mach-at91/at91sam9260.c
Diff comments   View file @ 5f007db
... ... @@ -230,6 +230,7 @@
230 230 CLKDEV_CON_DEV_ID("t1_clk", "fffdc000.timer", &tc4_clk),
231 231 CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
232 232 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
  233 + CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
233 234 /* fake hclk clock */
234 235 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
235 236 CLKDEV_CON_ID("pioA", &pioA_clk),
arch/arm/mach-at91/at91sam9263.c
Diff comments   View file @ 5f007db
... ... @@ -211,6 +211,8 @@
211 211 CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
212 212 CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
213 213 CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
  214 + CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
  215 + CLKDEV_CON_DEV_ID("mci_clk", "fff84000.mmc", &mmc1_clk),
214 216 CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
215 217 CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
216 218 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk),
arch/arm/mach-at91/at91sam9g45.c
Diff comments   View file @ 5f007db
... ... @@ -256,6 +256,8 @@
256 256 CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk),
257 257 CLKDEV_CON_DEV_ID("hclk", "700000.ohci", &uhphs_clk),
258 258 CLKDEV_CON_DEV_ID("ehci_clk", "800000.ehci", &uhphs_clk),
  259 + CLKDEV_CON_DEV_ID("mci_clk", "fff80000.mmc", &mmc0_clk),
  260 + CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk),
259 261 CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk),
260 262 CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
261 263 /* fake hclk clock */
arch/arm/mach-at91/at91sam9n12.c
Diff comments   View file @ 5f007db
... ... @@ -168,6 +168,7 @@
168 168 CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
169 169 CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb_clk),
170 170 CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb_clk),
  171 + CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc_clk),
171 172 CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
172 173 CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
173 174 CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
arch/arm/mach-at91/at91sam9x5.c
Diff comments   View file @ 5f007db
... ... @@ -229,6 +229,8 @@
229 229 CLKDEV_CON_DEV_ID("usart", "f8028000.serial", &usart3_clk),
230 230 CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb0_clk),
231 231 CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
  232 + CLKDEV_CON_DEV_ID("mci_clk", "f0008000.mmc", &mmc0_clk),
  233 + CLKDEV_CON_DEV_ID("mci_clk", "f000c000.mmc", &mmc1_clk),
232 234 CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk),
233 235 CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk),
234 236 CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
arch/arm/mach-at91/board-rm9200-dt.c
Diff comments   View file @ 5f007db
  1 +/*
  2 + * Setup code for AT91RM9200 Evaluation Kits with Device Tree support
  3 + *
  4 + * Copyright (C) 2011 Atmel,
  5 + * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
  6 + * 2012 Joachim Eastwood <manabian@gmail.com>
  7 + *
  8 + * Licensed under GPLv2 or later.
  9 + */
  10 +
  11 +#include <linux/types.h>
  12 +#include <linux/init.h>
  13 +#include <linux/module.h>
  14 +#include <linux/gpio.h>
  15 +#include <linux/of.h>
  16 +#include <linux/of_irq.h>
  17 +#include <linux/of_platform.h>
  18 +
  19 +#include <asm/setup.h>
  20 +#include <asm/irq.h>
  21 +#include <asm/mach/arch.h>
  22 +#include <asm/mach/map.h>
  23 +#include <asm/mach/irq.h>
  24 +
  25 +#include "at91_aic.h"
  26 +#include "generic.h"
  27 +
  28 +
  29 +static const struct of_device_id irq_of_match[] __initconst = {
  30 + { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
  31 + { /*sentinel*/ }
  32 +};
  33 +
  34 +static void __init at91rm9200_dt_init_irq(void)
  35 +{
  36 + of_irq_init(irq_of_match);
  37 +}
  38 +
  39 +static void __init at91rm9200_dt_device_init(void)
  40 +{
  41 + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  42 +}
  43 +
  44 +static const char *at91rm9200_dt_board_compat[] __initdata = {
  45 + "atmel,at91rm9200",
  46 + NULL
  47 +};
  48 +
  49 +DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)")
  50 + .timer = &at91rm9200_timer,
  51 + .map_io = at91_map_io,
  52 + .handle_irq = at91_aic_handle_irq,
  53 + .init_early = at91rm9200_dt_initialize,
  54 + .init_irq = at91rm9200_dt_init_irq,
  55 + .init_machine = at91rm9200_dt_device_init,
  56 + .dt_compat = at91rm9200_dt_board_compat,
  57 +MACHINE_END
arch/arm/mach-at91/generic.h
Diff comments   View file @ 5f007db
... ... @@ -20,6 +20,7 @@
20 20 extern void __init at91rm9200_set_type(int type);
21 21 extern void __init at91_initialize(unsigned long main_clock);
22 22 extern void __init at91x40_initialize(unsigned long main_clock);
  23 +extern void __init at91rm9200_dt_initialize(void);
23 24 extern void __init at91_dt_initialize(void);
24 25  
25 26 /* Interrupts */
arch/arm/mach-at91/setup.c
Diff comments   View file @ 5f007db
... ... @@ -339,6 +339,7 @@
339 339 }
340 340  
341 341 static struct of_device_id ramc_ids[] = {
  342 + { .compatible = "atmel,at91rm9200-sdramc" },
342 343 { .compatible = "atmel,at91sam9260-sdramc" },
343 344 { .compatible = "atmel,at91sam9g45-ddramc" },
344 345 { /*sentinel*/ }
... ... @@ -435,6 +436,19 @@
435 436 pm_power_off = at91sam9_poweroff;
436 437  
437 438 of_node_put(np);
  439 +}
  440 +
  441 +void __init at91rm9200_dt_initialize(void)
  442 +{
  443 + at91_dt_ramc();
  444 +
  445 + /* Init clock subsystem */
  446 + at91_dt_clock_init();
  447 +
  448 + /* Register the processor-specific clocks */
  449 + at91_boot_soc.register_clocks();
  450 +
  451 + at91_boot_soc.init();
438 452 }
439 453  
440 454 void __init at91_dt_initialize(void)
drivers/pinctrl/pinctrl-at91.c
Diff comments   View file @ 5f007db
... ... @@ -59,6 +59,12 @@
59 59  
60 60 #define PULL_UP (1 << 0)
61 61 #define MULTI_DRIVE (1 << 1)
  62 +#define DEGLITCH (1 << 2)
  63 +#define PULL_DOWN (1 << 3)
  64 +#define DIS_SCHMIT (1 << 4)
  65 +#define DEBOUNCE (1 << 16)
  66 +#define DEBOUNCE_VAL_SHIFT 17
  67 +#define DEBOUNCE_VAL (0x3fff << DEBOUNCE_VAL_SHIFT)
62 68  
63 69 /**
64 70 * struct at91_pmx_func - describes AT91 pinmux functions
... ... @@ -122,6 +128,14 @@
122 128 * @mux_B_periph: mux as periph B
123 129 * @mux_C_periph: mux as periph C
124 130 * @mux_D_periph: mux as periph D
  131 + * @get_deglitch: get deglitch status
  132 + * @set_deglitch: enable/disable deglitch
  133 + * @get_debounce: get debounce status
  134 + * @set_debounce: enable/disable debounce
  135 + * @get_pulldown: get pulldown status
  136 + * @set_pulldown: enable/disable pulldown
  137 + * @get_schmitt_trig: get schmitt trigger status
  138 + * @disable_schmitt_trig: disable schmitt trigger
125 139 * @irq_type: return irq type
126 140 */
127 141 struct at91_pinctrl_mux_ops {
... ... @@ -130,6 +144,14 @@
130 144 void (*mux_B_periph)(void __iomem *pio, unsigned mask);
131 145 void (*mux_C_periph)(void __iomem *pio, unsigned mask);
132 146 void (*mux_D_periph)(void __iomem *pio, unsigned mask);
  147 + bool (*get_deglitch)(void __iomem *pio, unsigned pin);
  148 + void (*set_deglitch)(void __iomem *pio, unsigned mask, bool in_on);
  149 + bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
  150 + void (*set_debounce)(void __iomem *pio, unsigned mask, bool in_on, u32 div);
  151 + bool (*get_pulldown)(void __iomem *pio, unsigned pin);
  152 + void (*set_pulldown)(void __iomem *pio, unsigned mask, bool in_on);
  153 + bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
  154 + void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
133 155 /* irq */
134 156 int (*irq_type)(struct irq_data *d, unsigned type);
135 157 };
136 158  
... ... @@ -386,10 +408,68 @@
386 408 return select + 1;
387 409 }
388 410  
  411 +static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin)
  412 +{
  413 + return (__raw_readl(pio + PIO_IFSR) >> pin) & 0x1;
  414 +}
  415 +
  416 +static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
  417 +{
  418 + __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
  419 +}
  420 +
  421 +static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
  422 +{
  423 + if (is_on)
  424 + __raw_writel(mask, pio + PIO_IFSCDR);
  425 + at91_mux_set_deglitch(pio, mask, is_on);
  426 +}
  427 +
  428 +static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div)
  429 +{
  430 + *div = __raw_readl(pio + PIO_SCDR);
  431 +
  432 + return (__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1;
  433 +}
  434 +
  435 +static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,
  436 + bool is_on, u32 div)
  437 +{
  438 + if (is_on) {
  439 + __raw_writel(mask, pio + PIO_IFSCER);
  440 + __raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
  441 + __raw_writel(mask, pio + PIO_IFER);
  442 + } else {
  443 + __raw_writel(mask, pio + PIO_IFDR);
  444 + }
  445 +}
  446 +
  447 +static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
  448 +{
  449 + return (__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1;
  450 +}
  451 +
  452 +static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on)
  453 +{
  454 + __raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
  455 +}
  456 +
  457 +static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask)
  458 +{
  459 + __raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
  460 +}
  461 +
  462 +static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin)
  463 +{
  464 + return (__raw_readl(pio + PIO_SCHMITT) >> pin) & 0x1;
  465 +}
  466 +
389 467 static struct at91_pinctrl_mux_ops at91rm9200_ops = {
390 468 .get_periph = at91_mux_get_periph,
391 469 .mux_A_periph = at91_mux_set_A_periph,
392 470 .mux_B_periph = at91_mux_set_B_periph,
  471 + .get_deglitch = at91_mux_get_deglitch,
  472 + .set_deglitch = at91_mux_set_deglitch,
393 473 .irq_type = gpio_irq_type,
394 474 };
395 475  
... ... @@ -399,6 +479,14 @@
399 479 .mux_B_periph = at91_mux_pio3_set_B_periph,
400 480 .mux_C_periph = at91_mux_pio3_set_C_periph,
401 481 .mux_D_periph = at91_mux_pio3_set_D_periph,
  482 + .get_deglitch = at91_mux_get_deglitch,
  483 + .set_deglitch = at91_mux_pio3_set_deglitch,
  484 + .get_debounce = at91_mux_pio3_get_debounce,
  485 + .set_debounce = at91_mux_pio3_set_debounce,
  486 + .get_pulldown = at91_mux_pio3_get_pulldown,
  487 + .set_pulldown = at91_mux_pio3_set_pulldown,
  488 + .get_schmitt_trig = at91_mux_pio3_get_schmitt_trig,
  489 + .disable_schmitt_trig = at91_mux_pio3_disable_schmitt_trig,
402 490 .irq_type = alt_gpio_irq_type,
403 491 };
404 492  
... ... @@ -624,6 +712,7 @@
624 712 struct at91_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
625 713 void __iomem *pio;
626 714 unsigned pin;
  715 + int div;
627 716  
628 717 dev_dbg(info->dev, "%s:%d, pin_id=%d, config=0x%lx", __func__, __LINE__, pin_id, *config);
629 718 pio = pin_to_controller(info, pin_to_bank(pin_id));
... ... @@ -635,6 +724,15 @@
635 724 if (at91_mux_get_pullup(pio, pin))
636 725 *config |= PULL_UP;
637 726  
  727 + if (info->ops->get_deglitch && info->ops->get_deglitch(pio, pin))
  728 + *config |= DEGLITCH;
  729 + if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div))
  730 + *config |= DEBOUNCE | (div << DEBOUNCE_VAL_SHIFT);
  731 + if (info->ops->get_pulldown && info->ops->get_pulldown(pio, pin))
  732 + *config |= PULL_DOWN;
  733 + if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio, pin))
  734 + *config |= DIS_SCHMIT;
  735 +
638 736 return 0;
639 737 }
640 738  
641 739  
... ... @@ -649,8 +747,21 @@
649 747 pio = pin_to_controller(info, pin_to_bank(pin_id));
650 748 mask = pin_to_mask(pin_id % MAX_NB_GPIO_PER_BANK);
651 749  
  750 + if (config & PULL_UP && config & PULL_DOWN)
  751 + return -EINVAL;
  752 +
652 753 at91_mux_set_pullup(pio, mask, config & PULL_UP);
653 754 at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);
  755 + if (info->ops->set_deglitch)
  756 + info->ops->set_deglitch(pio, mask, config & DEGLITCH);
  757 + if (info->ops->set_debounce)
  758 + info->ops->set_debounce(pio, mask, config & DEBOUNCE,
  759 + (config & DEBOUNCE_VAL) >> DEBOUNCE_VAL_SHIFT);
  760 + if (info->ops->set_pulldown)
  761 + info->ops->set_pulldown(pio, mask, config & PULL_DOWN);
  762 + if (info->ops->disable_schmitt_trig && config & DIS_SCHMIT)
  763 + info->ops->disable_schmitt_trig(pio, mask);
  764 +
654 765 return 0;
655 766 }
656 767  
657 768  
... ... @@ -1364,9 +1475,10 @@
1364 1475 struct gpio_chip *chip;
1365 1476 struct pinctrl_gpio_range *range;
1366 1477 int ret = 0;
1367   - int irq;
  1478 + int irq, i;
1368 1479 int alias_idx = of_alias_get_id(np, "gpio");
1369 1480 uint32_t ngpio;
  1481 + char **names;
1370 1482  
1371 1483 BUG_ON(alias_idx >= ARRAY_SIZE(gpio_chips));
1372 1484 if (gpio_chips[alias_idx]) {
... ... @@ -1435,6 +1547,18 @@
1435 1547 else
1436 1548 chip->ngpio = ngpio;
1437 1549 }
  1550 +
  1551 + names = devm_kzalloc(&pdev->dev, sizeof(char*) * chip->ngpio, GFP_KERNEL);
  1552 +
  1553 + if (!names) {
  1554 + ret = -ENOMEM;
  1555 + goto clk_err;
  1556 + }
  1557 +
  1558 + for (i = 0; i < chip->ngpio; i++)
  1559 + names[i] = kasprintf(GFP_KERNEL, "pio%c%d", alias_idx + 'A', i);
  1560 +
  1561 + chip->names = (const char*const*)names;
1438 1562  
1439 1563 range = &at91_chip->range;
1440 1564 range->name = chip->label;