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Commit 6483c1b5e1a6e3489640a1376e951395982e9615

Authored by Philipp Zabel
Committed by Samuel Ortiz
1 parent 9e5aca58c2
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

mfd: asic3: add asic3_set_register common operation 

Used to configure single bits of the SDHWCTRL_SDCONF and EXTCF_RESET/SELECT
registers needed for DS1WM, MMC/SDIO and PCMCIA functionality.

Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

Showing 2 changed files with 20 additions and 5 deletions Side-by-side Diff

... ... @@ -52,6 +52,21 @@
52 52 (reg >> asic->bus_shift));
53 53 }
54 54  
  55 +void asic3_set_register(struct asic3 *asic, u32 reg, u32 bits, bool set)
  56 +{
  57 + unsigned long flags;
  58 + u32 val;
  59 +
  60 + spin_lock_irqsave(&asic->lock, flags);
  61 + val = asic3_read_register(asic, reg);
  62 + if (set)
  63 + val |= bits;
  64 + else
  65 + val &= ~bits;
  66 + asic3_write_register(asic, reg, val);
  67 + spin_unlock_irqrestore(&asic->lock, flags);
  68 +}
  69 +
55 70 /* IRQs */
56 71 #define MAX_ASIC_ISR_LOOPS 20
57 72 #define ASIC3_GPIO_BASE_INCR \
include/linux/mfd/asic3.h
Diff comments   View file @ 6483c1b
... ... @@ -227,8 +227,8 @@
227 227  
228 228  
229 229 /* Basic control of the SD ASIC */
230   -#define ASIC3_SDHWCTRL_Base 0x0E00
231   -#define ASIC3_SDHWCTRL_SDConf 0x00
  230 +#define ASIC3_SDHWCTRL_BASE 0x0E00
  231 +#define ASIC3_SDHWCTRL_SDCONF 0x00
232 232  
233 233 #define ASIC3_SDHWCTRL_SUSPEND (1 << 0) /* 1=suspend all SD operations */
234 234 #define ASIC3_SDHWCTRL_CLKSEL (1 << 1) /* 1=SDICK, 0=HCLK */
235 235  
... ... @@ -242,10 +242,10 @@
242 242 /* SD card power supply ctrl 1=enable */
243 243 #define ASIC3_SDHWCTRL_SDPWR (1 << 6)
244 244  
245   -#define ASIC3_EXTCF_Base 0x1100
  245 +#define ASIC3_EXTCF_BASE 0x1100
246 246  
247   -#define ASIC3_EXTCF_Select 0x00
248   -#define ASIC3_EXTCF_Reset 0x04
  247 +#define ASIC3_EXTCF_SELECT 0x00
  248 +#define ASIC3_EXTCF_RESET 0x04
249 249  
250 250 #define ASIC3_EXTCF_SMOD0 (1 << 0) /* slot number of mode 0 */
251 251 #define ASIC3_EXTCF_SMOD1 (1 << 1) /* slot number of mode 1 */