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Commit 662c8b55d26abeabc0b125f922dfa66338a046ae

Authored by Tony Lindgren
1 parent 15f45e6f27
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

omap: mux: Add 36xx CBP package support 

Add 36xx CBP package support

Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Showing 6 changed files with 587 additions and 0 deletions Side-by-side Diff

arch/arm/mach-omap2/Kconfig
Diff comments   View file @ 662c8b5
... ... @@ -33,6 +33,9 @@
33 33 config OMAP_PACKAGE_CUS
34 34 bool
35 35  
  36 +config OMAP_PACKAGE_CBP
  37 + bool
  38 +
36 39 comment "OMAP Board Type"
37 40 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP4
38 41  
... ... @@ -121,6 +124,7 @@
121 124 config MACH_OMAP_ZOOM3
122 125 bool "OMAP3630 Zoom3 board"
123 126 depends on ARCH_OMAP3 && ARCH_OMAP34XX
  127 + select OMAP_PACKAGE_CBP
124 128  
125 129 config MACH_CM_T35
126 130 bool "CompuLab CM-T35 module"
... ... @@ -135,6 +139,7 @@
135 139 config MACH_OMAP_3630SDP
136 140 bool "OMAP3630 SDP board"
137 141 depends on ARCH_OMAP3 && ARCH_OMAP34XX
  142 + select OMAP_PACKAGE_CBP
138 143  
139 144 config MACH_OMAP_4430SDP
140 145 bool "OMAP 4430 SDP board"
arch/arm/mach-omap2/board-3630sdp.c
Diff comments   View file @ 662c8b5
... ... @@ -85,8 +85,17 @@
85 85 omap_gpio_init();
86 86 }
87 87  
  88 +#ifdef CONFIG_OMAP_MUX
  89 +static struct omap_board_mux board_mux[] __initdata = {
  90 + { .reg_offset = OMAP_MUX_TERMINATOR },
  91 +};
  92 +#else
  93 +#define board_mux NULL
  94 +#endif
  95 +
88 96 static void __init omap_sdp_init(void)
89 97 {
  98 + omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
90 99 zoom_peripherals_init();
91 100 board_smc91x_init();
92 101 enable_board_wakeup_source();
arch/arm/mach-omap2/board-zoom3.c
Diff comments   View file @ 662c8b5
... ... @@ -21,6 +21,7 @@
21 21 #include <plat/common.h>
22 22 #include <plat/board.h>
23 23  
  24 +#include "mux.h"
24 25 #include "sdram-hynix-h8mbx00u0mer-0em.h"
25 26  
26 27 static void __init omap_zoom_map_io(void)
27 28  
... ... @@ -42,8 +43,17 @@
42 43 omap_gpio_init();
43 44 }
44 45  
  46 +#ifdef CONFIG_OMAP_MUX
  47 +static struct omap_board_mux board_mux[] __initdata = {
  48 + { .reg_offset = OMAP_MUX_TERMINATOR },
  49 +};
  50 +#else
  51 +#define board_mux NULL
  52 +#endif
  53 +
45 54 static void __init omap_zoom_init(void)
46 55 {
  56 + omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
47 57 zoom_peripherals_init();
48 58 zoom_debugboard_init();
49 59 }
arch/arm/mach-omap2/mux.h
Diff comments   View file @ 662c8b5
... ... @@ -56,6 +56,7 @@
56 56  
57 57 /* Flags for omap_mux_init */
58 58 #define OMAP_PACKAGE_MASK 0xffff
  59 +#define OMAP_PACKAGE_CBP 4 /* 515-pin 0.40 0.50 */
59 60 #define OMAP_PACKAGE_CUS 3 /* 423-pin 0.65 */
60 61 #define OMAP_PACKAGE_CBB 2 /* 515-pin 0.40 0.50 */
61 62 #define OMAP_PACKAGE_CBC 1 /* 515-pin 0.50 0.65 */
arch/arm/mach-omap2/mux34xx.c
Diff comments   View file @ 662c8b5
... ... @@ -1549,6 +1549,522 @@
1549 1549 #define omap3_cbb_ball NULL
1550 1550 #endif
1551 1551  
  1552 +/*
  1553 + * Signals different on 36XX CBP package comapared to 34XX CBC package
  1554 + */
  1555 +#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_OMAP_PACKAGE_CBP)
  1556 +struct omap_mux __initdata omap36xx_cbp_subset[] = {
  1557 + _OMAP3_MUXENTRY(CAM_D0, 99,
  1558 + "cam_d0", NULL, "csi2_dx2", NULL,
  1559 + "gpio_99", NULL, NULL, "safe_mode"),
  1560 + _OMAP3_MUXENTRY(CAM_D1, 100,
  1561 + "cam_d1", NULL, "csi2_dy2", NULL,
  1562 + "gpio_100", NULL, NULL, "safe_mode"),
  1563 + _OMAP3_MUXENTRY(CAM_D10, 109,
  1564 + "cam_d10", "ssi2_wake", NULL, NULL,
  1565 + "gpio_109", "hw_dbg8", NULL, "safe_mode"),
  1566 + _OMAP3_MUXENTRY(CAM_D2, 101,
  1567 + "cam_d2", "ssi2_rdy_tx", NULL, NULL,
  1568 + "gpio_101", "hw_dbg4", NULL, "safe_mode"),
  1569 + _OMAP3_MUXENTRY(CAM_D3, 102,
  1570 + "cam_d3", "ssi2_dat_rx", NULL, NULL,
  1571 + "gpio_102", "hw_dbg5", NULL, "safe_mode"),
  1572 + _OMAP3_MUXENTRY(CAM_D4, 103,
  1573 + "cam_d4", "ssi2_flag_rx", NULL, NULL,
  1574 + "gpio_103", "hw_dbg6", NULL, "safe_mode"),
  1575 + _OMAP3_MUXENTRY(CAM_D5, 104,
  1576 + "cam_d5", "ssi2_rdy_rx", NULL, NULL,
  1577 + "gpio_104", "hw_dbg7", NULL, "safe_mode"),
  1578 + _OMAP3_MUXENTRY(CAM_HS, 94,
  1579 + "cam_hs", "ssi2_dat_tx", NULL, NULL,
  1580 + "gpio_94", "hw_dbg0", NULL, "safe_mode"),
  1581 + _OMAP3_MUXENTRY(CAM_VS, 95,
  1582 + "cam_vs", "ssi2_flag_tx", NULL, NULL,
  1583 + "gpio_95", "hw_dbg1", NULL, "safe_mode"),
  1584 + _OMAP3_MUXENTRY(DSS_DATA0, 70,
  1585 + "dss_data0", "dsi_dx0", "uart1_cts", NULL,
  1586 + "gpio_70", NULL, NULL, "safe_mode"),
  1587 + _OMAP3_MUXENTRY(DSS_DATA1, 71,
  1588 + "dss_data1", "dsi_dy0", "uart1_rts", NULL,
  1589 + "gpio_71", NULL, NULL, "safe_mode"),
  1590 + _OMAP3_MUXENTRY(DSS_DATA2, 72,
  1591 + "dss_data2", "dsi_dx1", NULL, NULL,
  1592 + "gpio_72", NULL, NULL, "safe_mode"),
  1593 + _OMAP3_MUXENTRY(DSS_DATA3, 73,
  1594 + "dss_data3", "dsi_dy1", NULL, NULL,
  1595 + "gpio_73", NULL, NULL, "safe_mode"),
  1596 + _OMAP3_MUXENTRY(DSS_DATA4, 74,
  1597 + "dss_data4", "dsi_dx2", "uart3_rx_irrx", NULL,
  1598 + "gpio_74", NULL, NULL, "safe_mode"),
  1599 + _OMAP3_MUXENTRY(DSS_DATA5, 75,
  1600 + "dss_data5", "dsi_dy2", "uart3_tx_irtx", NULL,
  1601 + "gpio_75", NULL, NULL, "safe_mode"),
  1602 + _OMAP3_MUXENTRY(DSS_DATA6, 76,
  1603 + "dss_data6", NULL, "uart1_tx", "dssvenc656_data6",
  1604 + "gpio_76", "hw_dbg14", NULL, "safe_mode"),
  1605 + _OMAP3_MUXENTRY(DSS_DATA7, 77,
  1606 + "dss_data7", NULL, "uart1_rx", "dssvenc656_data7",
  1607 + "gpio_77", "hw_dbg15", NULL, "safe_mode"),
  1608 + _OMAP3_MUXENTRY(DSS_DATA8, 78,
  1609 + "dss_data8", NULL, "uart3_rx_irrx", NULL,
  1610 + "gpio_78", "hw_dbg16", NULL, "safe_mode"),
  1611 + _OMAP3_MUXENTRY(DSS_DATA9, 79,
  1612 + "dss_data9", NULL, "uart3_tx_irtx", NULL,
  1613 + "gpio_79", "hw_dbg17", NULL, "safe_mode"),
  1614 + _OMAP3_MUXENTRY(ETK_D12, 26,
  1615 + "etk_d12", "sys_drm_msecure", NULL, "hsusb2_dir",
  1616 + "gpio_26", NULL, "hsusb2_tll_dir", "hw_dbg14"),
  1617 + _OMAP3_MUXENTRY(GPMC_A11, 0,
  1618 + "gpmc_a11", NULL, NULL, NULL,
  1619 + NULL, NULL, NULL, "safe_mode"),
  1620 + _OMAP3_MUXENTRY(GPMC_WAIT2, 64,
  1621 + "gpmc_wait2", NULL, "uart4_tx", NULL,
  1622 + "gpio_64", NULL, NULL, "safe_mode"),
  1623 + _OMAP3_MUXENTRY(GPMC_WAIT3, 65,
  1624 + "gpmc_wait3", "sys_ndmareq1", "uart4_rx", NULL,
  1625 + "gpio_65", NULL, NULL, "safe_mode"),
  1626 + _OMAP3_MUXENTRY(HSUSB0_DATA0, 125,
  1627 + "hsusb0_data0", NULL, "uart3_tx_irtx", NULL,
  1628 + "gpio_125", "uart2_tx", NULL, "safe_mode"),
  1629 + _OMAP3_MUXENTRY(HSUSB0_DATA1, 130,
  1630 + "hsusb0_data1", NULL, "uart3_rx_irrx", NULL,
  1631 + "gpio_130", "uart2_rx", NULL, "safe_mode"),
  1632 + _OMAP3_MUXENTRY(HSUSB0_DATA2, 131,
  1633 + "hsusb0_data2", NULL, "uart3_rts_sd", NULL,
  1634 + "gpio_131", "uart2_rts", NULL, "safe_mode"),
  1635 + _OMAP3_MUXENTRY(HSUSB0_DATA3, 169,
  1636 + "hsusb0_data3", NULL, "uart3_cts_rctx", NULL,
  1637 + "gpio_169", "uart2_cts", NULL, "safe_mode"),
  1638 + _OMAP3_MUXENTRY(MCBSP1_CLKR, 156,
  1639 + "mcbsp1_clkr", "mcspi4_clk", "sim_cd", NULL,
  1640 + "gpio_156", NULL, NULL, "safe_mode"),
  1641 + _OMAP3_MUXENTRY(MCBSP1_FSR, 157,
  1642 + "mcbsp1_fsr", "adpllv2d_dithering_en1",
  1643 + "cam_global_reset", NULL,
  1644 + "gpio_157", NULL, NULL, "safe_mode"),
  1645 + _OMAP3_MUXENTRY(MCBSP4_CLKX, 152,
  1646 + "mcbsp4_clkx", "ssi1_dat_rx", NULL, NULL,
  1647 + "gpio_152", "hsusb3_tll_data1", "mm3_txse0", "safe_mode"),
  1648 + _OMAP3_MUXENTRY(MCBSP4_DR, 153,
  1649 + "mcbsp4_dr", "ssi1_flag_rx", NULL, NULL,
  1650 + "gpio_153", "hsusb3_tll_data0", "mm3_rxrcv", "safe_mode"),
  1651 + _OMAP3_MUXENTRY(MCBSP4_DX, 154,
  1652 + "mcbsp4_dx", "ssi1_rdy_rx", NULL, NULL,
  1653 + "gpio_154", "hsusb3_tll_data2", "mm3_txdat", "safe_mode"),
  1654 + _OMAP3_MUXENTRY(MCBSP4_FSX, 155,
  1655 + "mcbsp4_fsx", "ssi1_wake", NULL, NULL,
  1656 + "gpio_155", "hsusb3_tll_data3", "mm3_txen_n", "safe_mode"),
  1657 + _OMAP3_MUXENTRY(MCSPI1_CS1, 175,
  1658 + "mcspi1_cs1", "adpllv2d_dithering_en2", NULL, "sdmmc3_cmd",
  1659 + "gpio_175", NULL, NULL, "safe_mode"),
  1660 + _OMAP3_MUXENTRY(SAD2D_MBUSFLAG, 0,
  1661 + "sad2d_mbusflag", "mad2d_sbusflag", NULL, NULL,
  1662 + NULL, NULL, NULL, NULL),
  1663 + _OMAP3_MUXENTRY(SAD2D_MCAD28, 0,
  1664 + "sad2d_mcad28", "mad2d_mcad28", NULL, NULL,
  1665 + NULL, NULL, NULL, NULL),
  1666 + _OMAP3_MUXENTRY(SAD2D_MCAD29, 0,
  1667 + "sad2d_mcad29", "mad2d_mcad29", NULL, NULL,
  1668 + NULL, NULL, NULL, NULL),
  1669 + _OMAP3_MUXENTRY(SAD2D_MCAD32, 0,
  1670 + "sad2d_mcad32", "mad2d_mcad32", NULL, NULL,
  1671 + NULL, NULL, NULL, NULL),
  1672 + _OMAP3_MUXENTRY(SAD2D_MCAD33, 0,
  1673 + "sad2d_mcad33", "mad2d_mcad33", NULL, NULL,
  1674 + NULL, NULL, NULL, NULL),
  1675 + _OMAP3_MUXENTRY(SAD2D_MCAD34, 0,
  1676 + "sad2d_mcad34", "mad2d_mcad34", NULL, NULL,
  1677 + NULL, NULL, NULL, NULL),
  1678 + _OMAP3_MUXENTRY(SAD2D_MCAD35, 0,
  1679 + "sad2d_mcad35", "mad2d_mcad35", NULL, NULL,
  1680 + NULL, NULL, NULL, NULL),
  1681 + _OMAP3_MUXENTRY(SAD2D_MCAD36, 0,
  1682 + "sad2d_mcad36", "mad2d_mcad36", NULL, NULL,
  1683 + NULL, NULL, NULL, NULL),
  1684 + _OMAP3_MUXENTRY(SAD2D_MREAD, 0,
  1685 + "sad2d_mread", "mad2d_sread", NULL, NULL,
  1686 + NULL, NULL, NULL, NULL),
  1687 + _OMAP3_MUXENTRY(SAD2D_MWRITE, 0,
  1688 + "sad2d_mwrite", "mad2d_swrite", NULL, NULL,
  1689 + NULL, NULL, NULL, NULL),
  1690 + _OMAP3_MUXENTRY(SAD2D_SBUSFLAG, 0,
  1691 + "sad2d_sbusflag", "mad2d_mbusflag", NULL, NULL,
  1692 + NULL, NULL, NULL, NULL),
  1693 + _OMAP3_MUXENTRY(SAD2D_SREAD, 0,
  1694 + "sad2d_sread", "mad2d_mread", NULL, NULL,
  1695 + NULL, NULL, NULL, NULL),
  1696 + _OMAP3_MUXENTRY(SAD2D_SWRITE, 0,
  1697 + "sad2d_swrite", "mad2d_mwrite", NULL, NULL,
  1698 + NULL, NULL, NULL, NULL),
  1699 + _OMAP3_MUXENTRY(SDMMC1_CLK, 120,
  1700 + "sdmmc1_clk", "ms_clk", NULL, NULL,
  1701 + "gpio_120", NULL, NULL, "safe_mode"),
  1702 + _OMAP3_MUXENTRY(SDMMC1_CMD, 121,
  1703 + "sdmmc1_cmd", "ms_bs", NULL, NULL,
  1704 + "gpio_121", NULL, NULL, "safe_mode"),
  1705 + _OMAP3_MUXENTRY(SDMMC1_DAT0, 122,
  1706 + "sdmmc1_dat0", "ms_dat0", NULL, NULL,
  1707 + "gpio_122", NULL, NULL, "safe_mode"),
  1708 + _OMAP3_MUXENTRY(SDMMC1_DAT1, 123,
  1709 + "sdmmc1_dat1", "ms_dat1", NULL, NULL,
  1710 + "gpio_123", NULL, NULL, "safe_mode"),
  1711 + _OMAP3_MUXENTRY(SDMMC1_DAT2, 124,
  1712 + "sdmmc1_dat2", "ms_dat2", NULL, NULL,
  1713 + "gpio_124", NULL, NULL, "safe_mode"),
  1714 + _OMAP3_MUXENTRY(SDMMC1_DAT3, 125,
  1715 + "sdmmc1_dat3", "ms_dat3", NULL, NULL,
  1716 + "gpio_125", NULL, NULL, "safe_mode"),
  1717 + _OMAP3_MUXENTRY(SDRC_CKE0, 0,
  1718 + "sdrc_cke0", NULL, NULL, NULL,
  1719 + NULL, NULL, NULL, "safe_mode_out1"),
  1720 + _OMAP3_MUXENTRY(SDRC_CKE1, 0,
  1721 + "sdrc_cke1", NULL, NULL, NULL,
  1722 + NULL, NULL, NULL, "safe_mode_out1"),
  1723 + _OMAP3_MUXENTRY(SIM_IO, 126,
  1724 + "sim_io", "sim_io_low_impedance", NULL, NULL,
  1725 + "gpio_126", NULL, NULL, "safe_mode"),
  1726 + _OMAP3_MUXENTRY(SIM_CLK, 127,
  1727 + "sim_clk", NULL, NULL, NULL,
  1728 + "gpio_127", NULL, NULL, "safe_mode"),
  1729 + _OMAP3_MUXENTRY(SIM_PWRCTRL, 128,
  1730 + "sim_pwrctrl", NULL, NULL, NULL,
  1731 + "gpio_128", NULL, NULL, "safe_mode"),
  1732 + _OMAP3_MUXENTRY(SIM_RST, 129,
  1733 + "sim_rst", NULL, NULL, NULL,
  1734 + "gpio_129", NULL, NULL, "safe_mode"),
  1735 + _OMAP3_MUXENTRY(SYS_BOOT0, 2,
  1736 + "sys_boot0", NULL, NULL, "dss_data18",
  1737 + "gpio_2", NULL, NULL, "safe_mode"),
  1738 + _OMAP3_MUXENTRY(SYS_BOOT1, 3,
  1739 + "sys_boot1", NULL, NULL, "dss_data19",
  1740 + "gpio_3", NULL, NULL, "safe_mode"),
  1741 + _OMAP3_MUXENTRY(SYS_BOOT3, 5,
  1742 + "sys_boot3", NULL, NULL, "dss_data20",
  1743 + "gpio_5", NULL, NULL, "safe_mode"),
  1744 + _OMAP3_MUXENTRY(SYS_BOOT4, 6,
  1745 + "sys_boot4", "sdmmc2_dir_dat2", NULL, "dss_data21",
  1746 + "gpio_6", NULL, NULL, "safe_mode"),
  1747 + _OMAP3_MUXENTRY(SYS_BOOT5, 7,
  1748 + "sys_boot5", "sdmmc2_dir_dat3", NULL, "dss_data22",
  1749 + "gpio_7", NULL, NULL, "safe_mode"),
  1750 + _OMAP3_MUXENTRY(SYS_BOOT6, 8,
  1751 + "sys_boot6", NULL, NULL, "dss_data23",
  1752 + "gpio_8", NULL, NULL, "safe_mode"),
  1753 + _OMAP3_MUXENTRY(UART1_CTS, 150,
  1754 + "uart1_cts", "ssi1_rdy_tx", NULL, NULL,
  1755 + "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"),
  1756 + _OMAP3_MUXENTRY(UART1_RTS, 149,
  1757 + "uart1_rts", "ssi1_flag_tx", NULL, NULL,
  1758 + "gpio_149", NULL, NULL, "safe_mode"),
  1759 + _OMAP3_MUXENTRY(UART1_TX, 148,
  1760 + "uart1_tx", "ssi1_dat_tx", NULL, NULL,
  1761 + "gpio_148", NULL, NULL, "safe_mode"),
  1762 + { .reg_offset = OMAP_MUX_TERMINATOR },
  1763 +};
  1764 +#else
  1765 +#define omap36xx_cbp_subset NULL
  1766 +#endif
  1767 +
  1768 +/*
  1769 + * Balls for 36XX CBP package
  1770 + * 515-pin s-PBGA Package, 0.50mm Ball Pitch (Top), 0.40mm Ball Pitch (Bottom)
  1771 + */
  1772 +#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \
  1773 + && defined (CONFIG_OMAP_PACKAGE_CBP)
  1774 +struct omap_ball __initdata omap36xx_cbp_ball[] = {
  1775 + _OMAP3_BALLENTRY(CAM_D0, "ag17", NULL),
  1776 + _OMAP3_BALLENTRY(CAM_D1, "ah17", NULL),
  1777 + _OMAP3_BALLENTRY(CAM_D10, "b25", NULL),
  1778 + _OMAP3_BALLENTRY(CAM_D11, "c26", NULL),
  1779 + _OMAP3_BALLENTRY(CAM_D2, "b24", NULL),
  1780 + _OMAP3_BALLENTRY(CAM_D3, "c24", NULL),
  1781 + _OMAP3_BALLENTRY(CAM_D4, "d24", NULL),
  1782 + _OMAP3_BALLENTRY(CAM_D5, "a25", NULL),
  1783 + _OMAP3_BALLENTRY(CAM_D6, "k28", NULL),
  1784 + _OMAP3_BALLENTRY(CAM_D7, "l28", NULL),
  1785 + _OMAP3_BALLENTRY(CAM_D8, "k27", NULL),
  1786 + _OMAP3_BALLENTRY(CAM_D9, "l27", NULL),
  1787 + _OMAP3_BALLENTRY(CAM_FLD, "c23", NULL),
  1788 + _OMAP3_BALLENTRY(CAM_HS, "a24", NULL),
  1789 + _OMAP3_BALLENTRY(CAM_PCLK, "c27", NULL),
  1790 + _OMAP3_BALLENTRY(CAM_STROBE, "d25", NULL),
  1791 + _OMAP3_BALLENTRY(CAM_VS, "a23", NULL),
  1792 + _OMAP3_BALLENTRY(CAM_WEN, "b23", NULL),
  1793 + _OMAP3_BALLENTRY(CAM_XCLKA, "c25", NULL),
  1794 + _OMAP3_BALLENTRY(CAM_XCLKB, "b26", NULL),
  1795 + _OMAP3_BALLENTRY(CSI2_DX0, "ag19", NULL),
  1796 + _OMAP3_BALLENTRY(CSI2_DX1, "ag18", NULL),
  1797 + _OMAP3_BALLENTRY(CSI2_DY0, "ah19", NULL),
  1798 + _OMAP3_BALLENTRY(CSI2_DY1, "ah18", NULL),
  1799 + _OMAP3_BALLENTRY(DSS_ACBIAS, "e27", NULL),
  1800 + _OMAP3_BALLENTRY(DSS_DATA0, "ag22", NULL),
  1801 + _OMAP3_BALLENTRY(DSS_DATA1, "ah22", NULL),
  1802 + _OMAP3_BALLENTRY(DSS_DATA10, "ad28", NULL),
  1803 + _OMAP3_BALLENTRY(DSS_DATA11, "ad27", NULL),
  1804 + _OMAP3_BALLENTRY(DSS_DATA12, "ab28", NULL),
  1805 + _OMAP3_BALLENTRY(DSS_DATA13, "ab27", NULL),
  1806 + _OMAP3_BALLENTRY(DSS_DATA14, "aa28", NULL),
  1807 + _OMAP3_BALLENTRY(DSS_DATA15, "aa27", NULL),
  1808 + _OMAP3_BALLENTRY(DSS_DATA16, "g25", NULL),
  1809 + _OMAP3_BALLENTRY(DSS_DATA17, "h27", NULL),
  1810 + _OMAP3_BALLENTRY(DSS_DATA18, "h26", NULL),
  1811 + _OMAP3_BALLENTRY(DSS_DATA19, "h25", NULL),
  1812 + _OMAP3_BALLENTRY(DSS_DATA2, "ag23", NULL),
  1813 + _OMAP3_BALLENTRY(DSS_DATA20, "e28", NULL),
  1814 + _OMAP3_BALLENTRY(DSS_DATA21, "j26", NULL),
  1815 + _OMAP3_BALLENTRY(DSS_DATA22, "ac27", NULL),
  1816 + _OMAP3_BALLENTRY(DSS_DATA23, "ac28", NULL),
  1817 + _OMAP3_BALLENTRY(DSS_DATA3, "ah23", NULL),
  1818 + _OMAP3_BALLENTRY(DSS_DATA4, "ag24", NULL),
  1819 + _OMAP3_BALLENTRY(DSS_DATA5, "ah24", NULL),
  1820 + _OMAP3_BALLENTRY(DSS_DATA6, "e26", NULL),
  1821 + _OMAP3_BALLENTRY(DSS_DATA7, "f28", NULL),
  1822 + _OMAP3_BALLENTRY(DSS_DATA8, "f27", NULL),
  1823 + _OMAP3_BALLENTRY(DSS_DATA9, "g26", NULL),
  1824 + _OMAP3_BALLENTRY(DSS_HSYNC, "d26", NULL),
  1825 + _OMAP3_BALLENTRY(DSS_PCLK, "d28", NULL),
  1826 + _OMAP3_BALLENTRY(DSS_VSYNC, "d27", NULL),
  1827 + _OMAP3_BALLENTRY(ETK_CLK, "af10", NULL),
  1828 + _OMAP3_BALLENTRY(ETK_CTL, "ae10", NULL),
  1829 + _OMAP3_BALLENTRY(ETK_D0, "af11", NULL),
  1830 + _OMAP3_BALLENTRY(ETK_D1, "ag12", NULL),
  1831 + _OMAP3_BALLENTRY(ETK_D10, "ae7", NULL),
  1832 + _OMAP3_BALLENTRY(ETK_D11, "af7", NULL),
  1833 + _OMAP3_BALLENTRY(ETK_D12, "ag7", NULL),
  1834 + _OMAP3_BALLENTRY(ETK_D13, "ah7", NULL),
  1835 + _OMAP3_BALLENTRY(ETK_D14, "ag8", NULL),
  1836 + _OMAP3_BALLENTRY(ETK_D15, "ah8", NULL),
  1837 + _OMAP3_BALLENTRY(ETK_D2, "ah12", NULL),
  1838 + _OMAP3_BALLENTRY(ETK_D3, "ae13", NULL),
  1839 + _OMAP3_BALLENTRY(ETK_D4, "ae11", NULL),
  1840 + _OMAP3_BALLENTRY(ETK_D5, "ah9", NULL),
  1841 + _OMAP3_BALLENTRY(ETK_D6, "af13", NULL),
  1842 + _OMAP3_BALLENTRY(ETK_D7, "ah14", NULL),
  1843 + _OMAP3_BALLENTRY(ETK_D8, "af9", NULL),
  1844 + _OMAP3_BALLENTRY(ETK_D9, "ag9", NULL),
  1845 + _OMAP3_BALLENTRY(GPMC_A1, "n4", "ac15"),
  1846 + _OMAP3_BALLENTRY(GPMC_A10, "k3", "ab19"),
  1847 + _OMAP3_BALLENTRY(GPMC_A11, NULL, "ac20"),
  1848 + _OMAP3_BALLENTRY(GPMC_A2, "m4", "ab15"),
  1849 + _OMAP3_BALLENTRY(GPMC_A3, "l4", "ac16"),
  1850 + _OMAP3_BALLENTRY(GPMC_A4, "k4", "ab16"),
  1851 + _OMAP3_BALLENTRY(GPMC_A5, "t3", "ac17"),
  1852 + _OMAP3_BALLENTRY(GPMC_A6, "r3", "ab17"),
  1853 + _OMAP3_BALLENTRY(GPMC_A7, "n3", "ac18"),
  1854 + _OMAP3_BALLENTRY(GPMC_A8, "m3", "ab18"),
  1855 + _OMAP3_BALLENTRY(GPMC_A9, "l3", "ac19"),
  1856 + _OMAP3_BALLENTRY(GPMC_CLK, "t4", "w2"),
  1857 + _OMAP3_BALLENTRY(GPMC_D0, "k1", "m2"),
  1858 + _OMAP3_BALLENTRY(GPMC_D1, "l1", "m1"),
  1859 + _OMAP3_BALLENTRY(GPMC_D10, "p1", "ab4"),
  1860 + _OMAP3_BALLENTRY(GPMC_D11, "r1", "ac4"),
  1861 + _OMAP3_BALLENTRY(GPMC_D12, "r2", "ab6"),
  1862 + _OMAP3_BALLENTRY(GPMC_D13, "t2", "ac6"),
  1863 + _OMAP3_BALLENTRY(GPMC_D14, "w1", "ab7"),
  1864 + _OMAP3_BALLENTRY(GPMC_D15, "y1", "ac7"),
  1865 + _OMAP3_BALLENTRY(GPMC_D2, "l2", "n2"),
  1866 + _OMAP3_BALLENTRY(GPMC_D3, "p2", "n1"),
  1867 + _OMAP3_BALLENTRY(GPMC_D4, "t1", "r2"),
  1868 + _OMAP3_BALLENTRY(GPMC_D5, "v1", "r1"),
  1869 + _OMAP3_BALLENTRY(GPMC_D6, "v2", "t2"),
  1870 + _OMAP3_BALLENTRY(GPMC_D7, "w2", "t1"),
  1871 + _OMAP3_BALLENTRY(GPMC_D8, "h2", "ab3"),
  1872 + _OMAP3_BALLENTRY(GPMC_D9, "k2", "ac3"),
  1873 + _OMAP3_BALLENTRY(GPMC_NADV_ALE, "f3", "w1"),
  1874 + _OMAP3_BALLENTRY(GPMC_NBE0_CLE, "g3", "ac12"),
  1875 + _OMAP3_BALLENTRY(GPMC_NBE1, "u3", NULL),
  1876 + _OMAP3_BALLENTRY(GPMC_NCS0, "g4", "y2"),
  1877 + _OMAP3_BALLENTRY(GPMC_NCS1, "h3", "y1"),
  1878 + _OMAP3_BALLENTRY(GPMC_NCS2, "v8", NULL),
  1879 + _OMAP3_BALLENTRY(GPMC_NCS3, "u8", NULL),
  1880 + _OMAP3_BALLENTRY(GPMC_NCS4, "t8", NULL),
  1881 + _OMAP3_BALLENTRY(GPMC_NCS5, "r8", NULL),
  1882 + _OMAP3_BALLENTRY(GPMC_NCS6, "p8", NULL),
  1883 + _OMAP3_BALLENTRY(GPMC_NCS7, "n8", NULL),
  1884 + _OMAP3_BALLENTRY(GPMC_NOE, "g2", "v2"),
  1885 + _OMAP3_BALLENTRY(GPMC_NWE, "f4", "v1"),
  1886 + _OMAP3_BALLENTRY(GPMC_NWP, "h1", "ab10"),
  1887 + _OMAP3_BALLENTRY(GPMC_WAIT0, "m8", "ab12"),
  1888 + _OMAP3_BALLENTRY(GPMC_WAIT1, "l8", "ac10"),
  1889 + _OMAP3_BALLENTRY(GPMC_WAIT2, "k8", NULL),
  1890 + _OMAP3_BALLENTRY(GPMC_WAIT3, "j8", NULL),
  1891 + _OMAP3_BALLENTRY(HDQ_SIO, "j25", NULL),
  1892 + _OMAP3_BALLENTRY(HSUSB0_CLK, "t28", NULL),
  1893 + _OMAP3_BALLENTRY(HSUSB0_DATA0, "t27", NULL),
  1894 + _OMAP3_BALLENTRY(HSUSB0_DATA1, "u28", NULL),
  1895 + _OMAP3_BALLENTRY(HSUSB0_DATA2, "u27", NULL),
  1896 + _OMAP3_BALLENTRY(HSUSB0_DATA3, "u26", NULL),
  1897 + _OMAP3_BALLENTRY(HSUSB0_DATA4, "u25", NULL),
  1898 + _OMAP3_BALLENTRY(HSUSB0_DATA5, "v28", NULL),
  1899 + _OMAP3_BALLENTRY(HSUSB0_DATA6, "v27", NULL),
  1900 + _OMAP3_BALLENTRY(HSUSB0_DATA7, "v26", NULL),
  1901 + _OMAP3_BALLENTRY(HSUSB0_DIR, "r28", NULL),
  1902 + _OMAP3_BALLENTRY(HSUSB0_NXT, "t26", NULL),
  1903 + _OMAP3_BALLENTRY(HSUSB0_STP, "t25", NULL),
  1904 + _OMAP3_BALLENTRY(I2C1_SCL, "k21", NULL),
  1905 + _OMAP3_BALLENTRY(I2C1_SDA, "j21", NULL),
  1906 + _OMAP3_BALLENTRY(I2C2_SCL, "af15", NULL),
  1907 + _OMAP3_BALLENTRY(I2C2_SDA, "ae15", NULL),
  1908 + _OMAP3_BALLENTRY(I2C3_SCL, "af14", NULL),
  1909 + _OMAP3_BALLENTRY(I2C3_SDA, "ag14", NULL),
  1910 + _OMAP3_BALLENTRY(I2C4_SCL, "ad26", NULL),
  1911 + _OMAP3_BALLENTRY(I2C4_SDA, "ae26", NULL),
  1912 + _OMAP3_BALLENTRY(JTAG_EMU0, "aa11", NULL),
  1913 + _OMAP3_BALLENTRY(JTAG_EMU1, "aa10", NULL),
  1914 + _OMAP3_BALLENTRY(JTAG_RTCK, "aa12", NULL),
  1915 + _OMAP3_BALLENTRY(JTAG_TCK, "aa13", NULL),
  1916 + _OMAP3_BALLENTRY(JTAG_TDI, "aa20", NULL),
  1917 + _OMAP3_BALLENTRY(JTAG_TDO, "aa19", NULL),
  1918 + _OMAP3_BALLENTRY(JTAG_TMS_TMSC, "aa18", NULL),
  1919 + _OMAP3_BALLENTRY(MCBSP1_CLKR, "y21", NULL),
  1920 + _OMAP3_BALLENTRY(MCBSP1_CLKX, "w21", NULL),
  1921 + _OMAP3_BALLENTRY(MCBSP1_DR, "u21", NULL),
  1922 + _OMAP3_BALLENTRY(MCBSP1_DX, "v21", NULL),
  1923 + _OMAP3_BALLENTRY(MCBSP1_FSR, "aa21", NULL),
  1924 + _OMAP3_BALLENTRY(MCBSP1_FSX, "k26", NULL),
  1925 + _OMAP3_BALLENTRY(MCBSP2_CLKX, "n21", NULL),
  1926 + _OMAP3_BALLENTRY(MCBSP2_DR, "r21", NULL),
  1927 + _OMAP3_BALLENTRY(MCBSP2_DX, "m21", NULL),
  1928 + _OMAP3_BALLENTRY(MCBSP2_FSX, "p21", NULL),
  1929 + _OMAP3_BALLENTRY(MCBSP3_CLKX, "af5", NULL),
  1930 + _OMAP3_BALLENTRY(MCBSP3_DR, "ae6", NULL),
  1931 + _OMAP3_BALLENTRY(MCBSP3_DX, "af6", NULL),
  1932 + _OMAP3_BALLENTRY(MCBSP3_FSX, "ae5", NULL),
  1933 + _OMAP3_BALLENTRY(MCBSP4_CLKX, "ae1", NULL),
  1934 + _OMAP3_BALLENTRY(MCBSP4_DR, "ad1", NULL),
  1935 + _OMAP3_BALLENTRY(MCBSP4_DX, "ad2", NULL),
  1936 + _OMAP3_BALLENTRY(MCBSP4_FSX, "ac1", NULL),
  1937 + _OMAP3_BALLENTRY(MCBSP_CLKS, "t21", NULL),
  1938 + _OMAP3_BALLENTRY(MCSPI1_CLK, "ab3", NULL),
  1939 + _OMAP3_BALLENTRY(MCSPI1_CS0, "ac2", NULL),
  1940 + _OMAP3_BALLENTRY(MCSPI1_CS1, "ac3", NULL),
  1941 + _OMAP3_BALLENTRY(MCSPI1_CS2, "ab1", NULL),
  1942 + _OMAP3_BALLENTRY(MCSPI1_CS3, "ab2", NULL),
  1943 + _OMAP3_BALLENTRY(MCSPI1_SIMO, "ab4", NULL),
  1944 + _OMAP3_BALLENTRY(MCSPI1_SOMI, "aa4", NULL),
  1945 + _OMAP3_BALLENTRY(MCSPI2_CLK, "aa3", NULL),
  1946 + _OMAP3_BALLENTRY(MCSPI2_CS0, "y4", NULL),
  1947 + _OMAP3_BALLENTRY(MCSPI2_CS1, "v3", NULL),
  1948 + _OMAP3_BALLENTRY(MCSPI2_SIMO, "y2", NULL),
  1949 + _OMAP3_BALLENTRY(MCSPI2_SOMI, "y3", NULL),
  1950 + _OMAP3_BALLENTRY(SDMMC1_CLK, "n28", NULL),
  1951 + _OMAP3_BALLENTRY(SDMMC1_CMD, "m27", NULL),
  1952 + _OMAP3_BALLENTRY(SDMMC1_DAT0, "n27", NULL),
  1953 + _OMAP3_BALLENTRY(SDMMC1_DAT1, "n26", NULL),
  1954 + _OMAP3_BALLENTRY(SDMMC1_DAT2, "n25", NULL),
  1955 + _OMAP3_BALLENTRY(SDMMC1_DAT3, "p28", NULL),
  1956 + _OMAP3_BALLENTRY(SDMMC2_CLK, "ae2", NULL),
  1957 + _OMAP3_BALLENTRY(SDMMC2_CMD, "ag5", NULL),
  1958 + _OMAP3_BALLENTRY(SDMMC2_DAT0, "ah5", NULL),
  1959 + _OMAP3_BALLENTRY(SDMMC2_DAT1, "ah4", NULL),
  1960 + _OMAP3_BALLENTRY(SDMMC2_DAT2, "ag4", NULL),
  1961 + _OMAP3_BALLENTRY(SDMMC2_DAT3, "af4", NULL),
  1962 + _OMAP3_BALLENTRY(SDMMC2_DAT4, "ae4", NULL),
  1963 + _OMAP3_BALLENTRY(SDMMC2_DAT5, "ah3", NULL),
  1964 + _OMAP3_BALLENTRY(SDMMC2_DAT6, "af3", NULL),
  1965 + _OMAP3_BALLENTRY(SDMMC2_DAT7, "ae3", NULL),
  1966 + _OMAP3_BALLENTRY(SDRC_A0, NULL, "n22"),
  1967 + _OMAP3_BALLENTRY(SDRC_A1, NULL, "n23"),
  1968 + _OMAP3_BALLENTRY(SDRC_A10, NULL, "v22"),
  1969 + _OMAP3_BALLENTRY(SDRC_A11, NULL, "v23"),
  1970 + _OMAP3_BALLENTRY(SDRC_A12, NULL, "w22"),
  1971 + _OMAP3_BALLENTRY(SDRC_A13, NULL, "w23"),
  1972 + _OMAP3_BALLENTRY(SDRC_A14, NULL, "y22"),
  1973 + _OMAP3_BALLENTRY(SDRC_A2, NULL, "p22"),
  1974 + _OMAP3_BALLENTRY(SDRC_A3, NULL, "p23"),
  1975 + _OMAP3_BALLENTRY(SDRC_A4, NULL, "r22"),
  1976 + _OMAP3_BALLENTRY(SDRC_A5, NULL, "r23"),
  1977 + _OMAP3_BALLENTRY(SDRC_A6, NULL, "t22"),
  1978 + _OMAP3_BALLENTRY(SDRC_A7, NULL, "t23"),
  1979 + _OMAP3_BALLENTRY(SDRC_A8, NULL, "u22"),
  1980 + _OMAP3_BALLENTRY(SDRC_A9, NULL, "u23"),
  1981 + _OMAP3_BALLENTRY(SDRC_BA0, "h9", "ab21"),
  1982 + _OMAP3_BALLENTRY(SDRC_BA1, "h10", "ac21"),
  1983 + _OMAP3_BALLENTRY(SDRC_CKE0, "h16", "j22"),
  1984 + _OMAP3_BALLENTRY(SDRC_CKE1, "h17", "j23"),
  1985 + _OMAP3_BALLENTRY(SDRC_CLK, "a13", "a11"),
  1986 + _OMAP3_BALLENTRY(SDRC_D0, NULL, "j2"),
  1987 + _OMAP3_BALLENTRY(SDRC_D1, NULL, "j1"),
  1988 + _OMAP3_BALLENTRY(SDRC_D10, "c15", "b14"),
  1989 + _OMAP3_BALLENTRY(SDRC_D11, "b16", "a14"),
  1990 + _OMAP3_BALLENTRY(SDRC_D12, "d17", "b16"),
  1991 + _OMAP3_BALLENTRY(SDRC_D13, "c17", "a16"),
  1992 + _OMAP3_BALLENTRY(SDRC_D14, "b17", "b19"),
  1993 + _OMAP3_BALLENTRY(SDRC_D15, "d18", "a19"),
  1994 + _OMAP3_BALLENTRY(SDRC_D16, NULL, "b3"),
  1995 + _OMAP3_BALLENTRY(SDRC_D17, NULL, "a3"),
  1996 + _OMAP3_BALLENTRY(SDRC_D18, NULL, "b5"),
  1997 + _OMAP3_BALLENTRY(SDRC_D19, NULL, "a5"),
  1998 + _OMAP3_BALLENTRY(SDRC_D2, NULL, "g2"),
  1999 + _OMAP3_BALLENTRY(SDRC_D20, NULL, "b8"),
  2000 + _OMAP3_BALLENTRY(SDRC_D21, NULL, "a8"),
  2001 + _OMAP3_BALLENTRY(SDRC_D22, NULL, "b9"),
  2002 + _OMAP3_BALLENTRY(SDRC_D23, NULL, "a9"),
  2003 + _OMAP3_BALLENTRY(SDRC_D24, NULL, "b21"),
  2004 + _OMAP3_BALLENTRY(SDRC_D25, NULL, "a21"),
  2005 + _OMAP3_BALLENTRY(SDRC_D26, NULL, "d22"),
  2006 + _OMAP3_BALLENTRY(SDRC_D27, NULL, "d23"),
  2007 + _OMAP3_BALLENTRY(SDRC_D28, NULL, "e22"),
  2008 + _OMAP3_BALLENTRY(SDRC_D29, NULL, "e23"),
  2009 + _OMAP3_BALLENTRY(SDRC_D3, NULL, "g1"),
  2010 + _OMAP3_BALLENTRY(SDRC_D30, NULL, "g22"),
  2011 + _OMAP3_BALLENTRY(SDRC_D31, NULL, "g23"),
  2012 + _OMAP3_BALLENTRY(SDRC_D4, NULL, "f2"),
  2013 + _OMAP3_BALLENTRY(SDRC_D5, NULL, "f1"),
  2014 + _OMAP3_BALLENTRY(SDRC_D6, NULL, "d2"),
  2015 + _OMAP3_BALLENTRY(SDRC_D7, NULL, "d1"),
  2016 + _OMAP3_BALLENTRY(SDRC_D8, "c14", "b13"),
  2017 + _OMAP3_BALLENTRY(SDRC_D9, "b14", "a13"),
  2018 + _OMAP3_BALLENTRY(SDRC_DM0, NULL, "c1"),
  2019 + _OMAP3_BALLENTRY(SDRC_DM1, "a16", "a17"),
  2020 + _OMAP3_BALLENTRY(SDRC_DM2, NULL, "a6"),
  2021 + _OMAP3_BALLENTRY(SDRC_DM3, NULL, "a20"),
  2022 + _OMAP3_BALLENTRY(SDRC_DQS0, NULL, "c2"),
  2023 + _OMAP3_BALLENTRY(SDRC_DQS1, "a17", "b17"),
  2024 + _OMAP3_BALLENTRY(SDRC_DQS2, NULL, "b6"),
  2025 + _OMAP3_BALLENTRY(SDRC_DQS3, NULL, "b20"),
  2026 + _OMAP3_BALLENTRY(SDRC_NCAS, "h13", "l22"),
  2027 + _OMAP3_BALLENTRY(SDRC_NCLK, "a14", "b11"),
  2028 + _OMAP3_BALLENTRY(SDRC_NCS0, "h11", "m22"),
  2029 + _OMAP3_BALLENTRY(SDRC_NCS1, "h12", "m23"),
  2030 + _OMAP3_BALLENTRY(SDRC_NRAS, "h14", "l23"),
  2031 + _OMAP3_BALLENTRY(SDRC_NWE, "h15", "k23"),
  2032 + _OMAP3_BALLENTRY(SIM_CLK, "p26", NULL),
  2033 + _OMAP3_BALLENTRY(SIM_IO, "p27", NULL),
  2034 + _OMAP3_BALLENTRY(SIM_PWRCTRL, "r27", NULL),
  2035 + _OMAP3_BALLENTRY(SIM_RST, "r25", NULL),
  2036 + _OMAP3_BALLENTRY(SYS_32K, "ae25", NULL),
  2037 + _OMAP3_BALLENTRY(SYS_BOOT0, "ah26", NULL),
  2038 + _OMAP3_BALLENTRY(SYS_BOOT1, "ag26", NULL),
  2039 + _OMAP3_BALLENTRY(SYS_BOOT2, "ae14", NULL),
  2040 + _OMAP3_BALLENTRY(SYS_BOOT3, "af18", NULL),
  2041 + _OMAP3_BALLENTRY(SYS_BOOT4, "af19", NULL),
  2042 + _OMAP3_BALLENTRY(SYS_BOOT5, "ae21", NULL),
  2043 + _OMAP3_BALLENTRY(SYS_BOOT6, "af21", NULL),
  2044 + _OMAP3_BALLENTRY(SYS_CLKOUT1, "ag25", NULL),
  2045 + _OMAP3_BALLENTRY(SYS_CLKOUT2, "ae22", NULL),
  2046 + _OMAP3_BALLENTRY(SYS_CLKREQ, "af25", NULL),
  2047 + _OMAP3_BALLENTRY(SYS_NIRQ, "af26", NULL),
  2048 + _OMAP3_BALLENTRY(SYS_NRESWARM, "af24", NULL),
  2049 + _OMAP3_BALLENTRY(SYS_OFF_MODE, "af22", NULL),
  2050 + _OMAP3_BALLENTRY(UART1_CTS, "w8", NULL),
  2051 + _OMAP3_BALLENTRY(UART1_RTS, "aa9", NULL),
  2052 + _OMAP3_BALLENTRY(UART1_RX, "y8", NULL),
  2053 + _OMAP3_BALLENTRY(UART1_TX, "aa8", NULL),
  2054 + _OMAP3_BALLENTRY(UART2_CTS, "ab26", NULL),
  2055 + _OMAP3_BALLENTRY(UART2_RTS, "ab25", NULL),
  2056 + _OMAP3_BALLENTRY(UART2_RX, "ad25", NULL),
  2057 + _OMAP3_BALLENTRY(UART2_TX, "aa25", NULL),
  2058 + _OMAP3_BALLENTRY(UART3_CTS_RCTX, "h18", NULL),
  2059 + _OMAP3_BALLENTRY(UART3_RTS_SD, "h19", NULL),
  2060 + _OMAP3_BALLENTRY(UART3_RX_IRRX, "h20", NULL),
  2061 + _OMAP3_BALLENTRY(UART3_TX_IRTX, "h21", NULL),
  2062 + { .reg_offset = OMAP_MUX_TERMINATOR },
  2063 +};
  2064 +#else
  2065 +#define omap36xx_cbp_ball NULL
  2066 +#endif
  2067 +
1552 2068 int __init omap3_mux_init(struct omap_board_mux *board_subset, int flags)
1553 2069 {
1554 2070 struct omap_mux *package_subset;
... ... @@ -1566,6 +2082,10 @@
1566 2082 case (OMAP_PACKAGE_CUS):
1567 2083 package_subset = omap3_cus_subset;
1568 2084 package_balls = omap3_cus_ball;
  2085 + break;
  2086 + case (OMAP_PACKAGE_CBP):
  2087 + package_subset = omap36xx_cbp_subset;
  2088 + package_balls = omap36xx_cbp_ball;
1569 2089 break;
1570 2090 default:
1571 2091 printk(KERN_ERR "mux: Unknown omap package, mux disabled\n");
arch/arm/mach-omap2/mux34xx.h
Diff comments   View file @ 662c8b5
... ... @@ -170,10 +170,13 @@
170 170 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT1_OFFSET 0x11a
171 171 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT2_OFFSET 0x11c
172 172 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT3_OFFSET 0x11e
  173 +
  174 +/* SDMMC1_DAT4 - DAT7 are SIM_IO SIM_CLK SIM_PWRCTRL and SIM_RST on 36xx */
173 175 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT4_OFFSET 0x120
174 176 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT5_OFFSET 0x122
175 177 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT6_OFFSET 0x124
176 178 #define OMAP3_CONTROL_PADCONF_SDMMC1_DAT7_OFFSET 0x126
  179 +
177 180 #define OMAP3_CONTROL_PADCONF_SDMMC2_CLK_OFFSET 0x128
178 181 #define OMAP3_CONTROL_PADCONF_SDMMC2_CMD_OFFSET 0x12a
179 182 #define OMAP3_CONTROL_PADCONF_SDMMC2_DAT0_OFFSET 0x12c
... ... @@ -281,6 +284,7 @@
281 284 #define OMAP3_CONTROL_PADCONF_SAD2D_MCAD34_OFFSET 0x1f8
282 285 #define OMAP3_CONTROL_PADCONF_SAD2D_MCAD35_OFFSET 0x1fa
283 286 #define OMAP3_CONTROL_PADCONF_SAD2D_MCAD36_OFFSET 0x1fc
  287 +
284 288 /* Note that 34xx TRM has SAD2D instead of CHASSIS for these */
285 289 #define OMAP3_CONTROL_PADCONF_CHASSIS_CLK26MI_OFFSET 0x1fe
286 290 #define OMAP3_CONTROL_PADCONF_CHASSIS_NRESPWRON_OFFSET 0x200
... ... @@ -302,6 +306,7 @@
302 306 #define OMAP3_CONTROL_PADCONF_CHASSIS_MSTDBY_OFFSET 0x220
303 307 #define OMAP3_CONTROL_PADCONF_CHASSIS_IDLEREQ_OFFSET 0x222
304 308 #define OMAP3_CONTROL_PADCONF_CHASSIS_IDLEACK_OFFSET 0x224
  309 +
305 310 #define OMAP3_CONTROL_PADCONF_SAD2D_MWRITE_OFFSET 0x226
306 311 #define OMAP3_CONTROL_PADCONF_SAD2D_SWRITE_OFFSET 0x228
307 312 #define OMAP3_CONTROL_PADCONF_SAD2D_MREAD_OFFSET 0x22a
... ... @@ -310,6 +315,43 @@
310 315 #define OMAP3_CONTROL_PADCONF_SAD2D_SBUSFLAG_OFFSET 0x230
311 316 #define OMAP3_CONTROL_PADCONF_SDRC_CKE0_OFFSET 0x232
312 317 #define OMAP3_CONTROL_PADCONF_SDRC_CKE1_OFFSET 0x234
  318 +
  319 +/* 36xx only */
  320 +#define OMAP3_CONTROL_PADCONF_GPMC_A11_OFFSET 0x236
  321 +#define OMAP3_CONTROL_PADCONF_SDRC_BA0_OFFSET 0x570
  322 +#define OMAP3_CONTROL_PADCONF_SDRC_BA1_OFFSET 0x572
  323 +#define OMAP3_CONTROL_PADCONF_SDRC_A0_OFFSET 0x574
  324 +#define OMAP3_CONTROL_PADCONF_SDRC_A1_OFFSET 0x576
  325 +#define OMAP3_CONTROL_PADCONF_SDRC_A2_OFFSET 0x578
  326 +#define OMAP3_CONTROL_PADCONF_SDRC_A3_OFFSET 0x57a
  327 +#define OMAP3_CONTROL_PADCONF_SDRC_A4_OFFSET 0x57c
  328 +#define OMAP3_CONTROL_PADCONF_SDRC_A5_OFFSET 0x57e
  329 +#define OMAP3_CONTROL_PADCONF_SDRC_A6_OFFSET 0x580
  330 +#define OMAP3_CONTROL_PADCONF_SDRC_A7_OFFSET 0x582
  331 +#define OMAP3_CONTROL_PADCONF_SDRC_A8_OFFSET 0x584
  332 +#define OMAP3_CONTROL_PADCONF_SDRC_A9_OFFSET 0x586
  333 +#define OMAP3_CONTROL_PADCONF_SDRC_A10_OFFSET 0x588
  334 +#define OMAP3_CONTROL_PADCONF_SDRC_A11_OFFSET 0x58a
  335 +#define OMAP3_CONTROL_PADCONF_SDRC_A12_OFFSET 0x58c
  336 +#define OMAP3_CONTROL_PADCONF_SDRC_A13_OFFSET 0x58e
  337 +#define OMAP3_CONTROL_PADCONF_SDRC_A14_OFFSET 0x590
  338 +#define OMAP3_CONTROL_PADCONF_SDRC_NCS0_OFFSET 0x592
  339 +#define OMAP3_CONTROL_PADCONF_SDRC_NCS1_OFFSET 0x594
  340 +#define OMAP3_CONTROL_PADCONF_SDRC_NCLK_OFFSET 0x596
  341 +#define OMAP3_CONTROL_PADCONF_SDRC_NRAS_OFFSET 0x598
  342 +#define OMAP3_CONTROL_PADCONF_SDRC_NCAS_OFFSET 0x59a
  343 +#define OMAP3_CONTROL_PADCONF_SDRC_NWE_OFFSET 0x59c
  344 +#define OMAP3_CONTROL_PADCONF_SDRC_DM0_OFFSET 0x59e
  345 +#define OMAP3_CONTROL_PADCONF_SDRC_DM1_OFFSET 0x5a0
  346 +#define OMAP3_CONTROL_PADCONF_SDRC_DM2_OFFSET 0x5a2
  347 +#define OMAP3_CONTROL_PADCONF_SDRC_DM3_OFFSET 0x5a4
  348 +
  349 +/* 36xx only, these are SDMMC1_DAT4 - DAT7 on 34xx */
  350 +#define OMAP3_CONTROL_PADCONF_SIM_IO_OFFSET 0x120
  351 +#define OMAP3_CONTROL_PADCONF_SIM_CLK_OFFSET 0x122
  352 +#define OMAP3_CONTROL_PADCONF_SIM_PWRCTRL_OFFSET 0x124
  353 +#define OMAP3_CONTROL_PADCONF_SIM_RST_OFFSET 0x126
  354 +
313 355 #define OMAP3_CONTROL_PADCONF_ETK_CLK_OFFSET 0x5a8
314 356 #define OMAP3_CONTROL_PADCONF_ETK_CTL_OFFSET 0x5aa
315 357 #define OMAP3_CONTROL_PADCONF_ETK_D0_OFFSET 0x5ac