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Commit 687c80540975709844699d9a96070e2cf3bad39d

Authored by Joe Perches
Committed by Ingo Molnar
1 parent 8fdf765527
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

include/asm-x86/xor_64.h: checkpatch cleanups - formatting only 

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

Showing 1 changed file with 149 additions and 145 deletions Side-by-side Diff

include/asm-x86/xor_64.h
Diff comments   View file @ 687c805
... ... @@ -24,20 +24,23 @@
24 24 */
25 25  
26 26 /*
27   - * x86-64 changes / gcc fixes from Andi Kleen.
  27 + * x86-64 changes / gcc fixes from Andi Kleen.
28 28 * Copyright 2002 Andi Kleen, SuSE Labs.
29 29 *
30 30 * This hasn't been optimized for the hammer yet, but there are likely
31 31 * no advantages to be gotten from x86-64 here anyways.
32 32 */
33 33  
34   -typedef struct { unsigned long a,b; } __attribute__((aligned(16))) xmm_store_t;
  34 +typedef struct {
  35 + unsigned long a, b;
  36 +} __attribute__((aligned(16))) xmm_store_t;
35 37  
36   -/* Doesn't use gcc to save the XMM registers, because there is no easy way to
  38 +/* Doesn't use gcc to save the XMM registers, because there is no easy way to
37 39 tell it to do a clts before the register saving. */
38   -#define XMMS_SAVE do { \
  40 +#define XMMS_SAVE \
  41 +do { \
39 42 preempt_disable(); \
40   - asm volatile ( \
  43 + asm volatile( \
41 44 "movq %%cr0,%0 ;\n\t" \
42 45 "clts ;\n\t" \
43 46 "movups %%xmm0,(%1) ;\n\t" \
44 47  
... ... @@ -47,10 +50,11 @@
47 50 : "=&r" (cr0) \
48 51 : "r" (xmm_save) \
49 52 : "memory"); \
50   -} while(0)
  53 +} while (0)
51 54  
52   -#define XMMS_RESTORE do { \
53   - asm volatile ( \
  55 +#define XMMS_RESTORE \
  56 +do { \
  57 + asm volatile( \
54 58 "sfence ;\n\t" \
55 59 "movups (%1),%%xmm0 ;\n\t" \
56 60 "movups 0x10(%1),%%xmm1 ;\n\t" \
57 61  
58 62  
59 63  
60 64  
61 65  
62 66  
63 67  
64 68  
65 69  
... ... @@ -61,72 +65,72 @@
61 65 : "r" (cr0), "r" (xmm_save) \
62 66 : "memory"); \
63 67 preempt_enable(); \
64   -} while(0)
  68 +} while (0)
65 69  
66 70 #define OFFS(x) "16*("#x")"
67 71 #define PF_OFFS(x) "256+16*("#x")"
68 72 #define PF0(x) " prefetchnta "PF_OFFS(x)"(%[p1]) ;\n"
69   -#define LD(x,y) " movaps "OFFS(x)"(%[p1]), %%xmm"#y" ;\n"
70   -#define ST(x,y) " movaps %%xmm"#y", "OFFS(x)"(%[p1]) ;\n"
  73 +#define LD(x, y) " movaps "OFFS(x)"(%[p1]), %%xmm"#y" ;\n"
  74 +#define ST(x, y) " movaps %%xmm"#y", "OFFS(x)"(%[p1]) ;\n"
71 75 #define PF1(x) " prefetchnta "PF_OFFS(x)"(%[p2]) ;\n"
72 76 #define PF2(x) " prefetchnta "PF_OFFS(x)"(%[p3]) ;\n"
73 77 #define PF3(x) " prefetchnta "PF_OFFS(x)"(%[p4]) ;\n"
74 78 #define PF4(x) " prefetchnta "PF_OFFS(x)"(%[p5]) ;\n"
75 79 #define PF5(x) " prefetchnta "PF_OFFS(x)"(%[p6]) ;\n"
76   -#define XO1(x,y) " xorps "OFFS(x)"(%[p2]), %%xmm"#y" ;\n"
77   -#define XO2(x,y) " xorps "OFFS(x)"(%[p3]), %%xmm"#y" ;\n"
78   -#define XO3(x,y) " xorps "OFFS(x)"(%[p4]), %%xmm"#y" ;\n"
79   -#define XO4(x,y) " xorps "OFFS(x)"(%[p5]), %%xmm"#y" ;\n"
80   -#define XO5(x,y) " xorps "OFFS(x)"(%[p6]), %%xmm"#y" ;\n"
  80 +#define XO1(x, y) " xorps "OFFS(x)"(%[p2]), %%xmm"#y" ;\n"
  81 +#define XO2(x, y) " xorps "OFFS(x)"(%[p3]), %%xmm"#y" ;\n"
  82 +#define XO3(x, y) " xorps "OFFS(x)"(%[p4]), %%xmm"#y" ;\n"
  83 +#define XO4(x, y) " xorps "OFFS(x)"(%[p5]), %%xmm"#y" ;\n"
  84 +#define XO5(x, y) " xorps "OFFS(x)"(%[p6]), %%xmm"#y" ;\n"
81 85  
82 86  
83 87 static void
84 88 xor_sse_2(unsigned long bytes, unsigned long *p1, unsigned long *p2)
85 89 {
86   - unsigned int lines = bytes >> 8;
  90 + unsigned int lines = bytes >> 8;
87 91 unsigned long cr0;
88 92 xmm_store_t xmm_save[4];
89 93  
90 94 XMMS_SAVE;
91 95  
92   - asm volatile (
  96 + asm volatile(
93 97 #undef BLOCK
94 98 #define BLOCK(i) \
95   - LD(i,0) \
96   - LD(i+1,1) \
  99 + LD(i, 0) \
  100 + LD(i + 1, 1) \
97 101 PF1(i) \
98   - PF1(i+2) \
99   - LD(i+2,2) \
100   - LD(i+3,3) \
101   - PF0(i+4) \
102   - PF0(i+6) \
103   - XO1(i,0) \
104   - XO1(i+1,1) \
105   - XO1(i+2,2) \
106   - XO1(i+3,3) \
107   - ST(i,0) \
108   - ST(i+1,1) \
109   - ST(i+2,2) \
110   - ST(i+3,3) \
  102 + PF1(i + 2) \
  103 + LD(i + 2, 2) \
  104 + LD(i + 3, 3) \
  105 + PF0(i + 4) \
  106 + PF0(i + 6) \
  107 + XO1(i, 0) \
  108 + XO1(i + 1, 1) \
  109 + XO1(i + 2, 2) \
  110 + XO1(i + 3, 3) \
  111 + ST(i, 0) \
  112 + ST(i + 1, 1) \
  113 + ST(i + 2, 2) \
  114 + ST(i + 3, 3) \
111 115  
112 116  
113 117 PF0(0)
114 118 PF0(2)
115 119  
116 120 " .align 32 ;\n"
117   - " 1: ;\n"
  121 + " 1: ;\n"
118 122  
119 123 BLOCK(0)
120 124 BLOCK(4)
121 125 BLOCK(8)
122 126 BLOCK(12)
123 127  
124   - " addq %[inc], %[p1] ;\n"
125   - " addq %[inc], %[p2] ;\n"
  128 + " addq %[inc], %[p1] ;\n"
  129 + " addq %[inc], %[p2] ;\n"
126 130 " decl %[cnt] ; jnz 1b"
127 131 : [p1] "+r" (p1), [p2] "+r" (p2), [cnt] "+r" (lines)
128   - : [inc] "r" (256UL)
129   - : "memory");
  132 + : [inc] "r" (256UL)
  133 + : "memory");
130 134  
131 135 XMMS_RESTORE;
132 136 }
133 137  
134 138  
135 139  
136 140  
137 141  
... ... @@ -141,52 +145,52 @@
141 145  
142 146 XMMS_SAVE;
143 147  
144   - __asm__ __volatile__ (
  148 + asm volatile(
145 149 #undef BLOCK
146 150 #define BLOCK(i) \
147 151 PF1(i) \
148   - PF1(i+2) \
149   - LD(i,0) \
150   - LD(i+1,1) \
151   - LD(i+2,2) \
152   - LD(i+3,3) \
  152 + PF1(i + 2) \
  153 + LD(i, 0) \
  154 + LD(i + 1, 1) \
  155 + LD(i + 2, 2) \
  156 + LD(i + 3, 3) \
153 157 PF2(i) \
154   - PF2(i+2) \
155   - PF0(i+4) \
156   - PF0(i+6) \
157   - XO1(i,0) \
158   - XO1(i+1,1) \
159   - XO1(i+2,2) \
160   - XO1(i+3,3) \
161   - XO2(i,0) \
162   - XO2(i+1,1) \
163   - XO2(i+2,2) \
164   - XO2(i+3,3) \
165   - ST(i,0) \
166   - ST(i+1,1) \
167   - ST(i+2,2) \
168   - ST(i+3,3) \
  158 + PF2(i + 2) \
  159 + PF0(i + 4) \
  160 + PF0(i + 6) \
  161 + XO1(i, 0) \
  162 + XO1(i + 1, 1) \
  163 + XO1(i + 2, 2) \
  164 + XO1(i + 3, 3) \
  165 + XO2(i, 0) \
  166 + XO2(i + 1, 1) \
  167 + XO2(i + 2, 2) \
  168 + XO2(i + 3, 3) \
  169 + ST(i, 0) \
  170 + ST(i + 1, 1) \
  171 + ST(i + 2, 2) \
  172 + ST(i + 3, 3) \
169 173  
170 174  
171 175 PF0(0)
172 176 PF0(2)
173 177  
174 178 " .align 32 ;\n"
175   - " 1: ;\n"
  179 + " 1: ;\n"
176 180  
177 181 BLOCK(0)
178 182 BLOCK(4)
179 183 BLOCK(8)
180 184 BLOCK(12)
181 185  
182   - " addq %[inc], %[p1] ;\n"
183   - " addq %[inc], %[p2] ;\n"
184   - " addq %[inc], %[p3] ;\n"
  186 + " addq %[inc], %[p1] ;\n"
  187 + " addq %[inc], %[p2] ;\n"
  188 + " addq %[inc], %[p3] ;\n"
185 189 " decl %[cnt] ; jnz 1b"
186 190 : [cnt] "+r" (lines),
187 191 [p1] "+r" (p1), [p2] "+r" (p2), [p3] "+r" (p3)
188 192 : [inc] "r" (256UL)
189   - : "memory");
  193 + : "memory");
190 194 XMMS_RESTORE;
191 195 }
192 196  
193 197  
194 198  
195 199  
196 200  
197 201  
198 202  
199 203  
... ... @@ -195,64 +199,64 @@
195 199 unsigned long *p3, unsigned long *p4)
196 200 {
197 201 unsigned int lines = bytes >> 8;
198   - xmm_store_t xmm_save[4];
  202 + xmm_store_t xmm_save[4];
199 203 unsigned long cr0;
200 204  
201 205 XMMS_SAVE;
202 206  
203   - __asm__ __volatile__ (
  207 + asm volatile(
204 208 #undef BLOCK
205 209 #define BLOCK(i) \
206 210 PF1(i) \
207   - PF1(i+2) \
208   - LD(i,0) \
209   - LD(i+1,1) \
210   - LD(i+2,2) \
211   - LD(i+3,3) \
  211 + PF1(i + 2) \
  212 + LD(i, 0) \
  213 + LD(i + 1, 1) \
  214 + LD(i + 2, 2) \
  215 + LD(i + 3, 3) \
212 216 PF2(i) \
213   - PF2(i+2) \
214   - XO1(i,0) \
215   - XO1(i+1,1) \
216   - XO1(i+2,2) \
217   - XO1(i+3,3) \
  217 + PF2(i + 2) \
  218 + XO1(i, 0) \
  219 + XO1(i + 1, 1) \
  220 + XO1(i + 2, 2) \
  221 + XO1(i + 3, 3) \
218 222 PF3(i) \
219   - PF3(i+2) \
220   - PF0(i+4) \
221   - PF0(i+6) \
222   - XO2(i,0) \
223   - XO2(i+1,1) \
224   - XO2(i+2,2) \
225   - XO2(i+3,3) \
226   - XO3(i,0) \
227   - XO3(i+1,1) \
228   - XO3(i+2,2) \
229   - XO3(i+3,3) \
230   - ST(i,0) \
231   - ST(i+1,1) \
232   - ST(i+2,2) \
233   - ST(i+3,3) \
  223 + PF3(i + 2) \
  224 + PF0(i + 4) \
  225 + PF0(i + 6) \
  226 + XO2(i, 0) \
  227 + XO2(i + 1, 1) \
  228 + XO2(i + 2, 2) \
  229 + XO2(i + 3, 3) \
  230 + XO3(i, 0) \
  231 + XO3(i + 1, 1) \
  232 + XO3(i + 2, 2) \
  233 + XO3(i + 3, 3) \
  234 + ST(i, 0) \
  235 + ST(i + 1, 1) \
  236 + ST(i + 2, 2) \
  237 + ST(i + 3, 3) \
234 238  
235 239  
236 240 PF0(0)
237 241 PF0(2)
238 242  
239 243 " .align 32 ;\n"
240   - " 1: ;\n"
  244 + " 1: ;\n"
241 245  
242 246 BLOCK(0)
243 247 BLOCK(4)
244 248 BLOCK(8)
245 249 BLOCK(12)
246 250  
247   - " addq %[inc], %[p1] ;\n"
248   - " addq %[inc], %[p2] ;\n"
249   - " addq %[inc], %[p3] ;\n"
250   - " addq %[inc], %[p4] ;\n"
  251 + " addq %[inc], %[p1] ;\n"
  252 + " addq %[inc], %[p2] ;\n"
  253 + " addq %[inc], %[p3] ;\n"
  254 + " addq %[inc], %[p4] ;\n"
251 255 " decl %[cnt] ; jnz 1b"
252 256 : [cnt] "+c" (lines),
253 257 [p1] "+r" (p1), [p2] "+r" (p2), [p3] "+r" (p3), [p4] "+r" (p4)
254 258 : [inc] "r" (256UL)
255   - : "memory" );
  259 + : "memory" );
256 260  
257 261 XMMS_RESTORE;
258 262 }
259 263  
260 264  
261 265  
262 266  
263 267  
264 268  
265 269  
266 270  
... ... @@ -261,70 +265,70 @@
261 265 xor_sse_5(unsigned long bytes, unsigned long *p1, unsigned long *p2,
262 266 unsigned long *p3, unsigned long *p4, unsigned long *p5)
263 267 {
264   - unsigned int lines = bytes >> 8;
  268 + unsigned int lines = bytes >> 8;
265 269 xmm_store_t xmm_save[4];
266 270 unsigned long cr0;
267 271  
268 272 XMMS_SAVE;
269 273  
270   - __asm__ __volatile__ (
  274 + asm volatile(
271 275 #undef BLOCK
272 276 #define BLOCK(i) \
273 277 PF1(i) \
274   - PF1(i+2) \
275   - LD(i,0) \
276   - LD(i+1,1) \
277   - LD(i+2,2) \
278   - LD(i+3,3) \
  278 + PF1(i + 2) \
  279 + LD(i, 0) \
  280 + LD(i + 1, 1) \
  281 + LD(i + 2, 2) \
  282 + LD(i + 3, 3) \
279 283 PF2(i) \
280   - PF2(i+2) \
281   - XO1(i,0) \
282   - XO1(i+1,1) \
283   - XO1(i+2,2) \
284   - XO1(i+3,3) \
  284 + PF2(i + 2) \
  285 + XO1(i, 0) \
  286 + XO1(i + 1, 1) \
  287 + XO1(i + 2, 2) \
  288 + XO1(i + 3, 3) \
285 289 PF3(i) \
286   - PF3(i+2) \
287   - XO2(i,0) \
288   - XO2(i+1,1) \
289   - XO2(i+2,2) \
290   - XO2(i+3,3) \
  290 + PF3(i + 2) \
  291 + XO2(i, 0) \
  292 + XO2(i + 1, 1) \
  293 + XO2(i + 2, 2) \
  294 + XO2(i + 3, 3) \
291 295 PF4(i) \
292   - PF4(i+2) \
293   - PF0(i+4) \
294   - PF0(i+6) \
295   - XO3(i,0) \
296   - XO3(i+1,1) \
297   - XO3(i+2,2) \
298   - XO3(i+3,3) \
299   - XO4(i,0) \
300   - XO4(i+1,1) \
301   - XO4(i+2,2) \
302   - XO4(i+3,3) \
303   - ST(i,0) \
304   - ST(i+1,1) \
305   - ST(i+2,2) \
306   - ST(i+3,3) \
  296 + PF4(i + 2) \
  297 + PF0(i + 4) \
  298 + PF0(i + 6) \
  299 + XO3(i, 0) \
  300 + XO3(i + 1, 1) \
  301 + XO3(i + 2, 2) \
  302 + XO3(i + 3, 3) \
  303 + XO4(i, 0) \
  304 + XO4(i + 1, 1) \
  305 + XO4(i + 2, 2) \
  306 + XO4(i + 3, 3) \
  307 + ST(i, 0) \
  308 + ST(i + 1, 1) \
  309 + ST(i + 2, 2) \
  310 + ST(i + 3, 3) \
307 311  
308 312  
309 313 PF0(0)
310 314 PF0(2)
311 315  
312 316 " .align 32 ;\n"
313   - " 1: ;\n"
  317 + " 1: ;\n"
314 318  
315 319 BLOCK(0)
316 320 BLOCK(4)
317 321 BLOCK(8)
318 322 BLOCK(12)
319 323  
320   - " addq %[inc], %[p1] ;\n"
321   - " addq %[inc], %[p2] ;\n"
322   - " addq %[inc], %[p3] ;\n"
323   - " addq %[inc], %[p4] ;\n"
324   - " addq %[inc], %[p5] ;\n"
  324 + " addq %[inc], %[p1] ;\n"
  325 + " addq %[inc], %[p2] ;\n"
  326 + " addq %[inc], %[p3] ;\n"
  327 + " addq %[inc], %[p4] ;\n"
  328 + " addq %[inc], %[p5] ;\n"
325 329 " decl %[cnt] ; jnz 1b"
326 330 : [cnt] "+c" (lines),
327   - [p1] "+r" (p1), [p2] "+r" (p2), [p3] "+r" (p3), [p4] "+r" (p4),
  331 + [p1] "+r" (p1), [p2] "+r" (p2), [p3] "+r" (p3), [p4] "+r" (p4),
328 332 [p5] "+r" (p5)
329 333 : [inc] "r" (256UL)
330 334 : "memory");
331 335  
... ... @@ -333,18 +337,18 @@
333 337 }
334 338  
335 339 static struct xor_block_template xor_block_sse = {
336   - .name = "generic_sse",
337   - .do_2 = xor_sse_2,
338   - .do_3 = xor_sse_3,
339   - .do_4 = xor_sse_4,
340   - .do_5 = xor_sse_5,
  340 + .name = "generic_sse",
  341 + .do_2 = xor_sse_2,
  342 + .do_3 = xor_sse_3,
  343 + .do_4 = xor_sse_4,
  344 + .do_5 = xor_sse_5,
341 345 };
342 346  
343 347 #undef XOR_TRY_TEMPLATES
344   -#define XOR_TRY_TEMPLATES \
345   - do { \
346   - xor_speed(&xor_block_sse); \
347   - } while (0)
  348 +#define XOR_TRY_TEMPLATES \
  349 +do { \
  350 + xor_speed(&xor_block_sse); \
  351 +} while (0)
348 352  
349 353 /* We force the use of the SSE xor block because it can write around L2.
350 354 We may also be able to load into the L1 only depending on how the cpu