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Commit 6dc3ae845c56157098f8af2d793aaefac2b31840

Authored by Igor Grinberg
Committed by Eric Miao
1 parent 69f22be7b1
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

ARM: ohci-pxa27x: enable OHCI over U2DC for pxa3xx 

U2D Controller of pxa3xx is able to work in host mode.
Make pxa specific ohci implementation aware of it.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>

Showing 1 changed file with 7 additions and 0 deletions Side-by-side Diff

drivers/usb/host/ohci-pxa27x.c
Diff comments   View file @ 6dc3ae8
... ... @@ -24,6 +24,7 @@
24 24 #include <linux/platform_device.h>
25 25 #include <linux/clk.h>
26 26 #include <mach/ohci.h>
  27 +#include <mach/pxa3xx-u2d.h>
27 28  
28 29 /*
29 30 * UHC: USB Host Controller (OHCI-like) register definitions
... ... @@ -235,6 +236,9 @@
235 236 if (retval < 0)
236 237 return retval;
237 238  
  239 + if (cpu_is_pxa3xx())
  240 + pxa3xx_u2d_start_hc(&ohci_to_hcd(&ohci->ohci)->self);
  241 +
238 242 uhchr = __raw_readl(ohci->mmio_base + UHCHR) & ~UHCHR_SSE;
239 243 __raw_writel(uhchr, ohci->mmio_base + UHCHR);
240 244 __raw_writel(UHCHIE_UPRIE | UHCHIE_RWIE, ohci->mmio_base + UHCHIE);
... ... @@ -250,6 +254,9 @@
250 254 uint32_t uhccoms;
251 255  
252 256 inf = dev->platform_data;
  257 +
  258 + if (cpu_is_pxa3xx())
  259 + pxa3xx_u2d_stop_hc(&ohci_to_hcd(&ohci->ohci)->self);
253 260  
254 261 if (inf->exit)
255 262 inf->exit(dev);