Commit 6fcdbc0c3a683003a00f383fceac80da1b7852ff
Committed by
Florian Tobias Schandinat
1 parent
42eb317f7d
Exists in
smarc-l5.0.0_1.0.0-ga
and in
5 other branches
s3fb: Add Virge/MX (86C260)
Add support for Virge/MX (86C260) chip. Although this is a laptop chip, there's an AGP card with this chip too. Tested with AGP card, will probably not work correctly with laptops. DDC does not work on this card (even in DOS or Windows). Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Showing 1 changed file with 21 additions and 10 deletions Side-by-side Diff
drivers/video/s3fb.c
... | ... | @@ -84,7 +84,7 @@ |
84 | 84 | "S3 Virge/VX", "S3 Virge/DX", "S3 Virge/GX", |
85 | 85 | "S3 Virge/GX2", "S3 Virge/GX2+", "", |
86 | 86 | "S3 Trio3D/1X", "S3 Trio3D/2X", "S3 Trio3D/2X", |
87 | - "S3 Trio3D"}; | |
87 | + "S3 Trio3D", "S3 Virge/MX"}; | |
88 | 88 | |
89 | 89 | #define CHIP_UNKNOWN 0x00 |
90 | 90 | #define CHIP_732_TRIO32 0x01 |
... | ... | @@ -105,6 +105,7 @@ |
105 | 105 | #define CHIP_362_TRIO3D_2X 0x11 |
106 | 106 | #define CHIP_368_TRIO3D_2X 0x12 |
107 | 107 | #define CHIP_365_TRIO3D 0x13 |
108 | +#define CHIP_260_VIRGE_MX 0x14 | |
108 | 109 | |
109 | 110 | #define CHIP_XXX_TRIO 0x80 |
110 | 111 | #define CHIP_XXX_TRIO64V2_DXGX 0x81 |
... | ... | @@ -280,7 +281,8 @@ |
280 | 281 | */ |
281 | 282 | /* vga_wseq(par->state.vgabase, 0x08, 0x06); - not needed, already unlocked */ |
282 | 283 | if (par->chip == CHIP_357_VIRGE_GX2 || |
283 | - par->chip == CHIP_359_VIRGE_GX2P) | |
284 | + par->chip == CHIP_359_VIRGE_GX2P || | |
285 | + par->chip == CHIP_260_VIRGE_MX) | |
284 | 286 | svga_wseq_mask(par->state.vgabase, 0x0d, 0x01, 0x03); |
285 | 287 | else |
286 | 288 | svga_wseq_mask(par->state.vgabase, 0x0d, 0x00, 0x03); |
... | ... | @@ -487,7 +489,8 @@ |
487 | 489 | par->chip == CHIP_359_VIRGE_GX2P || |
488 | 490 | par->chip == CHIP_360_TRIO3D_1X || |
489 | 491 | par->chip == CHIP_362_TRIO3D_2X || |
490 | - par->chip == CHIP_368_TRIO3D_2X) { | |
492 | + par->chip == CHIP_368_TRIO3D_2X || | |
493 | + par->chip == CHIP_260_VIRGE_MX) { | |
491 | 494 | vga_wseq(par->state.vgabase, 0x12, (n - 2) | ((r & 3) << 6)); /* n and two bits of r */ |
492 | 495 | vga_wseq(par->state.vgabase, 0x29, r >> 2); /* remaining highest bit of r */ |
493 | 496 | } else |
... | ... | @@ -690,7 +693,8 @@ |
690 | 693 | par->chip != CHIP_359_VIRGE_GX2P && |
691 | 694 | par->chip != CHIP_360_TRIO3D_1X && |
692 | 695 | par->chip != CHIP_362_TRIO3D_2X && |
693 | - par->chip != CHIP_368_TRIO3D_2X) { | |
696 | + par->chip != CHIP_368_TRIO3D_2X && | |
697 | + par->chip != CHIP_260_VIRGE_MX) { | |
694 | 698 | vga_wcrt(par->state.vgabase, 0x54, 0x18); /* M parameter */ |
695 | 699 | vga_wcrt(par->state.vgabase, 0x60, 0xff); /* N parameter */ |
696 | 700 | vga_wcrt(par->state.vgabase, 0x61, 0xff); /* L parameter */ |
... | ... | @@ -739,7 +743,8 @@ |
739 | 743 | par->chip == CHIP_368_TRIO3D_2X || |
740 | 744 | par->chip == CHIP_365_TRIO3D || |
741 | 745 | par->chip == CHIP_375_VIRGE_DX || |
742 | - par->chip == CHIP_385_VIRGE_GX) { | |
746 | + par->chip == CHIP_385_VIRGE_GX || | |
747 | + par->chip == CHIP_260_VIRGE_MX) { | |
743 | 748 | dbytes = info->var.xres * ((bpp+7)/8); |
744 | 749 | vga_wcrt(par->state.vgabase, 0x91, (dbytes + 7) / 8); |
745 | 750 | vga_wcrt(par->state.vgabase, 0x90, (((dbytes + 7) / 8) >> 8) | 0x80); |
... | ... | @@ -751,7 +756,8 @@ |
751 | 756 | par->chip == CHIP_359_VIRGE_GX2P || |
752 | 757 | par->chip == CHIP_360_TRIO3D_1X || |
753 | 758 | par->chip == CHIP_362_TRIO3D_2X || |
754 | - par->chip == CHIP_368_TRIO3D_2X) | |
759 | + par->chip == CHIP_368_TRIO3D_2X || | |
760 | + par->chip == CHIP_260_VIRGE_MX) | |
755 | 761 | vga_wcrt(par->state.vgabase, 0x34, 0x00); |
756 | 762 | else /* enable Data Transfer Position Control (DTPC) */ |
757 | 763 | vga_wcrt(par->state.vgabase, 0x34, 0x10); |
... | ... | @@ -807,7 +813,8 @@ |
807 | 813 | par->chip == CHIP_359_VIRGE_GX2P || |
808 | 814 | par->chip == CHIP_360_TRIO3D_1X || |
809 | 815 | par->chip == CHIP_362_TRIO3D_2X || |
810 | - par->chip == CHIP_368_TRIO3D_2X) | |
816 | + par->chip == CHIP_368_TRIO3D_2X || | |
817 | + par->chip == CHIP_260_VIRGE_MX) | |
811 | 818 | svga_wcrt_mask(par->state.vgabase, 0x67, 0x00, 0xF0); |
812 | 819 | else { |
813 | 820 | svga_wcrt_mask(par->state.vgabase, 0x67, 0x10, 0xF0); |
... | ... | @@ -837,7 +844,8 @@ |
837 | 844 | par->chip != CHIP_359_VIRGE_GX2P && |
838 | 845 | par->chip != CHIP_360_TRIO3D_1X && |
839 | 846 | par->chip != CHIP_362_TRIO3D_2X && |
840 | - par->chip != CHIP_368_TRIO3D_2X) | |
847 | + par->chip != CHIP_368_TRIO3D_2X && | |
848 | + par->chip != CHIP_260_VIRGE_MX) | |
841 | 849 | hmul = 2; |
842 | 850 | } |
843 | 851 | break; |
... | ... | @@ -864,7 +872,8 @@ |
864 | 872 | par->chip != CHIP_359_VIRGE_GX2P && |
865 | 873 | par->chip != CHIP_360_TRIO3D_1X && |
866 | 874 | par->chip != CHIP_362_TRIO3D_2X && |
867 | - par->chip != CHIP_368_TRIO3D_2X) | |
875 | + par->chip != CHIP_368_TRIO3D_2X && | |
876 | + par->chip != CHIP_260_VIRGE_MX) | |
868 | 877 | hmul = 2; |
869 | 878 | } |
870 | 879 | break; |
... | ... | @@ -1208,7 +1217,8 @@ |
1208 | 1217 | break; |
1209 | 1218 | } |
1210 | 1219 | } else if (par->chip == CHIP_357_VIRGE_GX2 || |
1211 | - par->chip == CHIP_359_VIRGE_GX2P) { | |
1220 | + par->chip == CHIP_359_VIRGE_GX2P || | |
1221 | + par->chip == CHIP_260_VIRGE_MX) { | |
1212 | 1222 | switch ((regval & 0xC0) >> 6) { |
1213 | 1223 | case 1: /* 4MB */ |
1214 | 1224 | info->screen_size = 4 << 20; |
... | ... | @@ -1515,6 +1525,7 @@ |
1515 | 1525 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A12), .driver_data = CHIP_359_VIRGE_GX2P}, |
1516 | 1526 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A13), .driver_data = CHIP_36X_TRIO3D_1X_2X}, |
1517 | 1527 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8904), .driver_data = CHIP_365_TRIO3D}, |
1528 | + {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8C01), .driver_data = CHIP_260_VIRGE_MX}, | |
1518 | 1529 | |
1519 | 1530 | {0, 0, 0, 0, 0, 0, 0} |
1520 | 1531 | }; |