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Commit 729b5d1b8ec72c28e99840b3f300ba67726e3ab9

Authored by Dan Williams
1 parent 06164f3194
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

dmaengine: allow dma support for async_tx to be toggled 

Provide a config option for blocking the allocation of dma channels to
the async_tx api.

Signed-off-by: Dan Williams <dan.j.williams@intel.com>

Showing 3 changed files with 32 additions and 3 deletions Side-by-side Diff

crypto/async_tx/async_tx.c
Diff comments   View file @ 729b5d1
... ... @@ -30,7 +30,7 @@
30 30 #ifdef CONFIG_DMA_ENGINE
31 31 static int __init async_tx_init(void)
32 32 {
33   - dmaengine_get();
  33 + async_dmaengine_get();
34 34  
35 35 printk(KERN_INFO "async_tx: api initialized (async)\n");
36 36  
... ... @@ -39,7 +39,7 @@
39 39  
40 40 static void __exit async_tx_exit(void)
41 41 {
42   - dmaengine_put();
  42 + async_dmaengine_put();
43 43 }
44 44  
45 45 /**
... ... @@ -56,7 +56,7 @@
56 56 if (depend_tx &&
57 57 dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
58 58 return depend_tx->chan;
59   - return dma_find_channel(tx_type);
  59 + return async_dma_find_channel(tx_type);
60 60 }
61 61 EXPORT_SYMBOL_GPL(__async_tx_find_channel);
62 62 #else
... ... @@ -98,6 +98,17 @@
98 98 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
99 99 say N.
100 100  
  101 +config ASYNC_TX_DMA
  102 + bool "Async_tx: Offload support for the async_tx api"
  103 + depends on DMA_ENGINE
  104 + help
  105 + This allows the async_tx api to take advantage of offload engines for
  106 + memcpy, memset, xor, and raid6 p+q operations. If your platform has
  107 + a dma engine that can perform raid operations and you have enabled
  108 + MD_RAID456 say Y.
  109 +
  110 + If unsure, say N.
  111 +
101 112 config DMATEST
102 113 tristate "DMA Test client"
103 114 depends on DMA_ENGINE
include/linux/dmaengine.h
Diff comments   View file @ 729b5d1
... ... @@ -288,6 +288,24 @@
288 288 }
289 289 #endif
290 290  
  291 +#ifdef CONFIG_ASYNC_TX_DMA
  292 +#define async_dmaengine_get() dmaengine_get()
  293 +#define async_dmaengine_put() dmaengine_put()
  294 +#define async_dma_find_channel(type) dma_find_channel(type)
  295 +#else
  296 +static inline void async_dmaengine_get(void)
  297 +{
  298 +}
  299 +static inline void async_dmaengine_put(void)
  300 +{
  301 +}
  302 +static inline struct dma_chan *
  303 +async_dma_find_channel(enum dma_transaction_type type)
  304 +{
  305 + return NULL;
  306 +}
  307 +#endif
  308 +
291 309 dma_cookie_t dma_async_memcpy_buf_to_buf(struct dma_chan *chan,
292 310 void *dest, void *src, size_t len);
293 311 dma_cookie_t dma_async_memcpy_buf_to_pg(struct dma_chan *chan,