Commit 72d0f1c3cdc7c456e1e357359ec6f566d0a5f264
Committed by
Tony Lindgren
1 parent
f604931238
Exists in
master
and in
7 other branches
ARM: OMAP: Add minimal OMAP2430 support
This patch adds minimal OMAP2430 support to get the kernel booting on 2430SDP. Signed-off-by: Syed Mohammed Khasim <x0khasim@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Showing 11 changed files with 335 additions and 2 deletions Side-by-side Diff
- arch/arm/mach-omap2/Kconfig
- arch/arm/mach-omap2/Makefile
- arch/arm/mach-omap2/board-2430sdp.c
- arch/arm/mach-omap2/devices.c
- arch/arm/mach-omap2/gpmc.c
- arch/arm/mach-omap2/id.c
- arch/arm/mach-omap2/io.c
- include/asm-arm/arch-omap/board-2430sdp.h
- include/asm-arm/arch-omap/hardware.h
- include/asm-arm/arch-omap/io.h
- include/asm-arm/arch-omap/omap24xx.h
arch/arm/mach-omap2/Kconfig
... | ... | @@ -11,6 +11,10 @@ |
11 | 11 | select OMAP_DM_TIMER |
12 | 12 | select ARCH_OMAP_OTG |
13 | 13 | |
14 | +config ARCH_OMAP2430 | |
15 | + bool "OMAP2430 support" | |
16 | + depends on ARCH_OMAP24XX | |
17 | + | |
14 | 18 | comment "OMAP Board Type" |
15 | 19 | depends on ARCH_OMAP2 |
16 | 20 | |
... | ... | @@ -25,5 +29,9 @@ |
25 | 29 | |
26 | 30 | config MACH_OMAP_APOLLON |
27 | 31 | bool "OMAP 2420 Apollon board" |
32 | + depends on ARCH_OMAP2 && ARCH_OMAP24XX | |
33 | + | |
34 | +config MACH_OMAP_2430SDP | |
35 | + bool "OMAP 2430 SDP board" | |
28 | 36 | depends on ARCH_OMAP2 && ARCH_OMAP24XX |
arch/arm/mach-omap2/Makefile
arch/arm/mach-omap2/board-2430sdp.c
1 | +/* | |
2 | + * linux/arch/arm/mach-omap2/board-2430sdp.c | |
3 | + * | |
4 | + * Copyright (C) 2006 Texas Instruments | |
5 | + * | |
6 | + * Modified from mach-omap2/board-generic.c | |
7 | + * | |
8 | + * Initial Code : Based on a patch from Komal Shah and Richard Woodruff | |
9 | + * Updated the Code for 2430 SDP : Syed Mohammed Khasim | |
10 | + * | |
11 | + * This program is free software; you can redistribute it and/or modify | |
12 | + * it under the terms of the GNU General Public License version 2 as | |
13 | + * published by the Free Software Foundation. | |
14 | + */ | |
15 | + | |
16 | +#include <linux/kernel.h> | |
17 | +#include <linux/init.h> | |
18 | +#include <linux/platform_device.h> | |
19 | +#include <linux/mtd/mtd.h> | |
20 | +#include <linux/mtd/partitions.h> | |
21 | +#include <linux/delay.h> | |
22 | +#include <linux/err.h> | |
23 | +#include <linux/clk.h> | |
24 | + | |
25 | +#include <asm/hardware.h> | |
26 | +#include <asm/mach-types.h> | |
27 | +#include <asm/mach/arch.h> | |
28 | +#include <asm/mach/map.h> | |
29 | +#include <asm/mach/flash.h> | |
30 | + | |
31 | +#include <asm/arch/gpio.h> | |
32 | +#include <asm/arch/mux.h> | |
33 | +#include <asm/arch/board.h> | |
34 | +#include <asm/arch/common.h> | |
35 | +#include <asm/arch/gpmc.h> | |
36 | +#include "prcm-regs.h" | |
37 | + | |
38 | +#include <asm/io.h> | |
39 | + | |
40 | + | |
41 | +#define SDP2430_FLASH_CS 0 | |
42 | +#define SDP2430_SMC91X_CS 5 | |
43 | + | |
44 | +static struct mtd_partition sdp2430_partitions[] = { | |
45 | + /* bootloader (U-Boot, etc) in first sector */ | |
46 | + { | |
47 | + .name = "bootloader", | |
48 | + .offset = 0, | |
49 | + .size = SZ_256K, | |
50 | + .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
51 | + }, | |
52 | + /* bootloader params in the next sector */ | |
53 | + { | |
54 | + .name = "params", | |
55 | + .offset = MTDPART_OFS_APPEND, | |
56 | + .size = SZ_128K, | |
57 | + .mask_flags = 0, | |
58 | + }, | |
59 | + /* kernel */ | |
60 | + { | |
61 | + .name = "kernel", | |
62 | + .offset = MTDPART_OFS_APPEND, | |
63 | + .size = SZ_2M, | |
64 | + .mask_flags = 0 | |
65 | + }, | |
66 | + /* file system */ | |
67 | + { | |
68 | + .name = "filesystem", | |
69 | + .offset = MTDPART_OFS_APPEND, | |
70 | + .size = MTDPART_SIZ_FULL, | |
71 | + .mask_flags = 0 | |
72 | + } | |
73 | +}; | |
74 | + | |
75 | +static struct flash_platform_data sdp2430_flash_data = { | |
76 | + .map_name = "cfi_probe", | |
77 | + .width = 2, | |
78 | + .parts = sdp2430_partitions, | |
79 | + .nr_parts = ARRAY_SIZE(sdp2430_partitions), | |
80 | +}; | |
81 | + | |
82 | +static struct resource sdp2430_flash_resource = { | |
83 | + .start = SDP2430_CS0_BASE, | |
84 | + .end = SDP2430_CS0_BASE + SZ_64M - 1, | |
85 | + .flags = IORESOURCE_MEM, | |
86 | +}; | |
87 | + | |
88 | +static struct platform_device sdp2430_flash_device = { | |
89 | + .name = "omapflash", | |
90 | + .id = 0, | |
91 | + .dev = { | |
92 | + .platform_data = &sdp2430_flash_data, | |
93 | + }, | |
94 | + .num_resources = 1, | |
95 | + .resource = &sdp2430_flash_resource, | |
96 | +}; | |
97 | + | |
98 | +static struct resource sdp2430_smc91x_resources[] = { | |
99 | + [0] = { | |
100 | + .start = SDP2430_CS0_BASE, | |
101 | + .end = SDP2430_CS0_BASE + SZ_64M - 1, | |
102 | + .flags = IORESOURCE_MEM, | |
103 | + }, | |
104 | + [1] = { | |
105 | + .start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), | |
106 | + .end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), | |
107 | + .flags = IORESOURCE_IRQ, | |
108 | + }, | |
109 | +}; | |
110 | + | |
111 | +static struct platform_device sdp2430_smc91x_device = { | |
112 | + .name = "smc91x", | |
113 | + .id = -1, | |
114 | + .num_resources = ARRAY_SIZE(sdp2430_smc91x_resources), | |
115 | + .resource = sdp2430_smc91x_resources, | |
116 | +}; | |
117 | + | |
118 | +static struct platform_device *sdp2430_devices[] __initdata = { | |
119 | + &sdp2430_smc91x_device, | |
120 | + &sdp2430_flash_device, | |
121 | +}; | |
122 | + | |
123 | +static inline void __init sdp2430_init_smc91x(void) | |
124 | +{ | |
125 | + int eth_cs; | |
126 | + unsigned long cs_mem_base; | |
127 | + unsigned int rate; | |
128 | + struct clk *l3ck; | |
129 | + | |
130 | + eth_cs = SDP2430_SMC91X_CS; | |
131 | + | |
132 | + l3ck = clk_get(NULL, "core_l3_ck"); | |
133 | + if (IS_ERR(l3ck)) | |
134 | + rate = 100000000; | |
135 | + else | |
136 | + rate = clk_get_rate(l3ck); | |
137 | + | |
138 | + /* Make sure CS1 timings are correct, for 2430 always muxed */ | |
139 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, 0x00011200); | |
140 | + | |
141 | + if (rate >= 160000000) { | |
142 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01); | |
143 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803); | |
144 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a); | |
145 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); | |
146 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); | |
147 | + } else if (rate >= 130000000) { | |
148 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); | |
149 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); | |
150 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); | |
151 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); | |
152 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); | |
153 | + } else { /* rate = 100000000 */ | |
154 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); | |
155 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); | |
156 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); | |
157 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F); | |
158 | + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2); | |
159 | + } | |
160 | + | |
161 | + if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) { | |
162 | + printk(KERN_ERR "Failed to request GPMC mem for smc91x\n"); | |
163 | + return; | |
164 | + } | |
165 | + | |
166 | + sdp2430_smc91x_resources[0].start = cs_mem_base + 0x300; | |
167 | + sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f; | |
168 | + udelay(100); | |
169 | + | |
170 | + if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) { | |
171 | + printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", | |
172 | + OMAP24XX_ETHR_GPIO_IRQ); | |
173 | + gpmc_cs_free(eth_cs); | |
174 | + return; | |
175 | + } | |
176 | + omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1); | |
177 | + | |
178 | +} | |
179 | + | |
180 | +static void __init omap_2430sdp_init_irq(void) | |
181 | +{ | |
182 | + omap2_init_common_hw(); | |
183 | + omap_init_irq(); | |
184 | + omap_gpio_init(); | |
185 | + sdp2430_init_smc91x(); | |
186 | +} | |
187 | + | |
188 | +static struct omap_uart_config sdp2430_uart_config __initdata = { | |
189 | + .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | |
190 | +}; | |
191 | + | |
192 | +static struct omap_board_config_kernel sdp2430_config[] = { | |
193 | + {OMAP_TAG_UART, &sdp2430_uart_config}, | |
194 | +}; | |
195 | + | |
196 | +static void __init omap_2430sdp_init(void) | |
197 | +{ | |
198 | + platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); | |
199 | + omap_board_config = sdp2430_config; | |
200 | + omap_board_config_size = ARRAY_SIZE(sdp2430_config); | |
201 | + omap_serial_init(); | |
202 | +} | |
203 | + | |
204 | +static void __init omap_2430sdp_map_io(void) | |
205 | +{ | |
206 | + omap2_map_common_io(); | |
207 | +} | |
208 | + | |
209 | +MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") | |
210 | + /* Maintainer: Syed Khasim - Texas Instruments Inc */ | |
211 | + .phys_io = 0x48000000, | |
212 | + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | |
213 | + .boot_params = 0x80000100, | |
214 | + .map_io = omap_2430sdp_map_io, | |
215 | + .init_irq = omap_2430sdp_init_irq, | |
216 | + .init_machine = omap_2430sdp_init, | |
217 | + .timer = &omap_timer, | |
218 | +MACHINE_END |
arch/arm/mach-omap2/devices.c
... | ... | @@ -55,8 +55,10 @@ |
55 | 55 | if (machine_is_omap_h4()) |
56 | 56 | return; |
57 | 57 | |
58 | - omap_cfg_reg(J15_24XX_I2C2_SCL); | |
59 | - omap_cfg_reg(H19_24XX_I2C2_SDA); | |
58 | + if (!cpu_is_omap2430()) { | |
59 | + omap_cfg_reg(J15_24XX_I2C2_SCL); | |
60 | + omap_cfg_reg(H19_24XX_I2C2_SDA); | |
61 | + } | |
60 | 62 | (void) platform_device_register(&omap_i2c_device2); |
61 | 63 | } |
62 | 64 |
arch/arm/mach-omap2/gpmc.c
... | ... | @@ -22,7 +22,14 @@ |
22 | 22 | |
23 | 23 | #undef DEBUG |
24 | 24 | |
25 | +#ifdef CONFIG_ARCH_OMAP2420 | |
25 | 26 | #define GPMC_BASE 0x6800a000 |
27 | +#endif | |
28 | + | |
29 | +#ifdef CONFIG_ARCH_OMAP2430 | |
30 | +#define GPMC_BASE 0x6E000000 | |
31 | +#endif | |
32 | + | |
26 | 33 | #define GPMC_REVISION 0x00 |
27 | 34 | #define GPMC_SYSCONFIG 0x10 |
28 | 35 | #define GPMC_SYSSTATUS 0x14 |
arch/arm/mach-omap2/id.c
... | ... | @@ -17,7 +17,13 @@ |
17 | 17 | |
18 | 18 | #include <asm/io.h> |
19 | 19 | |
20 | +#if defined(CONFIG_ARCH_OMAP2420) | |
20 | 21 | #define OMAP24XX_TAP_BASE io_p2v(0x48014000) |
22 | +#endif | |
23 | + | |
24 | +#if defined(CONFIG_ARCH_OMAP2430) | |
25 | +#define OMAP24XX_TAP_BASE io_p2v(0x4900A000) | |
26 | +#endif | |
21 | 27 | |
22 | 28 | #define OMAP_TAP_IDCODE 0x0204 |
23 | 29 | #define OMAP_TAP_PROD_ID 0x0208 |
arch/arm/mach-omap2/io.c
... | ... | @@ -5,6 +5,7 @@ |
5 | 5 | * |
6 | 6 | * Copyright (C) 2005 Nokia Corporation |
7 | 7 | * Author: Juha Yrjรถlรค <juha.yrjola@nokia.com> |
8 | + * Updated map desc to add 2430 support : <x0khasim@ti.com> | |
8 | 9 | * |
9 | 10 | * This program is free software; you can redistribute it and/or modify |
10 | 11 | * it under the terms of the GNU General Public License version 2 as |
11 | 12 | |
... | ... | @@ -41,7 +42,21 @@ |
41 | 42 | .length = L3_24XX_SIZE, |
42 | 43 | .type = MT_DEVICE |
43 | 44 | }, |
45 | +#ifdef CONFIG_ARCH_OMAP2430 | |
44 | 46 | { |
47 | + .virtual = L4_WK_243X_VIRT, | |
48 | + .pfn = __phys_to_pfn(L4_WK_243X_PHYS), | |
49 | + .length = L4_WK_243X_SIZE, | |
50 | + .type = MT_DEVICE | |
51 | + }, | |
52 | + { | |
53 | + .virtual = OMAP243X_GPMC_VIRT, | |
54 | + .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS), | |
55 | + .length = OMAP243X_GPMC_SIZE, | |
56 | + .type = MT_DEVICE | |
57 | + }, | |
58 | +#endif | |
59 | + { | |
45 | 60 | .virtual = DSP_MEM_24XX_VIRT, |
46 | 61 | .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), |
47 | 62 | .length = DSP_MEM_24XX_SIZE, |
48 | 63 | |
... | ... | @@ -81,7 +96,12 @@ |
81 | 96 | { |
82 | 97 | omap2_mux_init(); |
83 | 98 | omap2_clk_init(); |
99 | +/* | |
100 | + * Need to Fix this for 2430 | |
101 | + */ | |
102 | +#ifndef CONFIG_ARCH_OMAP2430 | |
84 | 103 | omap2_init_memory(); |
104 | +#endif | |
85 | 105 | gpmc_init(); |
86 | 106 | } |
include/asm-arm/arch-omap/board-2430sdp.h
1 | +/* | |
2 | + * linux/include/asm-arm/arch-omap/board-2430sdp.h | |
3 | + * | |
4 | + * Hardware definitions for TI OMAP2430 SDP board. | |
5 | + * | |
6 | + * Based on board-h4.h by Dirk Behme <dirk.behme@de.bosch.com> | |
7 | + * | |
8 | + * This program is free software; you can redistribute it and/or modify it | |
9 | + * under the terms of the GNU General Public License as published by the | |
10 | + * Free Software Foundation; either version 2 of the License, or (at your | |
11 | + * option) any later version. | |
12 | + * | |
13 | + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | |
14 | + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
15 | + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | |
16 | + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
17 | + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
18 | + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
19 | + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
20 | + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
21 | + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
22 | + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
23 | + * | |
24 | + * You should have received a copy of the GNU General Public License along | |
25 | + * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | + * 675 Mass Ave, Cambridge, MA 02139, USA. | |
27 | + */ | |
28 | + | |
29 | +#ifndef __ASM_ARCH_OMAP_2430SDP_H | |
30 | +#define __ASM_ARCH_OMAP_2430SDP_H | |
31 | + | |
32 | +/* Placeholder for 2430SDP specific defines */ | |
33 | +#define OMAP24XX_ETHR_START 0x08000300 | |
34 | +#define OMAP24XX_ETHR_GPIO_IRQ 149 | |
35 | +#define SDP2430_CS0_BASE 0x04000000 | |
36 | + | |
37 | +#define TWL4030_IRQNUM INT_24XX_SYS_NIRQ | |
38 | + | |
39 | +/* TWL4030 Primary Interrupt Handler (PIH) interrupts */ | |
40 | +#define IH_TWL4030_BASE IH_BOARD_BASE | |
41 | +#define IH_TWL4030_END (IH_TWL4030_BASE+8) | |
42 | +#define NR_IRQS (IH_TWL4030_END) | |
43 | + | |
44 | +#endif /* __ASM_ARCH_OMAP_2430SDP_H */ |
include/asm-arm/arch-omap/hardware.h
include/asm-arm/arch-omap/io.h
... | ... | @@ -72,6 +72,16 @@ |
72 | 72 | #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */ |
73 | 73 | #define L4_24XX_VIRT 0xd8000000 |
74 | 74 | #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ |
75 | + | |
76 | +#ifdef CONFIG_ARCH_OMAP2430 | |
77 | +#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 */ | |
78 | +#define L4_WK_243X_VIRT 0xd9000000 | |
79 | +#define L4_WK_243X_SIZE SZ_1M | |
80 | +#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE /* 0x49000000 */ | |
81 | +#define OMAP243X_GPMC_VIRT 0xFE000000 | |
82 | +#define OMAP243X_GPMC_SIZE SZ_1M | |
83 | +#endif | |
84 | + | |
75 | 85 | #define IO_OFFSET 0x90000000 |
76 | 86 | #define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ |
77 | 87 | #define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ |
include/asm-arm/arch-omap/omap24xx.h
... | ... | @@ -8,6 +8,7 @@ |
8 | 8 | */ |
9 | 9 | |
10 | 10 | #define L4_24XX_BASE 0x48000000 |
11 | +#define L4_WK_243X_BASE 0x49000000 | |
11 | 12 | #define L3_24XX_BASE 0x68000000 |
12 | 13 | |
13 | 14 | /* interrupt controller */ |
14 | 15 | |
... | ... | @@ -16,9 +17,20 @@ |
16 | 17 | #define OMAP24XX_IVA_INTC_BASE 0x40000000 |
17 | 18 | #define IRQ_SIR_IRQ 0x0040 |
18 | 19 | |
20 | +#ifdef CONFIG_ARCH_OMAP2420 | |
19 | 21 | #define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) |
20 | 22 | #define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000) |
21 | 23 | #define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000) |
24 | +#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) | |
25 | +#endif | |
26 | + | |
27 | +#ifdef CONFIG_ARCH_OMAP2430 | |
28 | +#define OMAP24XX_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) | |
29 | +#define OMAP24XX_PRCM_BASE (L4_WK_243X_BASE + 0x6000) | |
30 | +#define OMAP24XX_SDRC_BASE (0x6D000000) | |
31 | +#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) | |
32 | +#define OMAP243X_GPMC_BASE 0x6E000000 | |
33 | +#endif | |
22 | 34 | |
23 | 35 | /* DSP SS */ |
24 | 36 | #define OMAP24XX_DSP_BASE 0x58000000 |