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Commit 73053d973dd6f56472309cffa5a5d15a62dd6f96

Authored by Rob Herring
Committed by Olof Johansson
1 parent 71bd98aff0
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

ARM: highbank: fix cache flush ordering for cpu hotplug 

The L1 data cache flush needs to be after highbank_set_cpu_jump call which
pollutes the cache with the l2x0_lock. This causes other cores to deadlock
waiting for the l2x0_lock. Moving the flush of the entire data cache after
highbank_set_cpu_jump fixes the problem. Use flush_cache_louis instead of
flush_cache_all are that is sufficient to flush only the L1 data cache.
flush_cache_louis did not exist when highbank_cpu_die was originally
written.

With PL310 errata 769419 enabled, a wmb is inserted into idle which takes
the l2x0_lock. This makes the problem much more easily hit and causes
reset to hang.

Reported-by: Paolo Pisati <p.pisati@gmail.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Showing 1 changed file with 4 additions and 6 deletions Side-by-side Diff

arch/arm/mach-highbank/hotplug.c
Diff comments   View file @ 73053d9
... ... @@ -28,14 +28,12 @@
28 28 */
29 29 void __ref highbank_cpu_die(unsigned int cpu)
30 30 {
31   - flush_cache_all();
32   -
33 31 highbank_set_cpu_jump(cpu, phys_to_virt(0));
  32 +
  33 + flush_cache_louis();
34 34 highbank_set_core_pwr();
35 35  
36   - cpu_do_idle();
37   -
38   - /* We should never return from idle */
39   - panic("highbank: cpu %d unexpectedly exit from shutdown\n", cpu);
  36 + while (1)
  37 + cpu_do_idle();
40 38 }