Commit 735ce95e6b9a262d1fbc0ddb5620deb3a29d1067
Committed by
Linus Torvalds
Linus Torvalds
1 parent
fef92c30d4
Exists in
master
and in
7 other branches
minor spi_butterfly cleanup
Simplify the spi_butterfly driver by removing incomplete/unused support for the second SPI bus, implemented by the USI controller. This should make this a clearer example of how to write a parport bitbang driver. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Showing 1 changed file with 4 additions and 58 deletions Side-by-side Diff
drivers/spi/spi_butterfly.c
| ... | ... | @@ -40,28 +40,20 @@ |
| 40 | 40 | * and use this custom parallel port cable. |
| 41 | 41 | */ |
| 42 | 42 | |
| 43 | -#undef HAVE_USI /* nyet */ | |
| 44 | 43 | |
| 45 | - | |
| 46 | 44 | /* DATA output bits (pins 2..9 == D0..D7) */ |
| 47 | 45 | #define butterfly_nreset (1 << 1) /* pin 3 */ |
| 48 | 46 | |
| 49 | 47 | #define spi_sck_bit (1 << 0) /* pin 2 */ |
| 50 | 48 | #define spi_mosi_bit (1 << 7) /* pin 9 */ |
| 51 | 49 | |
| 52 | -#define usi_sck_bit (1 << 3) /* pin 5 */ | |
| 53 | -#define usi_mosi_bit (1 << 4) /* pin 6 */ | |
| 54 | - | |
| 55 | 50 | #define vcc_bits ((1 << 6) | (1 << 5)) /* pins 7, 8 */ |
| 56 | 51 | |
| 57 | 52 | /* STATUS input bits */ |
| 58 | 53 | #define spi_miso_bit PARPORT_STATUS_BUSY /* pin 11 */ |
| 59 | 54 | |
| 60 | -#define usi_miso_bit PARPORT_STATUS_PAPEROUT /* pin 12 */ | |
| 61 | - | |
| 62 | 55 | /* CONTROL output bits */ |
| 63 | 56 | #define spi_cs_bit PARPORT_CONTROL_SELECT /* pin 17 */ |
| 64 | -/* USI uses no chipselect */ | |
| 65 | 57 | |
| 66 | 58 | |
| 67 | 59 | |
| 68 | 60 | |
| ... | ... | @@ -70,16 +62,7 @@ |
| 70 | 62 | return spi->controller_data; |
| 71 | 63 | } |
| 72 | 64 | |
| 73 | -static inline int is_usidev(struct spi_device *spi) | |
| 74 | -{ | |
| 75 | -#ifdef HAVE_USI | |
| 76 | - return spi->chip_select != 1; | |
| 77 | -#else | |
| 78 | - return 0; | |
| 79 | -#endif | |
| 80 | -} | |
| 81 | 65 | |
| 82 | - | |
| 83 | 66 | struct butterfly { |
| 84 | 67 | /* REVISIT ... for now, this must be first */ |
| 85 | 68 | struct spi_bitbang bitbang; |
| 86 | 69 | |
| ... | ... | @@ -97,23 +80,13 @@ |
| 97 | 80 | |
| 98 | 81 | /*----------------------------------------------------------------------*/ |
| 99 | 82 | |
| 100 | -/* | |
| 101 | - * these routines may be slower than necessary because they're hiding | |
| 102 | - * the fact that there are two different SPI busses on this cable: one | |
| 103 | - * to the DataFlash chip (or AVR SPI controller), the other to the | |
| 104 | - * AVR USI controller. | |
| 105 | - */ | |
| 106 | - | |
| 107 | 83 | static inline void |
| 108 | 84 | setsck(struct spi_device *spi, int is_on) |
| 109 | 85 | { |
| 110 | 86 | struct butterfly *pp = spidev_to_pp(spi); |
| 111 | 87 | u8 bit, byte = pp->lastbyte; |
| 112 | 88 | |
| 113 | - if (is_usidev(spi)) | |
| 114 | - bit = usi_sck_bit; | |
| 115 | - else | |
| 116 | - bit = spi_sck_bit; | |
| 89 | + bit = spi_sck_bit; | |
| 117 | 90 | |
| 118 | 91 | if (is_on) |
| 119 | 92 | byte |= bit; |
| ... | ... | @@ -129,10 +102,7 @@ |
| 129 | 102 | struct butterfly *pp = spidev_to_pp(spi); |
| 130 | 103 | u8 bit, byte = pp->lastbyte; |
| 131 | 104 | |
| 132 | - if (is_usidev(spi)) | |
| 133 | - bit = usi_mosi_bit; | |
| 134 | - else | |
| 135 | - bit = spi_mosi_bit; | |
| 105 | + bit = spi_mosi_bit; | |
| 136 | 106 | |
| 137 | 107 | if (is_on) |
| 138 | 108 | byte |= bit; |
| ... | ... | @@ -148,10 +118,7 @@ |
| 148 | 118 | int value; |
| 149 | 119 | u8 bit; |
| 150 | 120 | |
| 151 | - if (is_usidev(spi)) | |
| 152 | - bit = usi_miso_bit; | |
| 153 | - else | |
| 154 | - bit = spi_miso_bit; | |
| 121 | + bit = spi_miso_bit; | |
| 155 | 122 | |
| 156 | 123 | /* only STATUS_BUSY is NOT negated */ |
| 157 | 124 | value = !(parport_read_status(pp->port) & bit); |
| ... | ... | @@ -166,10 +133,6 @@ |
| 166 | 133 | if (value != BITBANG_CS_INACTIVE) |
| 167 | 134 | setsck(spi, spi->mode & SPI_CPOL); |
| 168 | 135 | |
| 169 | - /* no chipselect on this USI link config */ | |
| 170 | - if (is_usidev(spi)) | |
| 171 | - return; | |
| 172 | - | |
| 173 | 136 | /* here, value == "activate or not"; |
| 174 | 137 | * most PARPORT_CONTROL_* bits are negated, so we must |
| 175 | 138 | * morph it to value == "bit value to write in control register" |
| ... | ... | @@ -292,7 +255,7 @@ |
| 292 | 255 | parport_frob_control(pp->port, spi_cs_bit, 0); |
| 293 | 256 | |
| 294 | 257 | /* stabilize power with chip in reset (nRESET), and |
| 295 | - * both spi_sck_bit and usi_sck_bit clear (CPOL=0) | |
| 258 | + * spi_sck_bit clear (CPOL=0) | |
| 296 | 259 | */ |
| 297 | 260 | pp->lastbyte |= vcc_bits; |
| 298 | 261 | parport_write_data(pp->port, pp->lastbyte); |
| ... | ... | @@ -325,23 +288,6 @@ |
| 325 | 288 | if (pp->dataflash) |
| 326 | 289 | pr_debug("%s: dataflash at %s\n", p->name, |
| 327 | 290 | pp->dataflash->dev.bus_id); |
| 328 | - | |
| 329 | -#ifdef HAVE_USI | |
| 330 | - /* Bus 2 is only for talking to the AVR, and it can work no | |
| 331 | - * matter who masters bus 1; needs appropriate AVR firmware. | |
| 332 | - */ | |
| 333 | - pp->info[1].max_speed_hz = 10 /* ?? */ * 1000 * 1000; | |
| 334 | - strcpy(pp->info[1].modalias, "butterfly"); | |
| 335 | - // pp->info[1].platform_data = ... TBD ... ; | |
| 336 | - pp->info[1].chip_select = 2, | |
| 337 | - pp->info[1].controller_data = pp; | |
| 338 | - pp->butterfly = spi_new_device(pp->bitbang.master, &pp->info[1]); | |
| 339 | - if (pp->butterfly) | |
| 340 | - pr_debug("%s: butterfly at %s\n", p->name, | |
| 341 | - pp->butterfly->dev.bus_id); | |
| 342 | - | |
| 343 | - /* FIXME setup ACK for the IRQ line ... */ | |
| 344 | -#endif | |
| 345 | 291 | |
| 346 | 292 | // dev_info(_what?_, ...) |
| 347 | 293 | pr_info("%s: AVR Butterfly\n", p->name); |