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Commit 76ccc297018d25d55b789bbd508861ef1e2cdb0c

Authored by Konrad Rzeszutek Wilk
Committed by Jesse Barnes
1 parent fb7ebfe410
Exists in master and in 6 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

x86/PCI: Expand the x86_msi_ops to have a restore MSIs. 

The MSI restore function will become a function pointer in an
x86_msi_ops struct. It defaults to the implementation in the
io_apic.c and msi.c. We piggyback on the indirection mechanism
introduced by "x86: Introduce x86_msi_ops".

Cc: x86@kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: linux-pci@vger.kernel.org
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Showing 4 changed files with 38 additions and 2 deletions Side-by-side Diff

arch/x86/include/asm/pci.h
Diff comments   View file @ 76ccc29
... ... @@ -112,19 +112,28 @@
112 112 {
113 113 x86_msi.teardown_msi_irq(irq);
114 114 }
  115 +static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
  116 +{
  117 + x86_msi.restore_msi_irqs(dev, irq);
  118 +}
115 119 #define arch_setup_msi_irqs x86_setup_msi_irqs
116 120 #define arch_teardown_msi_irqs x86_teardown_msi_irqs
117 121 #define arch_teardown_msi_irq x86_teardown_msi_irq
  122 +#define arch_restore_msi_irqs x86_restore_msi_irqs
118 123 /* implemented in arch/x86/kernel/apic/io_apic. */
119 124 int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
120 125 void native_teardown_msi_irq(unsigned int irq);
  126 +void native_restore_msi_irqs(struct pci_dev *dev, int irq);
121 127 /* default to the implementation in drivers/lib/msi.c */
122 128 #define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
  129 +#define HAVE_DEFAULT_MSI_RESTORE_IRQS
123 130 void default_teardown_msi_irqs(struct pci_dev *dev);
  131 +void default_restore_msi_irqs(struct pci_dev *dev, int irq);
124 132 #else
125 133 #define native_setup_msi_irqs NULL
126 134 #define native_teardown_msi_irq NULL
127 135 #define default_teardown_msi_irqs NULL
  136 +#define default_restore_msi_irqs NULL
128 137 #endif
129 138  
130 139 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
arch/x86/include/asm/x86_init.h
Diff comments   View file @ 76ccc29
... ... @@ -177,6 +177,7 @@
177 177 int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
178 178 void (*teardown_msi_irq)(unsigned int irq);
179 179 void (*teardown_msi_irqs)(struct pci_dev *dev);
  180 + void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
180 181 };
181 182  
182 183 extern struct x86_init_ops x86_init;
arch/x86/kernel/x86_init.c
Diff comments   View file @ 76ccc29
... ... @@ -114,5 +114,6 @@
114 114 .setup_msi_irqs = native_setup_msi_irqs,
115 115 .teardown_msi_irq = native_teardown_msi_irq,
116 116 .teardown_msi_irqs = default_teardown_msi_irqs,
  117 + .restore_msi_irqs = default_restore_msi_irqs,
117 118 };
... ... @@ -86,6 +86,31 @@
86 86 }
87 87 #endif
88 88  
  89 +#ifndef arch_restore_msi_irqs
  90 +# define arch_restore_msi_irqs default_restore_msi_irqs
  91 +# define HAVE_DEFAULT_MSI_RESTORE_IRQS
  92 +#endif
  93 +
  94 +#ifdef HAVE_DEFAULT_MSI_RESTORE_IRQS
  95 +void default_restore_msi_irqs(struct pci_dev *dev, int irq)
  96 +{
  97 + struct msi_desc *entry;
  98 +
  99 + entry = NULL;
  100 + if (dev->msix_enabled) {
  101 + list_for_each_entry(entry, &dev->msi_list, list) {
  102 + if (irq == entry->irq)
  103 + break;
  104 + }
  105 + } else if (dev->msi_enabled) {
  106 + entry = irq_get_msi_desc(irq);
  107 + }
  108 +
  109 + if (entry)
  110 + write_msi_msg(irq, &entry->msg);
  111 +}
  112 +#endif
  113 +
89 114 static void msi_set_enable(struct pci_dev *dev, int pos, int enable)
90 115 {
91 116 u16 control;
... ... @@ -372,7 +397,7 @@
372 397  
373 398 pci_intx_for_msi(dev, 0);
374 399 msi_set_enable(dev, pos, 0);
375   - write_msi_msg(dev->irq, &entry->msg);
  400 + arch_restore_msi_irqs(dev, dev->irq);
376 401  
377 402 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
378 403 msi_mask_irq(entry, msi_capable_mask(control), entry->masked);
... ... @@ -400,7 +425,7 @@
400 425 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
401 426  
402 427 list_for_each_entry(entry, &dev->msi_list, list) {
403   - write_msi_msg(entry->irq, &entry->msg);
  428 + arch_restore_msi_irqs(dev, entry->irq);
404 429 msix_mask_irq(entry, entry->masked);
405 430 }
406 431