Doug / smarc-fsl-linux-kernel

Download as
Browse Code ยป

Commit 77058e1adcc439151db41f2b84e4867a88113cd8

Authored by David Gibson
Committed by Benjamin Herrenschmidt
1 parent ac73fddfc5
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

powerpc: Fix address masking bug in hpte_need_flush() 

Commit f71dc176aa06359681c30ba6877ffccab6fba3a6 'Make
hpte_need_flush() correctly mask for multiple page sizes' introduced
bug, which is triggered when a kernel with a 64k base page size is run
on a system whose hardware does not 64k hash PTEs.  In this case, we
emulate 64k pages with multiple 4k hash PTEs, however in
hpte_need_flush() we incorrectly only mask the hardware page size from
the address, instead of the logical page size.  This causes things to
go wrong when we later attempt to iterate through the hardware
subpages of the logical page.

This patch corrects the error.  It has been tested on pSeries bare
metal by Michael Neuling.

Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

Showing 1 changed file with 9 additions and 3 deletions Side-by-side Diff

arch/powerpc/mm/tlb_hash64.c
Diff comments   View file @ 77058e1
... ... @@ -63,15 +63,21 @@
63 63 if (huge) {
64 64 #ifdef CONFIG_HUGETLB_PAGE
65 65 psize = get_slice_psize(mm, addr);
  66 + /* Mask the address for the correct page size */
  67 + addr &= ~((1UL << mmu_psize_defs[psize].shift) - 1);
66 68 #else
67 69 BUG();
68 70 psize = pte_pagesize_index(mm, addr, pte); /* shutup gcc */
69 71 #endif
70   - } else
  72 + } else {
71 73 psize = pte_pagesize_index(mm, addr, pte);
  74 + /* Mask the address for the standard page size. If we
  75 + * have a 64k page kernel, but the hardware does not
  76 + * support 64k pages, this might be different from the
  77 + * hardware page size encoded in the slice table. */
  78 + addr &= PAGE_MASK;
  79 + }
72 80  
73   - /* Mask the address for the correct page size */
74   - addr &= ~((1UL << mmu_psize_defs[psize].shift) - 1);
75 81  
76 82 /* Build full vaddr */
77 83 if (!is_kernel_addr(addr)) {