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Commit 7d568652d3abc81a6d684d4760571a3ccb6f68d9

Authored by Seungwon Jeon
Committed by James Bottomley
1 parent 1c2623c50d
Exists in smarc-imx_3.14.28_1.0.0_ga and in 1 other branch imx_3.14.28_1.0.0_ga

[SCSI] ufs: fix the setting interrupt aggregation counter 

IACTH(Interrupt aggregation counter threshold) value is allowed
up to 0x1F and current setting value is the maximum.
This value is related with NUTRS(max:0x20) of HCI's capability.
Considering HCI controller doesn't support the maximum, IACTH
setting should be adjusted with possible value.
For that, existing 'ufshcd_config_int_aggr' is split into two part
[reset, configure].

Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org>
Tested-by: Yaniv Gardi <ygardi@codeaurora.org>
Signed-off-by: Santosh Y <santoshsy@gmail.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>

Showing 2 changed files with 27 additions and 30 deletions Side-by-side Diff

drivers/scsi/ufs/ufshcd.c
Diff comments   View file @ 7d56865
... ... @@ -56,6 +56,9 @@
56 56 /* Expose the flag value from utp_upiu_query.value */
57 57 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
58 58  
  59 +/* Interrupt aggregation default timeout, unit: 40us */
  60 +#define INT_AGGR_DEF_TO 0x02
  61 +
59 62 enum {
60 63 UFSHCD_MAX_CHANNEL = 0,
61 64 UFSHCD_MAX_ID = 1,
... ... @@ -78,12 +81,6 @@
78 81 UFSHCD_INT_CLEAR,
79 82 };
80 83  
81   -/* Interrupt aggregation options */
82   -enum {
83   - INT_AGGR_RESET,
84   - INT_AGGR_CONFIG,
85   -};
86   -
87 84 /*
88 85 * ufshcd_wait_for_register - wait for register value to change
89 86 * @hba - per-adapter interface
90 87  
91 88  
92 89  
93 90  
... ... @@ -290,33 +287,33 @@
290 287 }
291 288  
292 289 /**
293   - * ufshcd_config_int_aggr - Configure interrupt aggregation values.
294   - * Currently there is no use case where we want to configure
295   - * interrupt aggregation dynamically. So to configure interrupt
296   - * aggregation, #define INT_AGGR_COUNTER_THRESHOLD_VALUE and
297   - * INT_AGGR_TIMEOUT_VALUE are used.
  290 + * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
298 291 * @hba: per adapter instance
299   - * @option: Interrupt aggregation option
300 292 */
301 293 static inline void
302   -ufshcd_config_int_aggr(struct ufs_hba *hba, int option)
  294 +ufshcd_reset_intr_aggr(struct ufs_hba *hba)
303 295 {
304   - switch (option) {
305   - case INT_AGGR_RESET:
306   - ufshcd_writel(hba, INT_AGGR_ENABLE |
307   - INT_AGGR_COUNTER_AND_TIMER_RESET,
308   - REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
309   - break;
310   - case INT_AGGR_CONFIG:
311   - ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
312   - INT_AGGR_COUNTER_THRESHOLD_VALUE |
313   - INT_AGGR_TIMEOUT_VALUE,
314   - REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
315   - break;
316   - }
  296 + ufshcd_writel(hba, INT_AGGR_ENABLE |
  297 + INT_AGGR_COUNTER_AND_TIMER_RESET,
  298 + REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
317 299 }
318 300  
319 301 /**
  302 + * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
  303 + * @hba: per adapter instance
  304 + * @cnt: Interrupt aggregation counter threshold
  305 + * @tmout: Interrupt aggregation timeout value
  306 + */
  307 +static inline void
  308 +ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
  309 +{
  310 + ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
  311 + INT_AGGR_COUNTER_THLD_VAL(cnt) |
  312 + INT_AGGR_TIMEOUT_VAL(tmout),
  313 + REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
  314 +}
  315 +
  316 +/**
320 317 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
321 318 * When run-stop registers are set to 1, it indicates the
322 319 * host controller that it can process the requests
... ... @@ -1457,7 +1454,7 @@
1457 1454 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
1458 1455  
1459 1456 /* Configure interrupt aggregation */
1460   - ufshcd_config_int_aggr(hba, INT_AGGR_CONFIG);
  1457 + ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
1461 1458  
1462 1459 /* Configure UTRL and UTMRL base address registers */
1463 1460 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
... ... @@ -1967,7 +1964,7 @@
1967 1964  
1968 1965 /* Reset interrupt aggregation counters */
1969 1966 if (int_aggr_reset)
1970   - ufshcd_config_int_aggr(hba, INT_AGGR_RESET);
  1967 + ufshcd_reset_intr_aggr(hba);
1971 1968 }
1972 1969  
1973 1970 /**
drivers/scsi/ufs/ufshci.h
Diff comments   View file @ 7d56865
... ... @@ -226,8 +226,8 @@
226 226  
227 227 #define MASK_UIC_COMMAND_RESULT 0xFF
228 228  
229   -#define INT_AGGR_COUNTER_THRESHOLD_VALUE (0x1F << 8)
230   -#define INT_AGGR_TIMEOUT_VALUE (0x02)
  229 +#define INT_AGGR_COUNTER_THLD_VAL(c) (((c) & 0x1F) << 8)
  230 +#define INT_AGGR_TIMEOUT_VAL(t) (((t) & 0xFF) << 0)
231 231  
232 232 /* Interrupt disable masks */
233 233 enum {