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Commit 7f3edee81fbd49114c28057512906f169caa0bed

Authored by Magnus Damm
Committed by Paul Mundt
1 parent b62ad83d91
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

sh: intc - remove default interrupt priority tables 

This patch removes interrupt priority tables from the intc code.
Optimal priority assignment varies with embedded application anyway,
so keeping the interrupt priority tables together with cpu-specific
code doesn't make sense.

The function intc_set_priority() should be used instead to set the
desired interrupt priority level.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Showing 19 changed files with 42 additions and 155 deletions Side-by-side Diff

arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
Diff comments   View file @ 7f3edee
... ... @@ -47,7 +47,7 @@
47 47 };
48 48  
49 49 static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
50   - NULL, NULL, mask_registers, NULL, NULL);
  50 + NULL, mask_registers, NULL, NULL);
51 51  
52 52 unsigned char * __init highlander_init_irq_r7780mp(void)
53 53 {
arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
Diff comments   View file @ 7f3edee
... ... @@ -41,7 +41,7 @@
41 41 };
42 42  
43 43 static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
44   - NULL, NULL, mask_registers, NULL, NULL);
  44 + NULL, mask_registers, NULL, NULL);
45 45  
46 46 unsigned char * __init highlander_init_irq_r7785rp(void)
47 47 {
arch/sh/boards/renesas/rts7751r2d/irq.c
Diff comments   View file @ 7f3edee
... ... @@ -71,7 +71,7 @@
71 71 };
72 72  
73 73 static DECLARE_INTC_DESC(intc_desc_r2d_1, "r2d-1", vectors_r2d_1,
74   - NULL, NULL, mask_registers_r2d_1, NULL, NULL);
  74 + NULL, mask_registers_r2d_1, NULL, NULL);
75 75  
76 76 #endif /* CONFIG_RTS7751R2D_1 */
77 77  
... ... @@ -109,7 +109,7 @@
109 109 };
110 110  
111 111 static DECLARE_INTC_DESC(intc_desc_r2d_plus, "r2d-plus", vectors_r2d_plus,
112   - NULL, NULL, mask_registers_r2d_plus, NULL, NULL);
  112 + NULL, mask_registers_r2d_plus, NULL, NULL);
113 113  
114 114 #endif /* CONFIG_RTS7751R2D_PLUS */
115 115  
arch/sh/cchips/voyagergx/irq.c
Diff comments   View file @ 7f3edee
... ... @@ -58,7 +58,7 @@
58 58 };
59 59  
60 60 static DECLARE_INTC_DESC(intc_desc, "voyagergx", vectors,
61   - NULL, NULL, mask_registers, NULL, NULL);
  61 + NULL, mask_registers, NULL, NULL);
62 62  
63 63 static unsigned int voyagergx_stat2irq[32] = {
64 64 IRQ_SM501_CI, IRQ_SM501_PV, IRQ_SM501_ZD, IRQ_SM501_2D,
arch/sh/kernel/cpu/irq/intc.c
Diff comments   View file @ 7f3edee
... ... @@ -335,31 +335,6 @@
335 335 return 0;
336 336 }
337 337  
338   -static unsigned int __init intc_prio_value(struct intc_desc *desc,
339   - intc_enum enum_id, int do_grps)
340   -{
341   - struct intc_prio *p = desc->priorities;
342   - unsigned int i;
343   -
344   - for (i = 0; p && enum_id && i < desc->nr_priorities; i++) {
345   - p = desc->priorities + i;
346   -
347   - if (p->enum_id != enum_id)
348   - continue;
349   -
350   - return p->priority;
351   - }
352   -
353   - if (do_grps)
354   - return intc_prio_value(desc, intc_grp_id(desc, enum_id), 0);
355   -
356   - /* default to the lowest priority possible if no priority is set
357   - * - this needs to be at least 2 for 5-bit priorities on 7780
358   - */
359   -
360   - return 2;
361   -}
362   -
363 338 static unsigned int __init intc_mask_data(struct intc_desc *desc,
364 339 struct intc_desc_int *d,
365 340 intc_enum enum_id, int do_grps)
... ... @@ -518,8 +493,10 @@
518 493 handle_level_irq, "level");
519 494 set_irq_chip_data(irq, (void *)data[primary]);
520 495  
521   - /* record the desired priority level */
522   - intc_prio_level[irq] = intc_prio_value(desc, enum_id, 1);
  496 + /* set priority level
  497 + * - this needs to be at least 2 for 5-bit priorities on 7780
  498 + */
  499 + intc_prio_level[irq] = 2;
523 500  
524 501 /* enable secondary masking method if present */
525 502 if (data[!primary])
arch/sh/kernel/cpu/sh2/setup-sh7619.c
Diff comments   View file @ 7f3edee
... ... @@ -65,7 +65,7 @@
65 65 };
66 66  
67 67 static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, groups,
68   - NULL, NULL, prio_registers, NULL);
  68 + NULL, prio_registers, NULL);
69 69  
70 70 static struct plat_sci_port sci_platform_data[] = {
71 71 {
arch/sh/kernel/cpu/sh2a/setup-sh7203.c
Diff comments   View file @ 7f3edee
... ... @@ -235,7 +235,7 @@
235 235 };
236 236  
237 237 static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
238   - NULL, mask_registers, prio_registers, NULL);
  238 + mask_registers, prio_registers, NULL);
239 239  
240 240 static struct plat_sci_port sci_platform_data[] = {
241 241 {
arch/sh/kernel/cpu/sh2a/setup-sh7206.c
Diff comments   View file @ 7f3edee
... ... @@ -167,7 +167,7 @@
167 167 };
168 168  
169 169 static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
170   - NULL, mask_registers, prio_registers, NULL);
  170 + mask_registers, prio_registers, NULL);
171 171  
172 172 static struct plat_sci_port sci_platform_data[] = {
173 173 {
arch/sh/kernel/cpu/sh3/setup-sh7705.c
Diff comments   View file @ 7f3edee
... ... @@ -66,12 +66,6 @@
66 66 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
67 67 };
68 68  
69   -static struct intc_prio priorities[] __initdata = {
70   - INTC_PRIO(DMAC, 7),
71   - INTC_PRIO(SCIF2, 3),
72   - INTC_PRIO(SCIF0, 3),
73   -};
74   -
75 69 static struct intc_prio_reg prio_registers[] __initdata = {
76 70 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
77 71 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
... ... @@ -85,7 +79,7 @@
85 79 };
86 80  
87 81 static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups,
88   - priorities, NULL, prio_registers, NULL);
  82 + NULL, prio_registers, NULL);
89 83  
90 84 static struct intc_vect vectors_irq[] __initdata = {
91 85 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
... ... @@ -93,7 +87,7 @@
93 87 };
94 88  
95 89 static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL,
96   - priorities, NULL, prio_registers, NULL);
  90 + NULL, prio_registers, NULL);
97 91  
98 92 static struct plat_sci_port sci_platform_data[] = {
99 93 {
arch/sh/kernel/cpu/sh3/setup-sh770x.c
Diff comments   View file @ 7f3edee
... ... @@ -81,13 +81,6 @@
81 81 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
82 82 };
83 83  
84   -static struct intc_prio priorities[] __initdata = {
85   - INTC_PRIO(DMAC, 7),
86   - INTC_PRIO(SCI, 3),
87   - INTC_PRIO(SCIF2, 3),
88   - INTC_PRIO(SCIF0, 3),
89   -};
90   -
91 84 static struct intc_prio_reg prio_registers[] __initdata = {
92 85 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
93 86 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
... ... @@ -109,7 +102,7 @@
109 102 };
110 103  
111 104 static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
112   - priorities, NULL, prio_registers, NULL);
  105 + NULL, prio_registers, NULL);
113 106  
114 107 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
115 108 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
... ... @@ -120,7 +113,7 @@
120 113 };
121 114  
122 115 static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
123   - priorities, NULL, prio_registers, NULL);
  116 + NULL, prio_registers, NULL);
124 117 #endif
125 118  
126 119 static struct resource rtc_resources[] = {
arch/sh/kernel/cpu/sh3/setup-sh7710.c
Diff comments   View file @ 7f3edee
... ... @@ -73,18 +73,6 @@
73 73 INTC_GROUP(SIOF1, SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI),
74 74 };
75 75  
76   -static struct intc_prio priorities[] __initdata = {
77   - INTC_PRIO(DMAC1, 7),
78   - INTC_PRIO(DMAC2, 7),
79   - INTC_PRIO(SCIF0, 3),
80   - INTC_PRIO(SCIF1, 3),
81   - INTC_PRIO(SIOF0, 3),
82   - INTC_PRIO(SIOF1, 3),
83   - INTC_PRIO(EDMAC0, 5),
84   - INTC_PRIO(EDMAC1, 5),
85   - INTC_PRIO(EDMAC2, 5),
86   -};
87   -
88 76 static struct intc_prio_reg prio_registers[] __initdata = {
89 77 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
90 78 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
... ... @@ -101,7 +89,7 @@
101 89 };
102 90  
103 91 static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
104   - priorities, NULL, prio_registers, NULL);
  92 + NULL, prio_registers, NULL);
105 93  
106 94 static struct intc_vect vectors_irq[] __initdata = {
107 95 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
... ... @@ -109,7 +97,7 @@
109 97 };
110 98  
111 99 static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL,
112   - priorities, NULL, prio_registers, NULL);
  100 + NULL, prio_registers, NULL);
113 101  
114 102 static struct resource rtc_resources[] = {
115 103 [0] = {
arch/sh/kernel/cpu/sh3/setup-sh7720.c
Diff comments   View file @ 7f3edee
... ... @@ -156,16 +156,6 @@
156 156 INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3),
157 157 };
158 158  
159   -static struct intc_prio priorities[] __initdata = {
160   - INTC_PRIO(SCIF0, 2),
161   - INTC_PRIO(SCIF1, 2),
162   - INTC_PRIO(DMAC1, 1),
163   - INTC_PRIO(DMAC2, 1),
164   - INTC_PRIO(RTC, 2),
165   - INTC_PRIO(TMU, 2),
166   - INTC_PRIO(TPU, 2),
167   -};
168   -
169 159 static struct intc_prio_reg prio_registers[] __initdata = {
170 160 { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
171 161 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
... ... @@ -184,7 +174,7 @@
184 174 };
185 175  
186 176 static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
187   - priorities, NULL, prio_registers, NULL);
  177 + NULL, prio_registers, NULL);
188 178  
189 179 static struct intc_sense_reg sense_registers[] __initdata = {
190 180 { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
... ... @@ -197,7 +187,7 @@
197 187 };
198 188  
199 189 static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq,
200   - NULL, priorities, NULL, prio_registers, sense_registers);
  190 + NULL, NULL, prio_registers, sense_registers);
201 191  
202 192 void __init plat_irq_setup_pins(int mode)
203 193 {
arch/sh/kernel/cpu/sh4/setup-sh7750.c
Diff comments   View file @ 7f3edee
... ... @@ -126,12 +126,6 @@
126 126 INTC_GROUP(REF, REF_RCMI, REF_ROVI),
127 127 };
128 128  
129   -static struct intc_prio priorities[] __initdata = {
130   - INTC_PRIO(SCIF, 3),
131   - INTC_PRIO(SCI1, 3),
132   - INTC_PRIO(DMAC, 7),
133   -};
134   -
135 129 static struct intc_prio_reg prio_registers[] __initdata = {
136 130 { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
137 131 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, SCI1, 0 } },
... ... @@ -143,7 +137,7 @@
143 137 };
144 138  
145 139 static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, groups,
146   - priorities, NULL, prio_registers, NULL);
  140 + NULL, prio_registers, NULL);
147 141  
148 142 /* SH7750, SH7750S, SH7751 and SH7091 all have 4-channel DMA controllers */
149 143 #if defined(CONFIG_CPU_SUBTYPE_SH7750) || \
... ... @@ -163,7 +157,7 @@
163 157  
164 158 static DECLARE_INTC_DESC(intc_desc_dma4, "sh7750_dma4",
165 159 vectors_dma4, groups_dma4,
166   - priorities, NULL, prio_registers, NULL);
  160 + NULL, prio_registers, NULL);
167 161 #endif
168 162  
169 163 /* SH7750R and SH7751R both have 8-channel DMA controllers */
... ... @@ -184,7 +178,7 @@
184 178  
185 179 static DECLARE_INTC_DESC(intc_desc_dma8, "sh7750_dma8",
186 180 vectors_dma8, groups_dma8,
187   - priorities, NULL, prio_registers, NULL);
  181 + NULL, prio_registers, NULL);
188 182 #endif
189 183  
190 184 /* SH7750R, SH7751 and SH7751R all have two extra timer channels */
... ... @@ -205,7 +199,7 @@
205 199 };
206 200  
207 201 static DECLARE_INTC_DESC(intc_desc_tmu34, "sh7750_tmu34",
208   - vectors_tmu34, NULL, priorities,
  202 + vectors_tmu34, NULL,
209 203 mask_registers, prio_registers, NULL);
210 204 #endif
211 205  
... ... @@ -216,7 +210,7 @@
216 210 };
217 211  
218 212 static DECLARE_INTC_DESC(intc_desc_irlm, "sh7750_irlm", vectors_irlm, NULL,
219   - priorities, NULL, prio_registers, NULL);
  213 + NULL, prio_registers, NULL);
220 214  
221 215 /* SH7751 and SH7751R both have PCI */
222 216 #if defined(CONFIG_CPU_SUBTYPE_SH7751) || defined(CONFIG_CPU_SUBTYPE_SH7751R)
... ... @@ -233,7 +227,7 @@
233 227 };
234 228  
235 229 static DECLARE_INTC_DESC(intc_desc_pci, "sh7750_pci", vectors_pci, groups_pci,
236   - priorities, mask_registers, prio_registers, NULL);
  230 + mask_registers, prio_registers, NULL);
237 231 #endif
238 232  
239 233 #if defined(CONFIG_CPU_SUBTYPE_SH7750) || \
arch/sh/kernel/cpu/sh4/setup-sh7760.c
Diff comments   View file @ 7f3edee
... ... @@ -92,15 +92,6 @@
92 92 INTC_GROUP(REF, REF_RCMI, REF_ROVI),
93 93 };
94 94  
95   -static struct intc_prio priorities[] __initdata = {
96   - INTC_PRIO(SCIF0, 3),
97   - INTC_PRIO(SCIF1, 3),
98   - INTC_PRIO(SCIF2, 3),
99   - INTC_PRIO(SIM, 3),
100   - INTC_PRIO(DMAC, 7),
101   - INTC_PRIO(DMABRG, 13),
102   -};
103   -
104 95 static struct intc_mask_reg mask_registers[] __initdata = {
105 96 { 0xfe080040, 0xfe080060, 32, /* INTMSK00 / INTMSKCLR00 */
106 97 { IRQ4, IRQ5, IRQ6, IRQ7, 0, 0, HCAN20, HCAN21,
... ... @@ -132,7 +123,7 @@
132 123 };
133 124  
134 125 static DECLARE_INTC_DESC(intc_desc, "sh7760", vectors, groups,
135   - priorities, mask_registers, prio_registers, NULL);
  126 + mask_registers, prio_registers, NULL);
136 127  
137 128 static struct intc_vect vectors_irq[] __initdata = {
138 129 INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0),
... ... @@ -140,7 +131,7 @@
140 131 };
141 132  
142 133 static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
143   - priorities, mask_registers, prio_registers, NULL);
  134 + mask_registers, prio_registers, NULL);
144 135  
145 136 static struct plat_sci_port sci_platform_data[] = {
146 137 {
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
Diff comments   View file @ 7f3edee
... ... @@ -157,14 +157,6 @@
157 157 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
158 158 };
159 159  
160   -static struct intc_prio priorities[] __initdata = {
161   - INTC_PRIO(SCIF0, 3),
162   - INTC_PRIO(SCIF1, 3),
163   - INTC_PRIO(SCIF2, 3),
164   - INTC_PRIO(TMU0, 2),
165   - INTC_PRIO(TMU1, 2),
166   -};
167   -
168 160 static struct intc_mask_reg mask_registers[] __initdata = {
169 161 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
170 162 { } },
... ... @@ -217,7 +209,7 @@
217 209 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
218 210 };
219 211  
220   -static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups, priorities,
  212 +static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups,
221 213 mask_registers, prio_registers, sense_registers);
222 214  
223 215 void __init plat_irq_setup(void)
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
Diff comments   View file @ 7f3edee
... ... @@ -168,11 +168,6 @@
168 168 INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3),
169 169 };
170 170  
171   -static struct intc_prio priorities[] __initdata = {
172   - INTC_PRIO(SCIF0, 3),
173   - INTC_PRIO(SCIF1, 3),
174   -};
175   -
176 171 static struct intc_mask_reg mask_registers[] __initdata = {
177 172 { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */
178 173 { 0, 0, 0, 0, 0, 0, GPIO, FLCTL,
... ... @@ -195,7 +190,7 @@
195 190 { 0xffd4001c, 0, 32, 8, /* INT2PRI7 */ { FLCTL, GPIO } },
196 191 };
197 192  
198   -static DECLARE_INTC_DESC(intc_desc, "sh7780", vectors, groups, priorities,
  193 +static DECLARE_INTC_DESC(intc_desc, "sh7780", vectors, groups,
199 194 mask_registers, prio_registers, NULL);
200 195  
201 196 /* Support for external interrupt pins in IRQ mode */
... ... @@ -223,7 +218,7 @@
223 218 };
224 219  
225 220 static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors,
226   - NULL, NULL, irq_mask_registers, irq_prio_registers,
  221 + NULL, irq_mask_registers, irq_prio_registers,
227 222 irq_sense_registers);
228 223  
229 224 /* External interrupt pins in IRL mode */
230 225  
... ... @@ -257,10 +252,10 @@
257 252 };
258 253  
259 254 static DECLARE_INTC_DESC(intc_irl7654_desc, "sh7780-irl7654", irl_vectors,
260   - NULL, NULL, irl7654_mask_registers, NULL, NULL);
  255 + NULL, irl7654_mask_registers, NULL, NULL);
261 256  
262 257 static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
263   - NULL, NULL, irl3210_mask_registers, NULL, NULL);
  258 + NULL, irl3210_mask_registers, NULL, NULL);
264 259  
265 260 #define INTC_ICR0 0xffd00000
266 261 #define INTC_INTMSK0 0xffd00044
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
Diff comments   View file @ 7f3edee
... ... @@ -178,15 +178,6 @@
178 178 INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3),
179 179 };
180 180  
181   -static struct intc_prio priorities[] __initdata = {
182   - INTC_PRIO(SCIF0, 3),
183   - INTC_PRIO(SCIF1, 3),
184   - INTC_PRIO(SCIF2, 3),
185   - INTC_PRIO(SCIF3, 3),
186   - INTC_PRIO(SCIF4, 3),
187   - INTC_PRIO(SCIF5, 3),
188   -};
189   -
190 181 static struct intc_mask_reg mask_registers[] __initdata = {
191 182 { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */
192 183 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
... ... @@ -227,7 +218,7 @@
227 218 { 0xffd40024, 0, 32, 8, /* INT2PRI9 */ { DU, GDTA, } },
228 219 };
229 220  
230   -static DECLARE_INTC_DESC(intc_desc, "sh7785", vectors, groups, priorities,
  221 +static DECLARE_INTC_DESC(intc_desc, "sh7785", vectors, groups,
231 222 mask_registers, prio_registers, NULL);
232 223  
233 224 /* Support for external interrupt pins in IRQ mode */
234 225  
... ... @@ -248,11 +239,11 @@
248 239 };
249 240  
250 241 static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123,
251   - NULL, NULL, mask_registers, prio_registers,
  242 + NULL, mask_registers, prio_registers,
252 243 sense_registers);
253 244  
254 245 static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567,
255   - NULL, NULL, mask_registers, prio_registers,
  246 + NULL, mask_registers, prio_registers,
256 247 sense_registers);
257 248  
258 249 /* External interrupt pins in IRL mode */
259 250  
... ... @@ -280,10 +271,10 @@
280 271 };
281 272  
282 273 static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7785-irl0123", vectors_irl0123,
283   - NULL, NULL, mask_registers, NULL, NULL);
  274 + NULL, mask_registers, NULL, NULL);
284 275  
285 276 static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567,
286   - NULL, NULL, mask_registers, NULL, NULL);
  277 + NULL, mask_registers, NULL, NULL);
287 278  
288 279 #define INTC_ICR0 0xffd00000
289 280 #define INTC_INTMSK0 0xffd00044
arch/sh/kernel/cpu/sh4a/setup-shx3.c
Diff comments   View file @ 7f3edee
... ... @@ -165,13 +165,6 @@
165 165 INTC_GROUP(DTU3, DTU3_TEND, DTU3_AE, DTU3_TMISS),
166 166 };
167 167  
168   -static struct intc_prio priorities[] __initdata = {
169   - INTC_PRIO(SCIF0, 3),
170   - INTC_PRIO(SCIF1, 3),
171   - INTC_PRIO(SCIF2, 3),
172   - INTC_PRIO(SCIF3, 3),
173   -};
174   -
175 168 static struct intc_mask_reg mask_registers[] __initdata = {
176 169 { 0xfe410030, 0xfe410050, 32, /* CnINTMSK0 / CnINTMSKCLR0 */
177 170 { IRQ0, IRQ1, IRQ2, IRQ3 } },
... ... @@ -218,7 +211,7 @@
218 211 INTICI3, INTICI2, INTICI1, INTICI0 }, INTC_SMP(4, 4) },
219 212 };
220 213  
221   -static DECLARE_INTC_DESC(intc_desc, "shx3", vectors, groups, priorities,
  214 +static DECLARE_INTC_DESC(intc_desc, "shx3", vectors, groups,
222 215 mask_registers, prio_registers, NULL);
223 216  
224 217 /* Support for external interrupt pins in IRQ mode */
... ... @@ -232,8 +225,7 @@
232 225 };
233 226  
234 227 static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups,
235   - priorities, mask_registers, prio_registers,
236   - sense_registers);
  228 + mask_registers, prio_registers, sense_registers);
237 229  
238 230 /* External interrupt pins in IRL mode */
239 231 static struct intc_vect vectors_irl[] __initdata = {
... ... @@ -248,7 +240,7 @@
248 240 };
249 241  
250 242 static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups,
251   - priorities, mask_registers, prio_registers, NULL);
  243 + mask_registers, prio_registers, NULL);
252 244  
253 245 void __init plat_irq_setup_pins(int mode)
254 246 {
include/asm-sh/hw_irq.h
Diff comments   View file @ 7f3edee
... ... @@ -33,13 +33,6 @@
33 33 #define INTC_VECT(enum_id, vect) { enum_id, vect }
34 34 #define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
35 35  
36   -struct intc_prio {
37   - intc_enum enum_id;
38   - unsigned char priority;
39   -};
40   -
41   -#define INTC_PRIO(enum_id, prio) { enum_id, prio }
42   -
43 36 struct intc_group {
44 37 intc_enum enum_id;
45 38 intc_enum enum_ids[32];
... ... @@ -79,8 +72,6 @@
79 72 unsigned int nr_vectors;
80 73 struct intc_group *groups;
81 74 unsigned int nr_groups;
82   - struct intc_prio *priorities;
83   - unsigned int nr_priorities;
84 75 struct intc_mask_reg *mask_regs;
85 76 unsigned int nr_mask_regs;
86 77 struct intc_prio_reg *prio_regs;
87 78  
... ... @@ -92,10 +83,9 @@
92 83  
93 84 #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
94 85 #define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
95   - priorities, mask_regs, prio_regs, sense_regs) \
  86 + mask_regs, prio_regs, sense_regs) \
96 87 struct intc_desc symbol __initdata = { \
97 88 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
98   - _INTC_ARRAY(priorities), \
99 89 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
100 90 _INTC_ARRAY(sense_regs), \
101 91 chipname, \