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Commit 7f6569f54695c18e13be2c538834fdd0fad1d3a6

Authored by Vincent Donnefort
Committed by Linus Walleij
1 parent 62ffac141e
Exists in smarc-imx_3.14.28_1.0.0_ga and in 1 other branch imx_3.14.28_1.0.0_ga

gpio: ich: add GPO_BLINK support 

This patch makes sure blink hardware is disabled for selected GPIO. Blink
hardware is controled by GPO_BLINK register and is available for GPIOs from 0
to 31.

Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Showing 1 changed file with 7 additions and 1 deletions Side-by-side Diff

drivers/gpio/gpio-ich.c
Diff comments   View file @ 7f6569f
... ... @@ -41,12 +41,14 @@
41 41 GPIO_USE_SEL = 0,
42 42 GPIO_IO_SEL,
43 43 GPIO_LVL,
  44 + GPO_BLINK
44 45 };
45 46  
46   -static const u8 ichx_regs[3][3] = {
  47 +static const u8 ichx_regs[4][3] = {
47 48 {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */
48 49 {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */
49 50 {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */
  51 + {0x18, 0x18, 0x18}, /* BLINK offset */
50 52 };
51 53  
52 54 static const u8 ichx_reglen[3] = {
... ... @@ -148,6 +150,10 @@
148 150 static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr,
149 151 int val)
150 152 {
  153 + /* Disable blink hardware which is available for GPIOs from 0 to 31. */
  154 + if (nr < 32)
  155 + ichx_write_bit(GPO_BLINK, nr, 0, 0);
  156 +
151 157 /* Set GPIO output value. */
152 158 ichx_write_bit(GPIO_LVL, nr, val, 0);
153 159