Commit 88d6e19900366781739df033e9c0e2532e715fa5
Committed by
Linus Torvalds
1 parent
1bcbba3060
Exists in
master
and in
7 other branches
[PATCH] FRV: improve FRV's use of generic IRQ handling
Improve FRV's use of generic IRQ handling: (*) Use generic_handle_irq() rather than __do_IRQ() as the latter is obsolete. (*) Don't implement enable() and disable() ops as these will fall back to using unmask() and mask(). (*) Provide mask_ack() functions to avoid a call each to mask() and ack(). (*) Make the cascade handlers always return IRQ_HANDLED. (*) Implement the mask() and unmask() functions in the same order as they're listed in the ops table. Signed-off-by: David Howells <dhowells@redhat.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Showing 4 changed files with 53 additions and 69 deletions Side-by-side Diff
arch/frv/kernel/irq-mb93091.c
... | ... | @@ -36,41 +36,45 @@ |
36 | 36 | /* |
37 | 37 | * on-motherboard FPGA PIC operations |
38 | 38 | */ |
39 | -static void frv_fpga_enable(unsigned int irq) | |
39 | +static void frv_fpga_mask(unsigned int irq) | |
40 | 40 | { |
41 | 41 | uint16_t imr = __get_IMR(); |
42 | 42 | |
43 | - imr &= ~(1 << (irq - IRQ_BASE_FPGA)); | |
43 | + imr |= 1 << (irq - IRQ_BASE_FPGA); | |
44 | 44 | |
45 | 45 | __set_IMR(imr); |
46 | 46 | } |
47 | 47 | |
48 | -static void frv_fpga_disable(unsigned int irq) | |
48 | +static void frv_fpga_ack(unsigned int irq) | |
49 | 49 | { |
50 | + __clr_IFR(1 << (irq - IRQ_BASE_FPGA)); | |
51 | +} | |
52 | + | |
53 | +static void frv_fpga_mask_ack(unsigned int irq) | |
54 | +{ | |
50 | 55 | uint16_t imr = __get_IMR(); |
51 | 56 | |
52 | 57 | imr |= 1 << (irq - IRQ_BASE_FPGA); |
53 | - | |
54 | 58 | __set_IMR(imr); |
55 | -} | |
56 | 59 | |
57 | -static void frv_fpga_ack(unsigned int irq) | |
58 | -{ | |
59 | 60 | __clr_IFR(1 << (irq - IRQ_BASE_FPGA)); |
60 | 61 | } |
61 | 62 | |
62 | -static void frv_fpga_end(unsigned int irq) | |
63 | +static void frv_fpga_unmask(unsigned int irq) | |
63 | 64 | { |
65 | + uint16_t imr = __get_IMR(); | |
66 | + | |
67 | + imr &= ~(1 << (irq - IRQ_BASE_FPGA)); | |
68 | + | |
69 | + __set_IMR(imr); | |
64 | 70 | } |
65 | 71 | |
66 | 72 | static struct irq_chip frv_fpga_pic = { |
67 | 73 | .name = "mb93091", |
68 | - .enable = frv_fpga_enable, | |
69 | - .disable = frv_fpga_disable, | |
70 | 74 | .ack = frv_fpga_ack, |
71 | - .mask = frv_fpga_disable, | |
72 | - .unmask = frv_fpga_enable, | |
73 | - .end = frv_fpga_end, | |
75 | + .mask = frv_fpga_mask, | |
76 | + .mask_ack = frv_fpga_mask_ack, | |
77 | + .unmask = frv_fpga_unmask, | |
74 | 78 | }; |
75 | 79 | |
76 | 80 | /* |
... | ... | @@ -79,7 +83,6 @@ |
79 | 83 | static irqreturn_t fpga_interrupt(int irq, void *_mask, struct pt_regs *regs) |
80 | 84 | { |
81 | 85 | uint16_t imr, mask = (unsigned long) _mask; |
82 | - irqreturn_t iret = 0; | |
83 | 86 | |
84 | 87 | imr = __get_IMR(); |
85 | 88 | mask = mask & ~imr & __get_IFR(); |
86 | 89 | |
... | ... | @@ -92,11 +95,10 @@ |
92 | 95 | irq = 31 - irq; |
93 | 96 | mask &= ~(1 << irq); |
94 | 97 | |
95 | - if (__do_IRQ(IRQ_BASE_FPGA + irq, regs)) | |
96 | - iret |= IRQ_HANDLED; | |
98 | + generic_handle_irq(IRQ_BASE_FPGA + irq, regs); | |
97 | 99 | } |
98 | 100 | |
99 | - return iret; | |
101 | + return IRQ_HANDLED; | |
100 | 102 | } |
101 | 103 | |
102 | 104 | /* |
arch/frv/kernel/irq-mb93093.c
... | ... | @@ -35,40 +35,44 @@ |
35 | 35 | /* |
36 | 36 | * off-CPU FPGA PIC operations |
37 | 37 | */ |
38 | -static void frv_fpga_enable(unsigned int irq) | |
38 | +static void frv_fpga_mask(unsigned int irq) | |
39 | 39 | { |
40 | 40 | uint16_t imr = __get_IMR(); |
41 | 41 | |
42 | - imr &= ~(1 << (irq - IRQ_BASE_FPGA)); | |
43 | - | |
42 | + imr |= 1 << (irq - IRQ_BASE_FPGA); | |
44 | 43 | __set_IMR(imr); |
45 | 44 | } |
46 | 45 | |
47 | -static void frv_fpga_disable(unsigned int irq) | |
46 | +static void frv_fpga_ack(unsigned int irq) | |
48 | 47 | { |
48 | + __clr_IFR(1 << (irq - IRQ_BASE_FPGA)); | |
49 | +} | |
50 | + | |
51 | +static void frv_fpga_mask_ack(unsigned int irq) | |
52 | +{ | |
49 | 53 | uint16_t imr = __get_IMR(); |
50 | 54 | |
51 | 55 | imr |= 1 << (irq - IRQ_BASE_FPGA); |
52 | - | |
53 | 56 | __set_IMR(imr); |
54 | -} | |
55 | 57 | |
56 | -static void frv_fpga_ack(unsigned int irq) | |
57 | -{ | |
58 | 58 | __clr_IFR(1 << (irq - IRQ_BASE_FPGA)); |
59 | 59 | } |
60 | 60 | |
61 | -static void frv_fpga_end(unsigned int irq) | |
61 | +static void frv_fpga_unmask(unsigned int irq) | |
62 | 62 | { |
63 | + uint16_t imr = __get_IMR(); | |
64 | + | |
65 | + imr &= ~(1 << (irq - IRQ_BASE_FPGA)); | |
66 | + | |
67 | + __set_IMR(imr); | |
63 | 68 | } |
64 | 69 | |
65 | 70 | static struct irq_chip frv_fpga_pic = { |
66 | 71 | .name = "mb93093", |
67 | - .enable = frv_fpga_enable, | |
68 | - .disable = frv_fpga_disable, | |
69 | 72 | .ack = frv_fpga_ack, |
70 | - .mask = frv_fpga_disable, | |
71 | - .unmask = frv_fpga_enable, | |
73 | + .mask = frv_fpga_mask, | |
74 | + .mask_ack = frv_fpga_mask_ack, | |
75 | + .unmask = frv_fpga_unmask, | |
72 | 76 | .end = frv_fpga_end, |
73 | 77 | }; |
74 | 78 | |
... | ... | @@ -78,7 +82,6 @@ |
78 | 82 | static irqreturn_t fpga_interrupt(int irq, void *_mask, struct pt_regs *regs) |
79 | 83 | { |
80 | 84 | uint16_t imr, mask = (unsigned long) _mask; |
81 | - irqreturn_t iret = 0; | |
82 | 85 | |
83 | 86 | imr = __get_IMR(); |
84 | 87 | mask = mask & ~imr & __get_IFR(); |
85 | 88 | |
... | ... | @@ -91,11 +94,10 @@ |
91 | 94 | irq = 31 - irq; |
92 | 95 | mask &= ~(1 << irq); |
93 | 96 | |
94 | - if (__do_IRQ(IRQ_BASE_FPGA + irq, regs)) | |
95 | - iret |= IRQ_HANDLED; | |
97 | + generic_irq_handle(IRQ_BASE_FPGA + irq, regs); | |
96 | 98 | } |
97 | 99 | |
98 | - return iret; | |
100 | + return IRQ_HANDLED; | |
99 | 101 | } |
100 | 102 | |
101 | 103 | /* |
arch/frv/kernel/irq-mb93493.c
... | ... | @@ -43,8 +43,9 @@ |
43 | 43 | |
44 | 44 | /* |
45 | 45 | * daughter board PIC operations |
46 | + * - there is no way to ACK interrupts in the MB93493 chip | |
46 | 47 | */ |
47 | -static void frv_mb93493_enable(unsigned int irq) | |
48 | +static void frv_mb93493_mask(unsigned int irq) | |
48 | 49 | { |
49 | 50 | uint32_t iqsr; |
50 | 51 | volatile void *piqsr; |
51 | 52 | |
52 | 53 | |
... | ... | @@ -55,12 +56,16 @@ |
55 | 56 | piqsr = __addr_MB93493_IQSR(0); |
56 | 57 | |
57 | 58 | iqsr = readl(piqsr); |
58 | - iqsr |= 1 << (irq - IRQ_BASE_MB93493 + 16); | |
59 | + iqsr &= ~(1 << (irq - IRQ_BASE_MB93493 + 16)); | |
59 | 60 | writel(iqsr, piqsr); |
60 | 61 | } |
61 | 62 | |
62 | -static void frv_mb93493_disable(unsigned int irq) | |
63 | +static void frv_mb93493_ack(unsigned int irq) | |
63 | 64 | { |
65 | +} | |
66 | + | |
67 | +static void frv_mb93493_unmask(unsigned int irq) | |
68 | +{ | |
64 | 69 | uint32_t iqsr; |
65 | 70 | volatile void *piqsr; |
66 | 71 | |
67 | 72 | |
68 | 73 | |
69 | 74 | |
... | ... | @@ -70,26 +75,16 @@ |
70 | 75 | piqsr = __addr_MB93493_IQSR(0); |
71 | 76 | |
72 | 77 | iqsr = readl(piqsr); |
73 | - iqsr &= ~(1 << (irq - IRQ_BASE_MB93493 + 16)); | |
78 | + iqsr |= 1 << (irq - IRQ_BASE_MB93493 + 16); | |
74 | 79 | writel(iqsr, piqsr); |
75 | 80 | } |
76 | 81 | |
77 | -static void frv_mb93493_ack(unsigned int irq) | |
78 | -{ | |
79 | -} | |
80 | - | |
81 | -static void frv_mb93493_end(unsigned int irq) | |
82 | -{ | |
83 | -} | |
84 | - | |
85 | 82 | static struct irq_chip frv_mb93493_pic = { |
86 | 83 | .name = "mb93093", |
87 | - .enable = frv_mb93493_enable, | |
88 | - .disable = frv_mb93493_disable, | |
89 | 84 | .ack = frv_mb93493_ack, |
90 | - .mask = frv_mb93493_disable, | |
91 | - .unmask = frv_mb93493_enable, | |
92 | - .end = frv_mb93493_end, | |
85 | + .mask = frv_mb93493_mask, | |
86 | + .mask_ack = frv_mb93493_mask, | |
87 | + .unmask = frv_mb93493_unmask, | |
93 | 88 | }; |
94 | 89 | |
95 | 90 | /* |
... | ... | @@ -98,7 +93,6 @@ |
98 | 93 | static irqreturn_t mb93493_interrupt(int irq, void *_piqsr, struct pt_regs *regs) |
99 | 94 | { |
100 | 95 | volatile void *piqsr = _piqsr; |
101 | - irqreturn_t iret = 0; | |
102 | 96 | uint32_t iqsr; |
103 | 97 | |
104 | 98 | iqsr = readl(piqsr); |
105 | 99 | |
... | ... | @@ -112,11 +106,10 @@ |
112 | 106 | irq = 31 - irq; |
113 | 107 | iqsr &= ~(1 << irq); |
114 | 108 | |
115 | - if (__do_IRQ(IRQ_BASE_MB93493 + irq, regs)) | |
116 | - iret |= IRQ_HANDLED; | |
109 | + generic_handle_irq(IRQ_BASE_MB93493 + irq, regs); | |
117 | 110 | } |
118 | 111 | |
119 | - return iret; | |
112 | + return IRQ_HANDLED; | |
120 | 113 | } |
121 | 114 | |
122 | 115 | /* |
arch/frv/kernel/irq.c
... | ... | @@ -97,19 +97,8 @@ |
97 | 97 | /* |
98 | 98 | * on-CPU PIC operations |
99 | 99 | */ |
100 | -static void frv_cpupic_enable(unsigned int irqlevel) | |
101 | -{ | |
102 | - __clr_MASK(irqlevel); | |
103 | -} | |
104 | - | |
105 | -static void frv_cpupic_disable(unsigned int irqlevel) | |
106 | -{ | |
107 | - __set_MASK(irqlevel); | |
108 | -} | |
109 | - | |
110 | 100 | static void frv_cpupic_ack(unsigned int irqlevel) |
111 | 101 | { |
112 | - __set_MASK(irqlevel); | |
113 | 102 | __clr_RC(irqlevel); |
114 | 103 | __clr_IRL(); |
115 | 104 | } |
... | ... | @@ -138,8 +127,6 @@ |
138 | 127 | |
139 | 128 | static struct irq_chip frv_cpu_pic = { |
140 | 129 | .name = "cpu", |
141 | - .enable = frv_cpupic_enable, | |
142 | - .disable = frv_cpupic_disable, | |
143 | 130 | .ack = frv_cpupic_ack, |
144 | 131 | .mask = frv_cpupic_mask, |
145 | 132 | .mask_ack = frv_cpupic_mask_ack, |
... | ... | @@ -156,7 +143,7 @@ |
156 | 143 | asmlinkage void do_IRQ(void) |
157 | 144 | { |
158 | 145 | irq_enter(); |
159 | - __do_IRQ(__get_IRL(), __frame); | |
146 | + generic_handle_irq(__get_IRL(), __frame); | |
160 | 147 | irq_exit(); |
161 | 148 | } |
162 | 149 |