Commit 8d685b7f4d9c9882442bf1b492558d5f17b694fa

Authored by Arnd Bergmann

Merge branches 'at91/gpio', 'at91/ioremap', 'drivers/macb-gem-cleanup' and 'msm/…

…misc' into next/cleanup

Showing 12 changed files Side-by-side Diff

arch/arm/Kconfig.debug
... ... @@ -255,6 +255,43 @@
255 255 their output to the standard serial port on the RealView
256 256 PB1176 platform.
257 257  
  258 + config DEBUG_MSM_UART1
  259 + bool "Kernel low-level debugging messages via MSM UART1"
  260 + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
  261 + help
  262 + Say Y here if you want the debug print routines to direct
  263 + their output to the first serial port on MSM devices.
  264 +
  265 + config DEBUG_MSM_UART2
  266 + bool "Kernel low-level debugging messages via MSM UART2"
  267 + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
  268 + help
  269 + Say Y here if you want the debug print routines to direct
  270 + their output to the second serial port on MSM devices.
  271 +
  272 + config DEBUG_MSM_UART3
  273 + bool "Kernel low-level debugging messages via MSM UART3"
  274 + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
  275 + help
  276 + Say Y here if you want the debug print routines to direct
  277 + their output to the third serial port on MSM devices.
  278 +
  279 + config DEBUG_MSM8660_UART
  280 + bool "Kernel low-level debugging messages via MSM 8660 UART"
  281 + depends on ARCH_MSM8X60
  282 + select MSM_HAS_DEBUG_UART_HS
  283 + help
  284 + Say Y here if you want the debug print routines to direct
  285 + their output to the serial port on MSM 8660 devices.
  286 +
  287 + config DEBUG_MSM8960_UART
  288 + bool "Kernel low-level debugging messages via MSM 8960 UART"
  289 + depends on ARCH_MSM8960
  290 + select MSM_HAS_DEBUG_UART_HS
  291 + help
  292 + Say Y here if you want the debug print routines to direct
  293 + their output to the serial port on MSM 8960 devices.
  294 +
258 295 endchoice
259 296  
260 297 config EARLY_PRINTK
arch/arm/mach-msm/Kconfig
... ... @@ -13,7 +13,6 @@
13 13 select CPU_V6
14 14 select GPIO_MSM_V1
15 15 select MSM_PROC_COMM
16   - select HAS_MSM_DEBUG_UART_PHYS
17 16  
18 17 config ARCH_MSM7X30
19 18 bool "MSM7x30"
... ... @@ -25,7 +24,6 @@
25 24 select MSM_GPIOMUX
26 25 select GPIO_MSM_V1
27 26 select MSM_PROC_COMM
28   - select HAS_MSM_DEBUG_UART_PHYS
29 27  
30 28 config ARCH_QSD8X50
31 29 bool "QSD8X50"
... ... @@ -37,7 +35,6 @@
37 35 select MSM_GPIOMUX
38 36 select GPIO_MSM_V1
39 37 select MSM_PROC_COMM
40   - select HAS_MSM_DEBUG_UART_PHYS
41 38  
42 39 config ARCH_MSM8X60
43 40 bool "MSM8X60"
... ... @@ -63,6 +60,9 @@
63 60  
64 61 endchoice
65 62  
  63 +config MSM_HAS_DEBUG_UART_HS
  64 + bool
  65 +
66 66 config MSM_SOC_REV_A
67 67 bool
68 68 config ARCH_MSM_SCORPIONMP
... ... @@ -73,9 +73,6 @@
73 73 config ARCH_MSM_SCORPION
74 74 bool
75 75  
76   -config HAS_MSM_DEBUG_UART_PHYS
77   - bool
78   -
79 76 config MSM_VIC
80 77 bool
81 78  
... ... @@ -151,32 +148,6 @@
151 148 Support for the Qualcomm MSM8960 RUMI3 emulator.
152 149  
153 150 endmenu
154   -
155   -config MSM_DEBUG_UART
156   - int
157   - default 1 if MSM_DEBUG_UART1
158   - default 2 if MSM_DEBUG_UART2
159   - default 3 if MSM_DEBUG_UART3
160   -
161   -if HAS_MSM_DEBUG_UART_PHYS
162   -choice
163   - prompt "Debug UART"
164   -
165   - default MSM_DEBUG_UART_NONE
166   -
167   - config MSM_DEBUG_UART_NONE
168   - bool "None"
169   -
170   - config MSM_DEBUG_UART1
171   - bool "UART1"
172   -
173   - config MSM_DEBUG_UART2
174   - bool "UART2"
175   -
176   - config MSM_DEBUG_UART3
177   - bool "UART3"
178   -endchoice
179   -endif
180 151  
181 152 config MSM_SMD_PKG3
182 153 bool
arch/arm/mach-msm/include/mach/debug-macro.S
1   -/* arch/arm/mach-msm7200/include/mach/debug-macro.S
  1 +/*
2 2 *
3 3 * Copyright (C) 2007 Google, Inc.
  4 + * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
4 5 * Author: Brian Swetland <swetland@google.com>
5 6 *
6 7 * This software is licensed under the terms of the GNU General Public
7 8  
8 9  
9 10  
10 11  
11 12  
12 13  
13 14  
14 15  
15 16  
... ... @@ -14,41 +15,53 @@
14 15 *
15 16 */
16 17  
17   -
18   -
19 18 #include <mach/hardware.h>
20 19 #include <mach/msm_iomap.h>
21 20  
22   -#if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE)
23 21 .macro addruart, rp, rv, tmp
  22 +#ifdef MSM_DEBUG_UART_PHYS
24 23 ldr \rp, =MSM_DEBUG_UART_PHYS
25 24 ldr \rv, =MSM_DEBUG_UART_BASE
  25 +#endif
26 26 .endm
27 27  
28   - .macro senduart,rd,rx
  28 + .macro senduart, rd, rx
  29 +#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
  30 + @ Write the 1 character to UARTDM_TF
  31 + str \rd, [\rx, #0x70]
  32 +#else
29 33 teq \rx, #0
30 34 strne \rd, [\rx, #0x0C]
  35 +#endif
31 36 .endm
32 37  
33   - .macro waituart,rd,rx
  38 + .macro waituart, rd, rx
  39 +#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
  40 + @ check for TX_EMT in UARTDM_SR
  41 + ldr \rd, [\rx, #0x08]
  42 + tst \rd, #0x08
  43 + bne 1002f
  44 + @ wait for TXREADY in UARTDM_ISR
  45 +1001: ldr \rd, [\rx, #0x14]
  46 + tst \rd, #0x80
  47 + beq 1001b
  48 +1002:
  49 + @ Clear TX_READY by writing to the UARTDM_CR register
  50 + mov \rd, #0x300
  51 + str \rd, [\rx, #0x10]
  52 + @ Write 0x1 to NCF register
  53 + mov \rd, #0x1
  54 + str \rd, [\rx, #0x40]
  55 + @ UARTDM reg. Read to induce delay
  56 + ldr \rd, [\rx, #0x08]
  57 +#else
34 58 @ wait for TX_READY
35 59 1001: ldr \rd, [\rx, #0x08]
36 60 tst \rd, #0x04
37 61 beq 1001b
  62 +#endif
38 63 .endm
39   -#else
40   - .macro addruart, rp, rv, tmp
41   - mov \rv, #0xff000000
42   - orr \rv, \rv, #0x00f00000
43   - .endm
44 64  
45   - .macro senduart,rd,rx
46   - .endm
47   -
48   - .macro waituart,rd,rx
49   - .endm
50   -#endif
51   -
52   - .macro busyuart,rd,rx
  65 + .macro busyuart, rd, rx
53 66 .endm
arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
... ... @@ -78,18 +78,6 @@
78 78 #define MSM_UART3_PHYS 0xA9C00000
79 79 #define MSM_UART3_SIZE SZ_4K
80 80  
81   -#ifdef CONFIG_MSM_DEBUG_UART
82   -#define MSM_DEBUG_UART_BASE 0xE1000000
83   -#if CONFIG_MSM_DEBUG_UART == 1
84   -#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
85   -#elif CONFIG_MSM_DEBUG_UART == 2
86   -#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
87   -#elif CONFIG_MSM_DEBUG_UART == 3
88   -#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
89   -#endif
90   -#define MSM_DEBUG_UART_SIZE SZ_4K
91   -#endif
92   -
93 81 #define MSM_SDC1_PHYS 0xA0400000
94 82 #define MSM_SDC1_SIZE SZ_4K
95 83  
arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
... ... @@ -89,18 +89,6 @@
89 89 #define MSM_UART3_PHYS 0xACC00000
90 90 #define MSM_UART3_SIZE SZ_4K
91 91  
92   -#ifdef CONFIG_MSM_DEBUG_UART
93   -#define MSM_DEBUG_UART_BASE 0xE1000000
94   -#if CONFIG_MSM_DEBUG_UART == 1
95   -#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
96   -#elif CONFIG_MSM_DEBUG_UART == 2
97   -#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
98   -#elif CONFIG_MSM_DEBUG_UART == 3
99   -#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
100   -#endif
101   -#define MSM_DEBUG_UART_SIZE SZ_4K
102   -#endif
103   -
104 92 #define MSM_MDC_BASE IOMEM(0xE0200000)
105 93 #define MSM_MDC_PHYS 0xAA500000
106 94 #define MSM_MDC_SIZE SZ_1M
arch/arm/mach-msm/include/mach/msm_iomap-8960.h
... ... @@ -45,5 +45,10 @@
45 45 #define MSM8960_TMR0_PHYS 0x0208A000
46 46 #define MSM8960_TMR0_SIZE SZ_4K
47 47  
  48 +#ifdef CONFIG_DEBUG_MSM8960_UART
  49 +#define MSM_DEBUG_UART_BASE 0xE1040000
  50 +#define MSM_DEBUG_UART_PHYS 0x16440000
  51 +#endif
  52 +
48 53 #endif
arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
... ... @@ -83,18 +83,6 @@
83 83 #define MSM_UART3_PHYS 0xA9C00000
84 84 #define MSM_UART3_SIZE SZ_4K
85 85  
86   -#ifdef CONFIG_MSM_DEBUG_UART
87   -#define MSM_DEBUG_UART_BASE 0xE1000000
88   -#if CONFIG_MSM_DEBUG_UART == 1
89   -#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
90   -#elif CONFIG_MSM_DEBUG_UART == 2
91   -#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
92   -#elif CONFIG_MSM_DEBUG_UART == 3
93   -#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
94   -#endif
95   -#define MSM_DEBUG_UART_SIZE SZ_4K
96   -#endif
97   -
98 86 #define MSM_MDC_BASE IOMEM(0xE0200000)
99 87 #define MSM_MDC_PHYS 0xAA500000
100 88 #define MSM_MDC_SIZE SZ_1M
arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
... ... @@ -62,5 +62,10 @@
62 62 #define MSM8X60_TMR0_PHYS 0x02040000
63 63 #define MSM8X60_TMR0_SIZE SZ_4K
64 64  
  65 +#ifdef CONFIG_DEBUG_MSM8660_UART
  66 +#define MSM_DEBUG_UART_BASE 0xE1040000
  67 +#define MSM_DEBUG_UART_PHYS 0x19C40000
  68 +#endif
  69 +
65 70 #endif
arch/arm/mach-msm/include/mach/msm_iomap.h
... ... @@ -55,6 +55,18 @@
55 55  
56 56 #include "msm_iomap-8960.h"
57 57  
  58 +#define MSM_DEBUG_UART_SIZE SZ_4K
  59 +#if defined(CONFIG_DEBUG_MSM_UART1)
  60 +#define MSM_DEBUG_UART_BASE 0xE1000000
  61 +#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
  62 +#elif defined(CONFIG_DEBUG_MSM_UART2)
  63 +#define MSM_DEBUG_UART_BASE 0xE1000000
  64 +#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
  65 +#elif defined(CONFIG_DEBUG_MSM_UART3)
  66 +#define MSM_DEBUG_UART_BASE 0xE1000000
  67 +#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
  68 +#endif
  69 +
58 70 /* Virtual addresses shared across all MSM targets. */
59 71 #define MSM_CSR_BASE IOMEM(0xE0001000)
60 72 #define MSM_QGIC_DIST_BASE IOMEM(0xF0000000)
arch/arm/mach-msm/include/mach/uncompress.h
1   -/* arch/arm/mach-msm/include/mach/uncompress.h
2   - *
  1 +/*
3 2 * Copyright (C) 2007 Google, Inc.
  3 + * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
4 4 *
5 5 * This software is licensed under the terms of the GNU General Public
6 6 * License version 2, as published by the Free Software Foundation, and
7 7  
8 8  
9 9  
... ... @@ -14,17 +14,40 @@
14 14 */
15 15  
16 16 #ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
  17 +#define __ASM_ARCH_MSM_UNCOMPRESS_H
17 18  
18   -#include "hardware.h"
19   -#include "linux/io.h"
20   -#include "mach/msm_iomap.h"
  19 +#include <asm/processor.h>
  20 +#include <mach/msm_iomap.h>
21 21  
  22 +#define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))
  23 +#define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c))
  24 +
  25 +#define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)))
  26 +#define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10)))
  27 +#define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14)))
  28 +#define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40)))
  29 +#define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70)))
  30 +
22 31 static void putc(int c)
23 32 {
24 33 #if defined(MSM_DEBUG_UART_PHYS)
25   - unsigned base = MSM_DEBUG_UART_PHYS;
26   - while (!(readl(base + 0x08) & 0x04)) ;
27   - writel(c, base + 0x0c);
  34 +#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
  35 + /*
  36 + * Wait for TX_READY to be set; but skip it if we have a
  37 + * TX underrun.
  38 + */
  39 + if (UART_DM_SR & 0x08)
  40 + while (!(UART_DM_ISR & 0x80))
  41 + cpu_relax();
  42 +
  43 + UART_DM_CR = 0x300;
  44 + UART_DM_NCHAR = 0x1;
  45 + UART_DM_TF = c;
  46 +#else
  47 + while (!(UART_CSR & 0x04))
  48 + cpu_relax();
  49 + UART_TF = c;
  50 +#endif
28 51 #endif
29 52 }
30 53  
arch/arm/mach-msm/io.c
... ... @@ -47,7 +47,8 @@
47 47 MSM_CHIP_DEVICE(GPIO1, MSM7X00),
48 48 MSM_CHIP_DEVICE(GPIO2, MSM7X00),
49 49 MSM_DEVICE(CLK_CTL),
50   -#ifdef CONFIG_MSM_DEBUG_UART
  50 +#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
  51 + defined(CONFIG_DEBUG_MSM_UART3)
51 52 MSM_DEVICE(DEBUG_UART),
52 53 #endif
53 54 #ifdef CONFIG_ARCH_MSM7X30
... ... @@ -84,7 +85,8 @@
84 85 MSM_DEVICE(SCPLL),
85 86 MSM_DEVICE(AD5),
86 87 MSM_DEVICE(MDC),
87   -#ifdef CONFIG_MSM_DEBUG_UART
  88 +#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
  89 + defined(CONFIG_DEBUG_MSM_UART3)
88 90 MSM_DEVICE(DEBUG_UART),
89 91 #endif
90 92 {
... ... @@ -109,6 +111,9 @@
109 111 MSM_CHIP_DEVICE(TMR0, MSM8X60),
110 112 MSM_DEVICE(ACC),
111 113 MSM_DEVICE(GCC),
  114 +#ifdef CONFIG_DEBUG_MSM8660_UART
  115 + MSM_DEVICE(DEBUG_UART),
  116 +#endif
112 117 };
113 118  
114 119 void __init msm_map_msm8x60_io(void)
... ... @@ -123,6 +128,9 @@
123 128 MSM_CHIP_DEVICE(QGIC_CPU, MSM8960),
124 129 MSM_CHIP_DEVICE(TMR, MSM8960),
125 130 MSM_CHIP_DEVICE(TMR0, MSM8960),
  131 +#ifdef CONFIG_DEBUG_MSM8960_UART
  132 + MSM_DEVICE(DEBUG_UART),
  133 +#endif
126 134 };
127 135  
128 136 void __init msm_map_msm8960_io(void)
... ... @@ -146,7 +154,8 @@
146 154 MSM_DEVICE(SAW),
147 155 MSM_DEVICE(GCC),
148 156 MSM_DEVICE(TCSR),
149   -#ifdef CONFIG_MSM_DEBUG_UART
  157 +#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
  158 + defined(CONFIG_DEBUG_MSM_UART3)
150 159 MSM_DEVICE(DEBUG_UART),
151 160 #endif
152 161 {
arch/arm/mach-msm/platsmp.c
... ... @@ -79,7 +79,7 @@
79 79 ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
80 80 SCM_FLAG_COLDBOOT_CPU1);
81 81 if (ret == 0) {
82   - void *sc1_base_ptr;
  82 + void __iomem *sc1_base_ptr;
83 83 sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2);
84 84 if (sc1_base_ptr) {
85 85 writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL);