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Commit 8faf2e6c201d95b780cd3b4674b7a55ede6dcbbb

Authored by Ben Hutchings
Committed by Ralf Baechle
1 parent 0d5977d652
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

MIPS: Set io_map_base for several PCI bridges lacking it 

Several MIPS platforms don't set pci_controller::io_map_base for their
PCI bridges.  This results in a panic in pci_iomap().  (The panic is
conditional on CONFIG_PCI_DOMAINS, but that is now enabled for all PCI
MIPS systems.)

Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: linux-mips@linux-mips.org
Cc: Martin Michlmayr <tbm@cyrius.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: 584784@bugs.debian.org
Patchwork: https://patchwork.linux-mips.org/patch/1377/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Showing 5 changed files with 6 additions and 1 deletions Side-by-side Diff

arch/mips/mti-malta/malta-pci.c
Diff comments   View file @ 8faf2e6
... ... @@ -247,6 +247,8 @@
247 247 iomem_resource.end &= 0xfffffffffULL; /* 64 GB */
248 248 ioport_resource.end = controller->io_resource->end;
249 249  
  250 + controller->io_map_base = mips_io_port_base;
  251 +
250 252 register_pci_controller(controller);
251 253 }
252 254  
arch/mips/nxp/pnx8550/common/pci.c
Diff comments   View file @ 8faf2e6
... ... @@ -44,6 +44,7 @@
44 44  
45 45 static struct pci_controller pnx8550_controller = {
46 46 .pci_ops = &pnx8550_pci_ops,
  47 + .io_map_base = PNX8550_PORT_BASE,
47 48 .io_resource = &pci_io_resource,
48 49 .mem_resource = &pci_mem_resource,
49 50 };
arch/mips/nxp/pnx8550/common/setup.c
Diff comments   View file @ 8faf2e6
... ... @@ -113,7 +113,7 @@
113 113 PNX8550_GLB2_ENAB_INTA_O = 0;
114 114  
115 115 /* IO/MEM resources. */
116   - set_io_port_base(KSEG1);
  116 + set_io_port_base(PNX8550_PORT_BASE);
117 117 ioport_resource.start = 0;
118 118 ioport_resource.end = ~0;
119 119 iomem_resource.start = 0;
arch/mips/pci/ops-pmcmsp.c
Diff comments   View file @ 8faf2e6
... ... @@ -944,6 +944,7 @@
944 944 .pci_ops = &msp_pci_ops,
945 945 .mem_resource = &pci_mem_resource,
946 946 .mem_offset = 0,
  947 + .io_map_base = MSP_PCI_IOSPACE_BASE,
947 948 .io_resource = &pci_io_resource,
948 949 .io_offset = 0
949 950 };
arch/mips/pci/pci-yosemite.c
Diff comments   View file @ 8faf2e6
... ... @@ -54,6 +54,7 @@
54 54 panic(ioremap_failed);
55 55  
56 56 set_io_port_base(io_v_base);
  57 + py_controller.io_map_base = io_v_base;
57 58 TITAN_WRITE(RM9000x2_OCD_LKM7, TITAN_READ(RM9000x2_OCD_LKM7) | 1);
58 59  
59 60 ioport_resource.end = TITAN_IO_SIZE - 1;