Commit 90542546f057c3cd71601240f25e7f1e5d0eae7f
Committed by
Eduardo Valentin
1 parent
a0395eee7c
Exists in
smarc-imx_3.14.28_1.0.0_ga
and in
1 other branch
thermal: exynos: Add thermal configuration data for exynos5440 TMU sensor
This patch adds configuration data for exynos5440 soc. Also register definations for the controller are added. Acked-by: Jonghwa Lee <jonghwa3.lee@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com> Acked-by: Eduardo Valentin <eduardo.valentin@ti.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Showing 3 changed files with 82 additions and 0 deletions Side-by-side Diff
drivers/thermal/samsung/exynos_tmu.c
... | ... | @@ -456,6 +456,10 @@ |
456 | 456 | .compatible = "samsung,exynos5250-tmu", |
457 | 457 | .data = (void *)EXYNOS5250_TMU_DRV_DATA, |
458 | 458 | }, |
459 | + { | |
460 | + .compatible = "samsung,exynos5440-tmu", | |
461 | + .data = (void *)EXYNOS5440_TMU_DRV_DATA, | |
462 | + }, | |
459 | 463 | {}, |
460 | 464 | }; |
461 | 465 | MODULE_DEVICE_TABLE(of, exynos_tmu_match); |
drivers/thermal/samsung/exynos_tmu_data.c
... | ... | @@ -175,4 +175,75 @@ |
175 | 175 | .tmu_count = 1, |
176 | 176 | }; |
177 | 177 | #endif |
178 | + | |
179 | +#if defined(CONFIG_SOC_EXYNOS5440) | |
180 | +static const struct exynos_tmu_registers exynos5440_tmu_registers = { | |
181 | + .triminfo_data = EXYNOS5440_TMU_S0_7_TRIM, | |
182 | + .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT, | |
183 | + .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT, | |
184 | + .tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL, | |
185 | + .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT, | |
186 | + .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK, | |
187 | + .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT, | |
188 | + .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK, | |
189 | + .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, | |
190 | + .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT, | |
191 | + .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK, | |
192 | + .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT, | |
193 | + .tmu_status = EXYNOS5440_TMU_S0_7_STATUS, | |
194 | + .tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP, | |
195 | + .threshold_th0 = EXYNOS5440_TMU_S0_7_TH0, | |
196 | + .threshold_th1 = EXYNOS5440_TMU_S0_7_TH1, | |
197 | + .threshold_th2 = EXYNOS5440_TMU_S0_7_TH2, | |
198 | + .threshold_th3_l0_shift = EXYNOS5440_TMU_TH_RISE4_SHIFT, | |
199 | + .tmu_inten = EXYNOS5440_TMU_S0_7_IRQEN, | |
200 | + .inten_rise_mask = EXYNOS5440_TMU_RISE_INT_MASK, | |
201 | + .inten_rise_shift = EXYNOS5440_TMU_RISE_INT_SHIFT, | |
202 | + .inten_fall_mask = EXYNOS5440_TMU_FALL_INT_MASK, | |
203 | + .inten_fall_shift = EXYNOS5440_TMU_FALL_INT_SHIFT, | |
204 | + .inten_rise0_shift = EXYNOS5440_TMU_INTEN_RISE0_SHIFT, | |
205 | + .inten_rise1_shift = EXYNOS5440_TMU_INTEN_RISE1_SHIFT, | |
206 | + .inten_rise2_shift = EXYNOS5440_TMU_INTEN_RISE2_SHIFT, | |
207 | + .inten_rise3_shift = EXYNOS5440_TMU_INTEN_RISE3_SHIFT, | |
208 | + .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT, | |
209 | + .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ, | |
210 | + .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ, | |
211 | + .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS, | |
212 | + .emul_con = EXYNOS5440_TMU_S0_7_DEBUG, | |
213 | + .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT, | |
214 | + .tmu_pmin = EXYNOS5440_TMU_PMIN, | |
215 | +}; | |
216 | + | |
217 | +#define EXYNOS5440_TMU_DATA \ | |
218 | + .trigger_levels[0] = 100, \ | |
219 | + .trigger_levels[4] = 105, \ | |
220 | + .trigger_enable[0] = 1, \ | |
221 | + .trigger_type[0] = SW_TRIP, \ | |
222 | + .trigger_type[4] = HW_TRIP, \ | |
223 | + .max_trigger_level = 5, \ | |
224 | + .gain = 5, \ | |
225 | + .reference_voltage = 16, \ | |
226 | + .noise_cancel_mode = 4, \ | |
227 | + .cal_type = TYPE_ONE_POINT_TRIMMING, \ | |
228 | + .cal_mode = 0, \ | |
229 | + .efuse_value = 0x5b2d, \ | |
230 | + .min_efuse_value = 16, \ | |
231 | + .max_efuse_value = 76, \ | |
232 | + .first_point_trim = 25, \ | |
233 | + .second_point_trim = 70, \ | |
234 | + .default_temp_offset = 25, \ | |
235 | + .type = SOC_ARCH_EXYNOS5440, \ | |
236 | + .registers = &exynos5440_tmu_registers, \ | |
237 | + .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \ | |
238 | + TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_SHARED_MEMORY), | |
239 | + | |
240 | +struct exynos_tmu_init_data const exynos5440_default_tmu_data = { | |
241 | + .tmu_data = { | |
242 | + { EXYNOS5440_TMU_DATA } , | |
243 | + { EXYNOS5440_TMU_DATA } , | |
244 | + { EXYNOS5440_TMU_DATA } , | |
245 | + }, | |
246 | + .tmu_count = 3, | |
247 | +}; | |
248 | +#endif |
drivers/thermal/samsung/exynos_tmu_data.h
... | ... | @@ -143,5 +143,12 @@ |
143 | 143 | #define EXYNOS5250_TMU_DRV_DATA (NULL) |
144 | 144 | #endif |
145 | 145 | |
146 | +#if defined(CONFIG_SOC_EXYNOS5440) | |
147 | +extern struct exynos_tmu_init_data const exynos5440_default_tmu_data; | |
148 | +#define EXYNOS5440_TMU_DRV_DATA (&exynos5440_default_tmu_data) | |
149 | +#else | |
150 | +#define EXYNOS5440_TMU_DRV_DATA (NULL) | |
151 | +#endif | |
152 | + | |
146 | 153 | #endif /*_EXYNOS_TMU_DATA_H*/ |