Commit 905e75c46dba5f3061049277e4eb7110beedba43

Authored by Jia Hongtao
Committed by Kumar Gala
1 parent 9e67886bec

powerpc/fsl-pci: Unify pci/pcie initialization code

We unified the Freescale pci/pcie initialization by changing the fsl_pci
to a platform driver. In previous PCI code architecture the initialization
routine is called at board_setup_arch stage. Now the initialization is done
in probe function which is architectural better. Also It's convenient for
adding PM support for PCI controller in later patch.

Now we registered pci controllers as platform devices. So we combine two
initialization code as one platform driver.

Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Showing 33 changed files with 249 additions and 537 deletions Side-by-side Diff

arch/powerpc/platforms/85xx/common.c
... ... @@ -27,6 +27,16 @@
27 27 { .compatible = "fsl,mpc8548-guts", },
28 28 /* Probably unnecessary? */
29 29 { .compatible = "gpio-leds", },
  30 + /* For all PCI controllers */
  31 + { .compatible = "fsl,mpc8540-pci", },
  32 + { .compatible = "fsl,mpc8548-pcie", },
  33 + { .compatible = "fsl,p1022-pcie", },
  34 + { .compatible = "fsl,p1010-pcie", },
  35 + { .compatible = "fsl,p1023-pcie", },
  36 + { .compatible = "fsl,p4080-pcie", },
  37 + { .compatible = "fsl,qoriq-pcie-v2.4", },
  38 + { .compatible = "fsl,qoriq-pcie-v2.3", },
  39 + { .compatible = "fsl,qoriq-pcie-v2.2", },
30 40 {},
31 41 };
32 42  
arch/powerpc/platforms/85xx/corenet_ds.c
... ... @@ -16,7 +16,6 @@
16 16 #include <linux/kdev_t.h>
17 17 #include <linux/delay.h>
18 18 #include <linux/interrupt.h>
19   -#include <linux/memblock.h>
20 19  
21 20 #include <asm/time.h>
22 21 #include <asm/machdep.h>
23 22  
24 23  
25 24  
... ... @@ -52,39 +51,16 @@
52 51 */
53 52 void __init corenet_ds_setup_arch(void)
54 53 {
55   -#ifdef CONFIG_PCI
56   - struct device_node *np;
57   - struct pci_controller *hose;
58   -#endif
59   - dma_addr_t max = 0xffffffff;
60   -
61 54 mpc85xx_smp_init();
62 55  
63   -#ifdef CONFIG_PCI
64   - for_each_node_by_type(np, "pci") {
65   - if (of_device_is_compatible(np, "fsl,p4080-pcie") ||
66   - of_device_is_compatible(np, "fsl,qoriq-pcie-v2.2") ||
67   - of_device_is_compatible(np, "fsl,qoriq-pcie-v2.3") ||
68   - of_device_is_compatible(np, "fsl,qoriq-pcie-v2.4")) {
69   - fsl_add_bridge(np, 0);
70   - hose = pci_find_hose_for_OF_device(np);
71   - max = min(max, hose->dma_window_base_cur +
72   - hose->dma_window_size);
73   - }
74   - }
75   -
76   -#ifdef CONFIG_PPC64
  56 +#if defined(CONFIG_PCI) && defined(CONFIG_PPC64)
77 57 pci_devs_phb_init();
78 58 #endif
79   -#endif
80 59  
81   -#ifdef CONFIG_SWIOTLB
82   - if ((memblock_end_of_DRAM() - 1) > max) {
83   - ppc_swiotlb_enable = 1;
84   - set_pci_dma_ops(&swiotlb_dma_ops);
85   - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
86   - }
87   -#endif
  60 + fsl_pci_assign_primary();
  61 +
  62 + swiotlb_detect_4g();
  63 +
88 64 pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
89 65 }
90 66  
arch/powerpc/platforms/85xx/ge_imp3a.c
... ... @@ -22,7 +22,6 @@
22 22 #include <linux/seq_file.h>
23 23 #include <linux/interrupt.h>
24 24 #include <linux/of_platform.h>
25   -#include <linux/memblock.h>
26 25  
27 26 #include <asm/time.h>
28 27 #include <asm/machdep.h>
29 28  
30 29  
31 30  
32 31  
33 32  
34 33  
35 34  
36 35  
37 36  
... ... @@ -84,54 +83,40 @@
84 83 of_node_put(cascade_node);
85 84 }
86 85  
87   -#ifdef CONFIG_PCI
88   -static int primary_phb_addr;
89   -#endif /* CONFIG_PCI */
90   -
91   -/*
92   - * Setup the architecture
93   - */
94   -static void __init ge_imp3a_setup_arch(void)
  86 +static void ge_imp3a_pci_assign_primary(void)
95 87 {
96   - struct device_node *regs;
97 88 #ifdef CONFIG_PCI
98 89 struct device_node *np;
99   - struct pci_controller *hose;
100   -#endif
101   - dma_addr_t max = 0xffffffff;
  90 + struct resource rsrc;
102 91  
103   - if (ppc_md.progress)
104   - ppc_md.progress("ge_imp3a_setup_arch()", 0);
105   -
106   -#ifdef CONFIG_PCI
107 92 for_each_node_by_type(np, "pci") {
108 93 if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
109 94 of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
110 95 of_device_is_compatible(np, "fsl,p2020-pcie")) {
111   - struct resource rsrc;
112 96 of_address_to_resource(np, 0, &rsrc);
113   - if ((rsrc.start & 0xfffff) == primary_phb_addr)
114   - fsl_add_bridge(np, 1);
115   - else
116   - fsl_add_bridge(np, 0);
117   -
118   - hose = pci_find_hose_for_OF_device(np);
119   - max = min(max, hose->dma_window_base_cur +
120   - hose->dma_window_size);
  97 + if ((rsrc.start & 0xfffff) == 0x9000)
  98 + fsl_pci_primary = np;
121 99 }
122 100 }
123 101 #endif
  102 +}
124 103  
  104 +/*
  105 + * Setup the architecture
  106 + */
  107 +static void __init ge_imp3a_setup_arch(void)
  108 +{
  109 + struct device_node *regs;
  110 +
  111 + if (ppc_md.progress)
  112 + ppc_md.progress("ge_imp3a_setup_arch()", 0);
  113 +
125 114 mpc85xx_smp_init();
126 115  
127   -#ifdef CONFIG_SWIOTLB
128   - if ((memblock_end_of_DRAM() - 1) > max) {
129   - ppc_swiotlb_enable = 1;
130   - set_pci_dma_ops(&swiotlb_dma_ops);
131   - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
132   - }
133   -#endif
  116 + ge_imp3a_pci_assign_primary();
134 117  
  118 + swiotlb_detect_4g();
  119 +
135 120 /* Remap basic board registers */
136 121 regs = of_find_compatible_node(NULL, NULL, "ge,imp3a-fpga-regs");
137 122 if (regs) {
138 123  
... ... @@ -215,17 +200,10 @@
215 200 {
216 201 unsigned long root = of_get_flat_dt_root();
217 202  
218   - if (of_flat_dt_is_compatible(root, "ge,IMP3A")) {
219   -#ifdef CONFIG_PCI
220   - primary_phb_addr = 0x9000;
221   -#endif
222   - return 1;
223   - }
224   -
225   - return 0;
  203 + return of_flat_dt_is_compatible(root, "ge,IMP3A");
226 204 }
227 205  
228   -machine_device_initcall(ge_imp3a, mpc85xx_common_publish_devices);
  206 +machine_arch_initcall(ge_imp3a, mpc85xx_common_publish_devices);
229 207  
230 208 machine_arch_initcall(ge_imp3a, swiotlb_setup_bus_notifier);
231 209  
arch/powerpc/platforms/85xx/mpc8536_ds.c
... ... @@ -17,7 +17,6 @@
17 17 #include <linux/seq_file.h>
18 18 #include <linux/interrupt.h>
19 19 #include <linux/of_platform.h>
20   -#include <linux/memblock.h>
21 20  
22 21 #include <asm/time.h>
23 22 #include <asm/machdep.h>
24 23  
25 24  
26 25  
27 26  
... ... @@ -46,46 +45,17 @@
46 45 */
47 46 static void __init mpc8536_ds_setup_arch(void)
48 47 {
49   -#ifdef CONFIG_PCI
50   - struct device_node *np;
51   - struct pci_controller *hose;
52   -#endif
53   - dma_addr_t max = 0xffffffff;
54   -
55 48 if (ppc_md.progress)
56 49 ppc_md.progress("mpc8536_ds_setup_arch()", 0);
57 50  
58   -#ifdef CONFIG_PCI
59   - for_each_node_by_type(np, "pci") {
60   - if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
61   - of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
62   - struct resource rsrc;
63   - of_address_to_resource(np, 0, &rsrc);
64   - if ((rsrc.start & 0xfffff) == 0x8000)
65   - fsl_add_bridge(np, 1);
66   - else
67   - fsl_add_bridge(np, 0);
  51 + fsl_pci_assign_primary();
68 52  
69   - hose = pci_find_hose_for_OF_device(np);
70   - max = min(max, hose->dma_window_base_cur +
71   - hose->dma_window_size);
72   - }
73   - }
  53 + swiotlb_detect_4g();
74 54  
75   -#endif
76   -
77   -#ifdef CONFIG_SWIOTLB
78   - if ((memblock_end_of_DRAM() - 1) > max) {
79   - ppc_swiotlb_enable = 1;
80   - set_pci_dma_ops(&swiotlb_dma_ops);
81   - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
82   - }
83   -#endif
84   -
85 55 printk("MPC8536 DS board from Freescale Semiconductor\n");
86 56 }
87 57  
88   -machine_device_initcall(mpc8536_ds, mpc85xx_common_publish_devices);
  58 +machine_arch_initcall(mpc8536_ds, mpc85xx_common_publish_devices);
89 59  
90 60 machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier);
91 61  
arch/powerpc/platforms/85xx/mpc85xx_ads.c
... ... @@ -137,10 +137,6 @@
137 137  
138 138 static void __init mpc85xx_ads_setup_arch(void)
139 139 {
140   -#ifdef CONFIG_PCI
141   - struct device_node *np;
142   -#endif
143   -
144 140 if (ppc_md.progress)
145 141 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
146 142  
147 143  
... ... @@ -150,11 +146,10 @@
150 146 #endif
151 147  
152 148 #ifdef CONFIG_PCI
153   - for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
154   - fsl_add_bridge(np, 1);
155   -
156 149 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
157 150 #endif
  151 +
  152 + fsl_pci_assign_primary();
158 153 }
159 154  
160 155 static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
... ... @@ -173,7 +168,7 @@
173 168 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
174 169 }
175 170  
176   -machine_device_initcall(mpc85xx_ads, mpc85xx_common_publish_devices);
  171 +machine_arch_initcall(mpc85xx_ads, mpc85xx_common_publish_devices);
177 172  
178 173 /*
179 174 * Called very early, device-tree isn't unflattened
arch/powerpc/platforms/85xx/mpc85xx_cds.c
... ... @@ -276,6 +276,33 @@
276 276  
277 277 #endif /* CONFIG_PPC_I8259 */
278 278  
  279 +static void mpc85xx_cds_pci_assign_primary(void)
  280 +{
  281 +#ifdef CONFIG_PCI
  282 + struct device_node *np;
  283 +
  284 + if (fsl_pci_primary)
  285 + return;
  286 +
  287 + /*
  288 + * MPC85xx_CDS has ISA bridge but unfortunately there is no
  289 + * isa node in device tree. We now looking for i8259 node as
  290 + * a workaround for such a broken device tree. This routine
  291 + * is for complying to all device trees.
  292 + */
  293 + np = of_find_node_by_name(NULL, "i8259");
  294 + while ((fsl_pci_primary = of_get_parent(np))) {
  295 + of_node_put(np);
  296 + np = fsl_pci_primary;
  297 +
  298 + if ((of_device_is_compatible(np, "fsl,mpc8540-pci") ||
  299 + of_device_is_compatible(np, "fsl,mpc8548-pcie")) &&
  300 + of_device_is_available(np))
  301 + return;
  302 + }
  303 +#endif
  304 +}
  305 +
279 306 /*
280 307 * Setup the architecture
281 308 */
282 309  
... ... @@ -309,21 +336,12 @@
309 336 }
310 337  
311 338 #ifdef CONFIG_PCI
312   - for_each_node_by_type(np, "pci") {
313   - if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
314   - of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
315   - struct resource rsrc;
316   - of_address_to_resource(np, 0, &rsrc);
317   - if ((rsrc.start & 0xfffff) == 0x8000)
318   - fsl_add_bridge(np, 1);
319   - else
320   - fsl_add_bridge(np, 0);
321   - }
322   - }
323   -
324 339 ppc_md.pci_irq_fixup = mpc85xx_cds_pci_irq_fixup;
325 340 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
326 341 #endif
  342 +
  343 + mpc85xx_cds_pci_assign_primary();
  344 + fsl_pci_assign_primary();
327 345 }
328 346  
329 347 static void mpc85xx_cds_show_cpuinfo(struct seq_file *m)
... ... @@ -355,7 +373,7 @@
355 373 return of_flat_dt_is_compatible(root, "MPC85xxCDS");
356 374 }
357 375  
358   -machine_device_initcall(mpc85xx_cds, mpc85xx_common_publish_devices);
  376 +machine_arch_initcall(mpc85xx_cds, mpc85xx_common_publish_devices);
359 377  
360 378 define_machine(mpc85xx_cds) {
361 379 .name = "MPC85xx CDS",
arch/powerpc/platforms/85xx/mpc85xx_ds.c
... ... @@ -20,7 +20,6 @@
20 20 #include <linux/seq_file.h>
21 21 #include <linux/interrupt.h>
22 22 #include <linux/of_platform.h>
23   -#include <linux/memblock.h>
24 23  
25 24 #include <asm/time.h>
26 25 #include <asm/machdep.h>
27 26  
... ... @@ -129,13 +128,11 @@
129 128 }
130 129 #endif /* CONFIG_PCI */
131 130  
132   -static void __init mpc85xx_ds_pci_init(void)
  131 +static void __init mpc85xx_ds_uli_init(void)
133 132 {
134 133 #ifdef CONFIG_PCI
135 134 struct device_node *node;
136 135  
137   - fsl_pci_init();
138   -
139 136 /* See if we have a ULI under the primary */
140 137  
141 138 node = of_find_node_by_name(NULL, "uli1575");
... ... @@ -160,7 +157,8 @@
160 157 ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
161 158  
162 159 swiotlb_detect_4g();
163   - mpc85xx_ds_pci_init();
  160 + fsl_pci_assign_primary();
  161 + mpc85xx_ds_uli_init();
164 162 mpc85xx_smp_init();
165 163  
166 164 printk("MPC85xx DS board from Freescale Semiconductor\n");
... ... @@ -176,9 +174,9 @@
176 174 return !!of_flat_dt_is_compatible(root, "MPC8544DS");
177 175 }
178 176  
179   -machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
180   -machine_device_initcall(mpc8572_ds, mpc85xx_common_publish_devices);
181   -machine_device_initcall(p2020_ds, mpc85xx_common_publish_devices);
  177 +machine_arch_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
  178 +machine_arch_initcall(mpc8572_ds, mpc85xx_common_publish_devices);
  179 +machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices);
182 180  
183 181 machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier);
184 182 machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier);
arch/powerpc/platforms/85xx/mpc85xx_mds.c
... ... @@ -327,44 +327,16 @@
327 327  
328 328 static void __init mpc85xx_mds_setup_arch(void)
329 329 {
330   -#ifdef CONFIG_PCI
331   - struct pci_controller *hose;
332   - struct device_node *np;
333   -#endif
334   - dma_addr_t max = 0xffffffff;
335   -
336 330 if (ppc_md.progress)
337 331 ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
338 332  
339   -#ifdef CONFIG_PCI
340   - for_each_node_by_type(np, "pci") {
341   - if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
342   - of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
343   - struct resource rsrc;
344   - of_address_to_resource(np, 0, &rsrc);
345   - if ((rsrc.start & 0xfffff) == 0x8000)
346   - fsl_add_bridge(np, 1);
347   - else
348   - fsl_add_bridge(np, 0);
349   -
350   - hose = pci_find_hose_for_OF_device(np);
351   - max = min(max, hose->dma_window_base_cur +
352   - hose->dma_window_size);
353   - }
354   - }
355   -#endif
356   -
357 333 mpc85xx_smp_init();
358 334  
359 335 mpc85xx_mds_qe_init();
360 336  
361   -#ifdef CONFIG_SWIOTLB
362   - if ((memblock_end_of_DRAM() - 1) > max) {
363   - ppc_swiotlb_enable = 1;
364   - set_pci_dma_ops(&swiotlb_dma_ops);
365   - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
366   - }
367   -#endif
  337 + fsl_pci_assign_primary();
  338 +
  339 + swiotlb_detect_4g();
368 340 }
369 341  
370 342  
... ... @@ -409,9 +381,9 @@
409 381 return mpc85xx_common_publish_devices();
410 382 }
411 383  
412   -machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
413   -machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices);
414   -machine_device_initcall(p1021_mds, mpc85xx_common_publish_devices);
  384 +machine_arch_initcall(mpc8568_mds, mpc85xx_publish_devices);
  385 +machine_arch_initcall(mpc8569_mds, mpc85xx_publish_devices);
  386 +machine_arch_initcall(p1021_mds, mpc85xx_common_publish_devices);
415 387  
416 388 machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier);
417 389 machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier);
arch/powerpc/platforms/85xx/mpc85xx_rdb.c
... ... @@ -86,23 +86,17 @@
86 86 */
87 87 static void __init mpc85xx_rdb_setup_arch(void)
88 88 {
89   -#if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
  89 +#ifdef CONFIG_QUICC_ENGINE
90 90 struct device_node *np;
91 91 #endif
92 92  
93 93 if (ppc_md.progress)
94 94 ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
95 95  
96   -#ifdef CONFIG_PCI
97   - for_each_node_by_type(np, "pci") {
98   - if (of_device_is_compatible(np, "fsl,mpc8548-pcie"))
99   - fsl_add_bridge(np, 0);
100   - }
101   -
102   -#endif
103   -
104 96 mpc85xx_smp_init();
105 97  
  98 + fsl_pci_assign_primary();
  99 +
106 100 #ifdef CONFIG_QUICC_ENGINE
107 101 np = of_find_compatible_node(NULL, NULL, "fsl,qe");
108 102 if (!np) {
... ... @@ -161,15 +155,15 @@
161 155 printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
162 156 }
163 157  
164   -machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
165   -machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
166   -machine_device_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
167   -machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
168   -machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
169   -machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
170   -machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
171   -machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices);
172   -machine_device_initcall(p1024_rdb, mpc85xx_common_publish_devices);
  158 +machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices);
  159 +machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
  160 +machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
  161 +machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
  162 +machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
  163 +machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
  164 +machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
  165 +machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
  166 +machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
173 167  
174 168 /*
175 169 * Called very early, device-tree isn't unflattened
arch/powerpc/platforms/85xx/p1010rdb.c
... ... @@ -46,25 +46,15 @@
46 46 */
47 47 static void __init p1010_rdb_setup_arch(void)
48 48 {
49   -#ifdef CONFIG_PCI
50   - struct device_node *np;
51   -#endif
52   -
53 49 if (ppc_md.progress)
54 50 ppc_md.progress("p1010_rdb_setup_arch()", 0);
55 51  
56   -#ifdef CONFIG_PCI
57   - for_each_node_by_type(np, "pci") {
58   - if (of_device_is_compatible(np, "fsl,p1010-pcie"))
59   - fsl_add_bridge(np, 0);
60   - }
  52 + fsl_pci_assign_primary();
61 53  
62   -#endif
63   -
64 54 printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n");
65 55 }
66 56  
67   -machine_device_initcall(p1010_rdb, mpc85xx_common_publish_devices);
  57 +machine_arch_initcall(p1010_rdb, mpc85xx_common_publish_devices);
68 58 machine_arch_initcall(p1010_rdb, swiotlb_setup_bus_notifier);
69 59  
70 60 /*
arch/powerpc/platforms/85xx/p1022_ds.c
... ... @@ -18,7 +18,6 @@
18 18  
19 19 #include <linux/pci.h>
20 20 #include <linux/of_platform.h>
21   -#include <linux/memblock.h>
22 21 #include <asm/div64.h>
23 22 #include <asm/mpic.h>
24 23 #include <asm/swiotlb.h>
25 24  
... ... @@ -507,32 +506,9 @@
507 506 */
508 507 static void __init p1022_ds_setup_arch(void)
509 508 {
510   -#ifdef CONFIG_PCI
511   - struct device_node *np;
512   -#endif
513   - dma_addr_t max = 0xffffffff;
514   -
515 509 if (ppc_md.progress)
516 510 ppc_md.progress("p1022_ds_setup_arch()", 0);
517 511  
518   -#ifdef CONFIG_PCI
519   - for_each_compatible_node(np, "pci", "fsl,p1022-pcie") {
520   - struct resource rsrc;
521   - struct pci_controller *hose;
522   -
523   - of_address_to_resource(np, 0, &rsrc);
524   -
525   - if ((rsrc.start & 0xfffff) == 0x8000)
526   - fsl_add_bridge(np, 1);
527   - else
528   - fsl_add_bridge(np, 0);
529   -
530   - hose = pci_find_hose_for_OF_device(np);
531   - max = min(max, hose->dma_window_base_cur +
532   - hose->dma_window_size);
533   - }
534   -#endif
535   -
536 512 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
537 513 diu_ops.get_pixel_format = p1022ds_get_pixel_format;
538 514 diu_ops.set_gamma_table = p1022ds_set_gamma_table;
539 515  
540 516  
... ... @@ -601,18 +577,14 @@
601 577  
602 578 mpc85xx_smp_init();
603 579  
604   -#ifdef CONFIG_SWIOTLB
605   - if ((memblock_end_of_DRAM() - 1) > max) {
606   - ppc_swiotlb_enable = 1;
607   - set_pci_dma_ops(&swiotlb_dma_ops);
608   - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
609   - }
610   -#endif
  580 + fsl_pci_assign_primary();
611 581  
  582 + swiotlb_detect_4g();
  583 +
612 584 pr_info("Freescale P1022 DS reference board\n");
613 585 }
614 586  
615   -machine_device_initcall(p1022_ds, mpc85xx_common_publish_devices);
  587 +machine_arch_initcall(p1022_ds, mpc85xx_common_publish_devices);
616 588  
617 589 machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier);
618 590  
arch/powerpc/platforms/85xx/p1022_rdk.c
... ... @@ -14,7 +14,6 @@
14 14  
15 15 #include <linux/pci.h>
16 16 #include <linux/of_platform.h>
17   -#include <linux/memblock.h>
18 17 #include <asm/div64.h>
19 18 #include <asm/mpic.h>
20 19 #include <asm/swiotlb.h>
21 20  
... ... @@ -121,32 +120,9 @@
121 120 */
122 121 static void __init p1022_rdk_setup_arch(void)
123 122 {
124   -#ifdef CONFIG_PCI
125   - struct device_node *np;
126   -#endif
127   - dma_addr_t max = 0xffffffff;
128   -
129 123 if (ppc_md.progress)
130 124 ppc_md.progress("p1022_rdk_setup_arch()", 0);
131 125  
132   -#ifdef CONFIG_PCI
133   - for_each_compatible_node(np, "pci", "fsl,p1022-pcie") {
134   - struct resource rsrc;
135   - struct pci_controller *hose;
136   -
137   - of_address_to_resource(np, 0, &rsrc);
138   -
139   - if ((rsrc.start & 0xfffff) == 0x8000)
140   - fsl_add_bridge(np, 1);
141   - else
142   - fsl_add_bridge(np, 0);
143   -
144   - hose = pci_find_hose_for_OF_device(np);
145   - max = min(max, hose->dma_window_base_cur +
146   - hose->dma_window_size);
147   - }
148   -#endif
149   -
150 126 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
151 127 diu_ops.set_monitor_port = p1022rdk_set_monitor_port;
152 128 diu_ops.set_pixel_clock = p1022rdk_set_pixel_clock;
153 129  
154 130  
... ... @@ -155,18 +131,14 @@
155 131  
156 132 mpc85xx_smp_init();
157 133  
158   -#ifdef CONFIG_SWIOTLB
159   - if ((memblock_end_of_DRAM() - 1) > max) {
160   - ppc_swiotlb_enable = 1;
161   - set_pci_dma_ops(&swiotlb_dma_ops);
162   - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
163   - }
164   -#endif
  134 + fsl_pci_assign_primary();
165 135  
  136 + swiotlb_detect_4g();
  137 +
166 138 pr_info("Freescale / iVeia P1022 RDK reference board\n");
167 139 }
168 140  
169   -machine_device_initcall(p1022_rdk, mpc85xx_common_publish_devices);
  141 +machine_arch_initcall(p1022_rdk, mpc85xx_common_publish_devices);
170 142  
171 143 machine_arch_initcall(p1022_rdk, swiotlb_setup_bus_notifier);
172 144  
arch/powerpc/platforms/85xx/p1023_rds.c
... ... @@ -80,15 +80,12 @@
80 80 }
81 81 }
82 82  
83   -#ifdef CONFIG_PCI
84   - for_each_compatible_node(np, "pci", "fsl,p1023-pcie")
85   - fsl_add_bridge(np, 0);
86   -#endif
87   -
88 83 mpc85xx_smp_init();
  84 +
  85 + fsl_pci_assign_primary();
89 86 }
90 87  
91   -machine_device_initcall(p1023_rds, mpc85xx_common_publish_devices);
  88 +machine_arch_initcall(p1023_rds, mpc85xx_common_publish_devices);
92 89  
93 90 static void __init mpc85xx_rds_pic_init(void)
94 91 {
arch/powerpc/platforms/85xx/p2041_rdb.c
... ... @@ -80,7 +80,7 @@
80 80 .power_save = e500_idle,
81 81 };
82 82  
83   -machine_device_initcall(p2041_rdb, corenet_ds_publish_devices);
  83 +machine_arch_initcall(p2041_rdb, corenet_ds_publish_devices);
84 84  
85 85 #ifdef CONFIG_SWIOTLB
86 86 machine_arch_initcall(p2041_rdb, swiotlb_setup_bus_notifier);
arch/powerpc/platforms/85xx/p3041_ds.c
... ... @@ -82,7 +82,7 @@
82 82 .power_save = e500_idle,
83 83 };
84 84  
85   -machine_device_initcall(p3041_ds, corenet_ds_publish_devices);
  85 +machine_arch_initcall(p3041_ds, corenet_ds_publish_devices);
86 86  
87 87 #ifdef CONFIG_SWIOTLB
88 88 machine_arch_initcall(p3041_ds, swiotlb_setup_bus_notifier);
arch/powerpc/platforms/85xx/p4080_ds.c
... ... @@ -81,7 +81,7 @@
81 81 .power_save = e500_idle,
82 82 };
83 83  
84   -machine_device_initcall(p4080_ds, corenet_ds_publish_devices);
  84 +machine_arch_initcall(p4080_ds, corenet_ds_publish_devices);
85 85 #ifdef CONFIG_SWIOTLB
86 86 machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier);
87 87 #endif
arch/powerpc/platforms/85xx/p5020_ds.c
... ... @@ -91,7 +91,7 @@
91 91 #endif
92 92 };
93 93  
94   -machine_device_initcall(p5020_ds, corenet_ds_publish_devices);
  94 +machine_arch_initcall(p5020_ds, corenet_ds_publish_devices);
95 95  
96 96 #ifdef CONFIG_SWIOTLB
97 97 machine_arch_initcall(p5020_ds, swiotlb_setup_bus_notifier);
arch/powerpc/platforms/85xx/p5040_ds.c
... ... @@ -82,7 +82,7 @@
82 82 #endif
83 83 };
84 84  
85   -machine_device_initcall(p5040_ds, corenet_ds_publish_devices);
  85 +machine_arch_initcall(p5040_ds, corenet_ds_publish_devices);
86 86  
87 87 #ifdef CONFIG_SWIOTLB
88 88 machine_arch_initcall(p5040_ds, swiotlb_setup_bus_notifier);
arch/powerpc/platforms/85xx/qemu_e500.c
... ... @@ -41,7 +41,7 @@
41 41 {
42 42 ppc_md.progress("qemu_e500_setup_arch()", 0);
43 43  
44   - fsl_pci_init();
  44 + fsl_pci_assign_primary();
45 45 swiotlb_detect_4g();
46 46 mpc85xx_smp_init();
47 47 }
... ... @@ -56,7 +56,7 @@
56 56 return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500");
57 57 }
58 58  
59   -machine_device_initcall(qemu_e500, mpc85xx_common_publish_devices);
  59 +machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices);
60 60  
61 61 define_machine(qemu_e500) {
62 62 .name = "QEMU e500",
arch/powerpc/platforms/85xx/sbc8548.c
... ... @@ -88,26 +88,11 @@
88 88 */
89 89 static void __init sbc8548_setup_arch(void)
90 90 {
91   -#ifdef CONFIG_PCI
92   - struct device_node *np;
93   -#endif
94   -
95 91 if (ppc_md.progress)
96 92 ppc_md.progress("sbc8548_setup_arch()", 0);
97 93  
98   -#ifdef CONFIG_PCI
99   - for_each_node_by_type(np, "pci") {
100   - if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
101   - of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
102   - struct resource rsrc;
103   - of_address_to_resource(np, 0, &rsrc);
104   - if ((rsrc.start & 0xfffff) == 0x8000)
105   - fsl_add_bridge(np, 1);
106   - else
107   - fsl_add_bridge(np, 0);
108   - }
109   - }
110   -#endif
  94 + fsl_pci_assign_primary();
  95 +
111 96 sbc_rev = sbc8548_hw_rev();
112 97 }
113 98  
... ... @@ -128,7 +113,7 @@
128 113 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
129 114 }
130 115  
131   -machine_device_initcall(sbc8548, mpc85xx_common_publish_devices);
  116 +machine_arch_initcall(sbc8548, mpc85xx_common_publish_devices);
132 117  
133 118 /*
134 119 * Called very early, device-tree isn't unflattened
arch/powerpc/platforms/85xx/socrates.c
... ... @@ -66,20 +66,13 @@
66 66 */
67 67 static void __init socrates_setup_arch(void)
68 68 {
69   -#ifdef CONFIG_PCI
70   - struct device_node *np;
71   -#endif
72   -
73 69 if (ppc_md.progress)
74 70 ppc_md.progress("socrates_setup_arch()", 0);
75 71  
76   -#ifdef CONFIG_PCI
77   - for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
78   - fsl_add_bridge(np, 1);
79   -#endif
  72 + fsl_pci_assign_primary();
80 73 }
81 74  
82   -machine_device_initcall(socrates, mpc85xx_common_publish_devices);
  75 +machine_arch_initcall(socrates, mpc85xx_common_publish_devices);
83 76  
84 77 /*
85 78 * Called very early, device-tree isn't unflattened
arch/powerpc/platforms/85xx/stx_gp3.c
... ... @@ -60,21 +60,14 @@
60 60 */
61 61 static void __init stx_gp3_setup_arch(void)
62 62 {
63   -#ifdef CONFIG_PCI
64   - struct device_node *np;
65   -#endif
66   -
67 63 if (ppc_md.progress)
68 64 ppc_md.progress("stx_gp3_setup_arch()", 0);
69 65  
  66 + fsl_pci_assign_primary();
  67 +
70 68 #ifdef CONFIG_CPM2
71 69 cpm2_reset();
72 70 #endif
73   -
74   -#ifdef CONFIG_PCI
75   - for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
76   - fsl_add_bridge(np, 1);
77   -#endif
78 71 }
79 72  
80 73 static void stx_gp3_show_cpuinfo(struct seq_file *m)
... ... @@ -93,7 +86,7 @@
93 86 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
94 87 }
95 88  
96   -machine_device_initcall(stx_gp3, mpc85xx_common_publish_devices);
  89 +machine_arch_initcall(stx_gp3, mpc85xx_common_publish_devices);
97 90  
98 91 /*
99 92 * Called very early, device-tree isn't unflattened
arch/powerpc/platforms/85xx/tqm85xx.c
... ... @@ -59,10 +59,6 @@
59 59 */
60 60 static void __init tqm85xx_setup_arch(void)
61 61 {
62   -#ifdef CONFIG_PCI
63   - struct device_node *np;
64   -#endif
65   -
66 62 if (ppc_md.progress)
67 63 ppc_md.progress("tqm85xx_setup_arch()", 0);
68 64  
... ... @@ -70,20 +66,7 @@
70 66 cpm2_reset();
71 67 #endif
72 68  
73   -#ifdef CONFIG_PCI
74   - for_each_node_by_type(np, "pci") {
75   - if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
76   - of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
77   - struct resource rsrc;
78   - if (!of_address_to_resource(np, 0, &rsrc)) {
79   - if ((rsrc.start & 0xfffff) == 0x8000)
80   - fsl_add_bridge(np, 1);
81   - else
82   - fsl_add_bridge(np, 0);
83   - }
84   - }
85   - }
86   -#endif
  69 + fsl_pci_assign_primary();
87 70 }
88 71  
89 72 static void tqm85xx_show_cpuinfo(struct seq_file *m)
... ... @@ -123,7 +106,7 @@
123 106 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
124 107 tqm85xx_ti1520_fixup);
125 108  
126   -machine_device_initcall(tqm85xx, mpc85xx_common_publish_devices);
  109 +machine_arch_initcall(tqm85xx, mpc85xx_common_publish_devices);
127 110  
128 111 static const char *board[] __initdata = {
129 112 "tqc,tqm8540",
arch/powerpc/platforms/85xx/xes_mpc85xx.c
... ... @@ -111,18 +111,11 @@
111 111 }
112 112 }
113 113  
114   -#ifdef CONFIG_PCI
115   -static int primary_phb_addr;
116   -#endif
117   -
118 114 /*
119 115 * Setup the architecture
120 116 */
121 117 static void __init xes_mpc85xx_setup_arch(void)
122 118 {
123   -#ifdef CONFIG_PCI
124   - struct device_node *np;
125   -#endif
126 119 struct device_node *root;
127 120 const char *model = "Unknown";
128 121  
129 122  
130 123  
... ... @@ -137,26 +130,14 @@
137 130  
138 131 xes_mpc85xx_fixups();
139 132  
140   -#ifdef CONFIG_PCI
141   - for_each_node_by_type(np, "pci") {
142   - if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
143   - of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
144   - struct resource rsrc;
145   - of_address_to_resource(np, 0, &rsrc);
146   - if ((rsrc.start & 0xfffff) == primary_phb_addr)
147   - fsl_add_bridge(np, 1);
148   - else
149   - fsl_add_bridge(np, 0);
150   - }
151   - }
152   -#endif
153   -
154 133 mpc85xx_smp_init();
  134 +
  135 + fsl_pci_assign_primary();
155 136 }
156 137  
157   -machine_device_initcall(xes_mpc8572, mpc85xx_common_publish_devices);
158   -machine_device_initcall(xes_mpc8548, mpc85xx_common_publish_devices);
159   -machine_device_initcall(xes_mpc8540, mpc85xx_common_publish_devices);
  138 +machine_arch_initcall(xes_mpc8572, mpc85xx_common_publish_devices);
  139 +machine_arch_initcall(xes_mpc8548, mpc85xx_common_publish_devices);
  140 +machine_arch_initcall(xes_mpc8540, mpc85xx_common_publish_devices);
160 141  
161 142 /*
162 143 * Called very early, device-tree isn't unflattened
163 144  
164 145  
... ... @@ -165,42 +146,21 @@
165 146 {
166 147 unsigned long root = of_get_flat_dt_root();
167 148  
168   - if (of_flat_dt_is_compatible(root, "xes,MPC8572")) {
169   -#ifdef CONFIG_PCI
170   - primary_phb_addr = 0x8000;
171   -#endif
172   - return 1;
173   - } else {
174   - return 0;
175   - }
  149 + return of_flat_dt_is_compatible(root, "xes,MPC8572");
176 150 }
177 151  
178 152 static int __init xes_mpc8548_probe(void)
179 153 {
180 154 unsigned long root = of_get_flat_dt_root();
181 155  
182   - if (of_flat_dt_is_compatible(root, "xes,MPC8548")) {
183   -#ifdef CONFIG_PCI
184   - primary_phb_addr = 0xb000;
185   -#endif
186   - return 1;
187   - } else {
188   - return 0;
189   - }
  156 + return of_flat_dt_is_compatible(root, "xes,MPC8548");
190 157 }
191 158  
192 159 static int __init xes_mpc8540_probe(void)
193 160 {
194 161 unsigned long root = of_get_flat_dt_root();
195 162  
196   - if (of_flat_dt_is_compatible(root, "xes,MPC8540")) {
197   -#ifdef CONFIG_PCI
198   - primary_phb_addr = 0xb000;
199   -#endif
200   - return 1;
201   - } else {
202   - return 0;
203   - }
  163 + return of_flat_dt_is_compatible(root, "xes,MPC8540");
204 164 }
205 165  
206 166 define_machine(xes_mpc8572) {
arch/powerpc/platforms/86xx/gef_ppc9a.c
... ... @@ -73,20 +73,15 @@
73 73 static void __init gef_ppc9a_setup_arch(void)
74 74 {
75 75 struct device_node *regs;
76   -#ifdef CONFIG_PCI
77   - struct device_node *np;
78 76  
79   - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
80   - fsl_add_bridge(np, 1);
81   - }
82   -#endif
83   -
84 77 printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n");
85 78  
86 79 #ifdef CONFIG_SMP
87 80 mpc86xx_smp_init();
88 81 #endif
89 82  
  83 + fsl_pci_assign_primary();
  84 +
90 85 /* Remap basic board registers */
91 86 regs = of_find_compatible_node(NULL, NULL, "gef,ppc9a-fpga-regs");
92 87 if (regs) {
... ... @@ -221,6 +216,7 @@
221 216 static __initdata struct of_device_id of_bus_ids[] = {
222 217 { .compatible = "simple-bus", },
223 218 { .compatible = "gianfar", },
  219 + { .compatible = "fsl,mpc8641-pcie", },
224 220 {},
225 221 };
226 222  
... ... @@ -231,7 +227,7 @@
231 227  
232 228 return 0;
233 229 }
234   -machine_device_initcall(gef_ppc9a, declare_of_platform_devices);
  230 +machine_arch_initcall(gef_ppc9a, declare_of_platform_devices);
235 231  
236 232 define_machine(gef_ppc9a) {
237 233 .name = "GE PPC9A",
arch/powerpc/platforms/86xx/gef_sbc310.c
... ... @@ -73,20 +73,14 @@
73 73 static void __init gef_sbc310_setup_arch(void)
74 74 {
75 75 struct device_node *regs;
76   -#ifdef CONFIG_PCI
77   - struct device_node *np;
78   -
79   - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
80   - fsl_add_bridge(np, 1);
81   - }
82   -#endif
83   -
84 76 printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
85 77  
86 78 #ifdef CONFIG_SMP
87 79 mpc86xx_smp_init();
88 80 #endif
89 81  
  82 + fsl_pci_assign_primary();
  83 +
90 84 /* Remap basic board registers */
91 85 regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
92 86 if (regs) {
... ... @@ -209,6 +203,7 @@
209 203 static __initdata struct of_device_id of_bus_ids[] = {
210 204 { .compatible = "simple-bus", },
211 205 { .compatible = "gianfar", },
  206 + { .compatible = "fsl,mpc8641-pcie", },
212 207 {},
213 208 };
214 209  
... ... @@ -219,7 +214,7 @@
219 214  
220 215 return 0;
221 216 }
222   -machine_device_initcall(gef_sbc310, declare_of_platform_devices);
  217 +machine_arch_initcall(gef_sbc310, declare_of_platform_devices);
223 218  
224 219 define_machine(gef_sbc310) {
225 220 .name = "GE SBC310",
arch/powerpc/platforms/86xx/gef_sbc610.c
... ... @@ -73,20 +73,15 @@
73 73 static void __init gef_sbc610_setup_arch(void)
74 74 {
75 75 struct device_node *regs;
76   -#ifdef CONFIG_PCI
77   - struct device_node *np;
78 76  
79   - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
80   - fsl_add_bridge(np, 1);
81   - }
82   -#endif
83   -
84 77 printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n");
85 78  
86 79 #ifdef CONFIG_SMP
87 80 mpc86xx_smp_init();
88 81 #endif
89 82  
  83 + fsl_pci_assign_primary();
  84 +
90 85 /* Remap basic board registers */
91 86 regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
92 87 if (regs) {
... ... @@ -198,6 +193,7 @@
198 193 static __initdata struct of_device_id of_bus_ids[] = {
199 194 { .compatible = "simple-bus", },
200 195 { .compatible = "gianfar", },
  196 + { .compatible = "fsl,mpc8641-pcie", },
201 197 {},
202 198 };
203 199  
... ... @@ -208,7 +204,7 @@
208 204  
209 205 return 0;
210 206 }
211   -machine_device_initcall(gef_sbc610, declare_of_platform_devices);
  207 +machine_arch_initcall(gef_sbc610, declare_of_platform_devices);
212 208  
213 209 define_machine(gef_sbc610) {
214 210 .name = "GE SBC610",
arch/powerpc/platforms/86xx/mpc8610_hpcd.c
... ... @@ -91,6 +91,9 @@
91 91 { .compatible = "simple-bus", },
92 92 /* So that the DMA channel nodes can be probed individually: */
93 93 { .compatible = "fsl,eloplus-dma", },
  94 + /* PCI controllers */
  95 + { .compatible = "fsl,mpc8610-pci", },
  96 + { .compatible = "fsl,mpc8641-pcie", },
94 97 {}
95 98 };
96 99  
... ... @@ -107,7 +110,7 @@
107 110  
108 111 return 0;
109 112 }
110   -machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
  113 +machine_arch_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
111 114  
112 115 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
113 116  
114 117  
... ... @@ -278,25 +281,13 @@
278 281 static void __init mpc86xx_hpcd_setup_arch(void)
279 282 {
280 283 struct resource r;
281   - struct device_node *np;
282 284 unsigned char *pixis;
283 285  
284 286 if (ppc_md.progress)
285 287 ppc_md.progress("mpc86xx_hpcd_setup_arch()", 0);
286 288  
287   -#ifdef CONFIG_PCI
288   - for_each_node_by_type(np, "pci") {
289   - if (of_device_is_compatible(np, "fsl,mpc8610-pci")
290   - || of_device_is_compatible(np, "fsl,mpc8641-pcie")) {
291   - struct resource rsrc;
292   - of_address_to_resource(np, 0, &rsrc);
293   - if ((rsrc.start & 0xfffff) == 0xa000)
294   - fsl_add_bridge(np, 1);
295   - else
296   - fsl_add_bridge(np, 0);
297   - }
298   - }
299   -#endif
  289 + fsl_pci_assign_primary();
  290 +
300 291 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
301 292 diu_ops.get_pixel_format = mpc8610hpcd_get_pixel_format;
302 293 diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table;
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
... ... @@ -19,7 +19,6 @@
19 19 #include <linux/delay.h>
20 20 #include <linux/seq_file.h>
21 21 #include <linux/of_platform.h>
22   -#include <linux/memblock.h>
23 22  
24 23 #include <asm/time.h>
25 24 #include <asm/machdep.h>
26 25  
... ... @@ -51,15 +50,8 @@
51 50 static int mpc86xx_exclude_device(struct pci_controller *hose,
52 51 u_char bus, u_char devfn)
53 52 {
54   - struct device_node* node;
55   - struct resource rsrc;
56   -
57   - node = hose->dn;
58   - of_address_to_resource(node, 0, &rsrc);
59   -
60   - if ((rsrc.start & 0xfffff) == 0x8000) {
  53 + if (hose->dn == fsl_pci_primary)
61 54 return uli_exclude_device(hose, bus, devfn);
62   - }
63 55  
64 56 return PCIBIOS_SUCCESSFUL;
65 57 }
66 58  
67 59  
... ... @@ -69,30 +61,11 @@
69 61 static void __init
70 62 mpc86xx_hpcn_setup_arch(void)
71 63 {
72   -#ifdef CONFIG_PCI
73   - struct device_node *np;
74   - struct pci_controller *hose;
75   -#endif
76   - dma_addr_t max = 0xffffffff;
77   -
78 64 if (ppc_md.progress)
79 65 ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0);
80 66  
81 67 #ifdef CONFIG_PCI
82   - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
83   - struct resource rsrc;
84   - of_address_to_resource(np, 0, &rsrc);
85   - if ((rsrc.start & 0xfffff) == 0x8000)
86   - fsl_add_bridge(np, 1);
87   - else
88   - fsl_add_bridge(np, 0);
89   - hose = pci_find_hose_for_OF_device(np);
90   - max = min(max, hose->dma_window_base_cur +
91   - hose->dma_window_size);
92   - }
93   -
94 68 ppc_md.pci_exclude_device = mpc86xx_exclude_device;
95   -
96 69 #endif
97 70  
98 71 printk("MPC86xx HPCN board from Freescale Semiconductor\n");
... ... @@ -101,13 +74,9 @@
101 74 mpc86xx_smp_init();
102 75 #endif
103 76  
104   -#ifdef CONFIG_SWIOTLB
105   - if ((memblock_end_of_DRAM() - 1) > max) {
106   - ppc_swiotlb_enable = 1;
107   - set_pci_dma_ops(&swiotlb_dma_ops);
108   - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
109   - }
110   -#endif
  77 + fsl_pci_assign_primary();
  78 +
  79 + swiotlb_detect_4g();
111 80 }
112 81  
113 82  
... ... @@ -162,6 +131,7 @@
162 131 { .compatible = "simple-bus", },
163 132 { .compatible = "fsl,srio", },
164 133 { .compatible = "gianfar", },
  134 + { .compatible = "fsl,mpc8641-pcie", },
165 135 {},
166 136 };
167 137  
... ... @@ -171,7 +141,7 @@
171 141  
172 142 return 0;
173 143 }
174   -machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices);
  144 +machine_arch_initcall(mpc86xx_hpcn, declare_of_platform_devices);
175 145 machine_arch_initcall(mpc86xx_hpcn, swiotlb_setup_bus_notifier);
176 146  
177 147 define_machine(mpc86xx_hpcn) {
arch/powerpc/platforms/86xx/sbc8641d.c
... ... @@ -38,23 +38,16 @@
38 38 static void __init
39 39 sbc8641_setup_arch(void)
40 40 {
41   -#ifdef CONFIG_PCI
42   - struct device_node *np;
43   -#endif
44   -
45 41 if (ppc_md.progress)
46 42 ppc_md.progress("sbc8641_setup_arch()", 0);
47 43  
48   -#ifdef CONFIG_PCI
49   - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie")
50   - fsl_add_bridge(np, 0);
51   -#endif
52   -
53 44 printk("SBC8641 board from Wind River\n");
54 45  
55 46 #ifdef CONFIG_SMP
56 47 mpc86xx_smp_init();
57 48 #endif
  49 +
  50 + fsl_pci_assign_primary();
58 51 }
59 52  
60 53  
... ... @@ -102,6 +95,7 @@
102 95 static __initdata struct of_device_id of_bus_ids[] = {
103 96 { .compatible = "simple-bus", },
104 97 { .compatible = "gianfar", },
  98 + { .compatible = "fsl,mpc8641-pcie", },
105 99 {},
106 100 };
107 101  
... ... @@ -111,7 +105,7 @@
111 105  
112 106 return 0;
113 107 }
114   -machine_device_initcall(sbc8641, declare_of_platform_devices);
  108 +machine_arch_initcall(sbc8641, declare_of_platform_devices);
115 109  
116 110 define_machine(sbc8641) {
117 111 .name = "SBC8641D",
arch/powerpc/sysdev/fsl_pci.c
... ... @@ -828,55 +828,79 @@
828 828  
829 829 struct device_node *fsl_pci_primary;
830 830  
831   -void __devinit fsl_pci_init(void)
  831 +void fsl_pci_assign_primary(void)
832 832 {
833   - int ret;
834   - struct device_node *node;
835   - struct pci_controller *hose;
836   - dma_addr_t max = 0xffffffff;
  833 + struct device_node *np;
837 834  
838 835 /* Callers can specify the primary bus using other means. */
839   - if (!fsl_pci_primary) {
840   - /* If a PCI host bridge contains an ISA node, it's primary. */
841   - node = of_find_node_by_type(NULL, "isa");
842   - while ((fsl_pci_primary = of_get_parent(node))) {
843   - of_node_put(node);
844   - node = fsl_pci_primary;
  836 + if (fsl_pci_primary)
  837 + return;
845 838  
846   - if (of_match_node(pci_ids, node))
847   - break;
848   - }
  839 + /* If a PCI host bridge contains an ISA node, it's primary. */
  840 + np = of_find_node_by_type(NULL, "isa");
  841 + while ((fsl_pci_primary = of_get_parent(np))) {
  842 + of_node_put(np);
  843 + np = fsl_pci_primary;
  844 +
  845 + if (of_match_node(pci_ids, np) && of_device_is_available(np))
  846 + return;
849 847 }
850 848  
851   - node = NULL;
852   - for_each_node_by_type(node, "pci") {
853   - if (of_match_node(pci_ids, node)) {
854   - /*
855   - * If there's no PCI host bridge with ISA, arbitrarily
856   - * designate one as primary. This can go away once
857   - * various bugs with primary-less systems are fixed.
858   - */
859   - if (!fsl_pci_primary)
860   - fsl_pci_primary = node;
861   -
862   - ret = fsl_add_bridge(node, fsl_pci_primary == node);
863   - if (ret == 0) {
864   - hose = pci_find_hose_for_OF_device(node);
865   - max = min(max, hose->dma_window_base_cur +
866   - hose->dma_window_size);
867   - }
  849 + /*
  850 + * If there's no PCI host bridge with ISA, arbitrarily
  851 + * designate one as primary. This can go away once
  852 + * various bugs with primary-less systems are fixed.
  853 + */
  854 + for_each_matching_node(np, pci_ids) {
  855 + if (of_device_is_available(np)) {
  856 + fsl_pci_primary = np;
  857 + of_node_put(np);
  858 + return;
868 859 }
869 860 }
  861 +}
870 862  
  863 +static int __devinit fsl_pci_probe(struct platform_device *pdev)
  864 +{
  865 + int ret;
  866 + struct device_node *node;
  867 + struct pci_controller *hose;
  868 +
  869 + node = pdev->dev.of_node;
  870 + ret = fsl_add_bridge(node, fsl_pci_primary == node);
  871 +
871 872 #ifdef CONFIG_SWIOTLB
872   - /*
873   - * if we couldn't map all of DRAM via the dma windows
874   - * we need SWIOTLB to handle buffers located outside of
875   - * dma capable memory region
876   - */
877   - if (memblock_end_of_DRAM() - 1 > max)
878   - ppc_swiotlb_enable = 1;
  873 + if (ret == 0) {
  874 + hose = pci_find_hose_for_OF_device(pdev->dev.of_node);
  875 +
  876 + /*
  877 + * if we couldn't map all of DRAM via the dma windows
  878 + * we need SWIOTLB to handle buffers located outside of
  879 + * dma capable memory region
  880 + */
  881 + if (memblock_end_of_DRAM() - 1 > hose->dma_window_base_cur +
  882 + hose->dma_window_size)
  883 + ppc_swiotlb_enable = 1;
  884 + }
879 885 #endif
  886 +
  887 + mpc85xx_pci_err_probe(pdev);
  888 +
  889 + return 0;
880 890 }
  891 +
  892 +static struct platform_driver fsl_pci_driver = {
  893 + .driver = {
  894 + .name = "fsl-pci",
  895 + .of_match_table = pci_ids,
  896 + },
  897 + .probe = fsl_pci_probe,
  898 +};
  899 +
  900 +static int __init fsl_pci_init(void)
  901 +{
  902 + return platform_driver_register(&fsl_pci_driver);
  903 +}
  904 +arch_initcall(fsl_pci_init);
881 905 #endif
arch/powerpc/sysdev/fsl_pci.h
... ... @@ -98,10 +98,19 @@
98 98  
99 99 extern struct device_node *fsl_pci_primary;
100 100  
101   -#ifdef CONFIG_FSL_PCI
102   -void fsl_pci_init(void);
  101 +#ifdef CONFIG_PCI
  102 +void fsl_pci_assign_primary(void);
103 103 #else
104   -static inline void fsl_pci_init(void) {}
  104 +static inline void fsl_pci_assign_primary(void) {}
  105 +#endif
  106 +
  107 +#ifdef CONFIG_EDAC_MPC85XX
  108 +int mpc85xx_pci_err_probe(struct platform_device *op);
  109 +#else
  110 +static inline int mpc85xx_pci_err_probe(struct platform_device *op)
  111 +{
  112 + return -ENOTSUPP;
  113 +}
105 114 #endif
106 115  
107 116 #endif /* __POWERPC_FSL_PCI_H */
drivers/edac/mpc85xx_edac.c
... ... @@ -212,7 +212,7 @@
212 212 return IRQ_HANDLED;
213 213 }
214 214  
215   -static int __devinit mpc85xx_pci_err_probe(struct platform_device *op)
  215 +int __devinit mpc85xx_pci_err_probe(struct platform_device *op)
216 216 {
217 217 struct edac_pci_ctl_info *pci;
218 218 struct mpc85xx_pci_pdata *pdata;
... ... @@ -226,6 +226,16 @@
226 226 if (!pci)
227 227 return -ENOMEM;
228 228  
  229 + /* make sure error reporting method is sane */
  230 + switch (edac_op_state) {
  231 + case EDAC_OPSTATE_POLL:
  232 + case EDAC_OPSTATE_INT:
  233 + break;
  234 + default:
  235 + edac_op_state = EDAC_OPSTATE_INT;
  236 + break;
  237 + }
  238 +
229 239 pdata = pci->pvt_info;
230 240 pdata->name = "mpc85xx_pci_err";
231 241 pdata->irq = NO_IRQ;
... ... @@ -315,6 +325,7 @@
315 325 devres_release_group(&op->dev, mpc85xx_pci_err_probe);
316 326 return res;
317 327 }
  328 +EXPORT_SYMBOL(mpc85xx_pci_err_probe);
318 329  
319 330 static int mpc85xx_pci_err_remove(struct platform_device *op)
320 331 {
... ... @@ -338,27 +349,6 @@
338 349 return 0;
339 350 }
340 351  
341   -static struct of_device_id mpc85xx_pci_err_of_match[] = {
342   - {
343   - .compatible = "fsl,mpc8540-pcix",
344   - },
345   - {
346   - .compatible = "fsl,mpc8540-pci",
347   - },
348   - {},
349   -};
350   -MODULE_DEVICE_TABLE(of, mpc85xx_pci_err_of_match);
351   -
352   -static struct platform_driver mpc85xx_pci_err_driver = {
353   - .probe = mpc85xx_pci_err_probe,
354   - .remove = __devexit_p(mpc85xx_pci_err_remove),
355   - .driver = {
356   - .name = "mpc85xx_pci_err",
357   - .owner = THIS_MODULE,
358   - .of_match_table = mpc85xx_pci_err_of_match,
359   - },
360   -};
361   -
362 352 #endif /* CONFIG_PCI */
363 353  
364 354 /**************************** L2 Err device ***************************/
... ... @@ -1210,12 +1200,6 @@
1210 1200 if (res)
1211 1201 printk(KERN_WARNING EDAC_MOD_STR "L2 fails to register\n");
1212 1202  
1213   -#ifdef CONFIG_PCI
1214   - res = platform_driver_register(&mpc85xx_pci_err_driver);
1215   - if (res)
1216   - printk(KERN_WARNING EDAC_MOD_STR "PCI fails to register\n");
1217   -#endif
1218   -
1219 1203 #ifdef CONFIG_FSL_SOC_BOOKE
1220 1204 pvr = mfspr(SPRN_PVR);
1221 1205  
... ... @@ -1251,9 +1235,6 @@
1251 1235 (PVR_VER(pvr) == PVR_VER_E500V2)) {
1252 1236 on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
1253 1237 }
1254   -#endif
1255   -#ifdef CONFIG_PCI
1256   - platform_driver_unregister(&mpc85xx_pci_err_driver);
1257 1238 #endif
1258 1239 platform_driver_unregister(&mpc85xx_l2_err_driver);
1259 1240 platform_driver_unregister(&mpc85xx_mc_err_driver);